公开(公告)号：US5448636A

公开(公告)日：1995-09-05

申请号：US017789

申请日：1993-02-16

Applicant: Antonio Andreini ,  Pietro Consiglio ,  Pietro Erratico ,  Enrico M. A. Ravanelli

Inventor： Antonio Andreini ,  Pietro Consiglio ,  Pietro Erratico ,  Enrico M. A. Ravanelli

IPC: H04M1/00 ,  H04M1/31 ,  H04M1/74 ,  H04M1/82

CPC classification number: H04M1/74 ,  H04M1/312 ,  H04M1/82

Abstract: Device for limiting the working voltage for mechanical switches in telephony includes terminals for connection to a telephone line, a connection and power supply branch for a control circuit extending from a first terminal, the branch having a first switch, the cathode terminal of a first Zener diode and the source terminal of a first MOSFET transistor being connected to the output terminal of the first switch, the gate terminal of the first MOSFET transistor being connected, through the anode terminal of the Zener diode, to the first terminal. The current absorbed by the device may be adjusted.

Abstract translation: 用于限制电话机械开关的工作电压的装置包括用于连接到电话线的端子，用于从第一端子延伸的控制电路的连接和电源分支，该分支具有第一开关，第一齐纳二极管的阴极端子 二极管和第一MOSFET晶体管的源极端子连接到第一开关的输出端子，第一MOSFET晶体管的栅极端子通过齐纳二极管的阳极端子连接到第一端子。 可以调节由装置吸收的电流。

公开(公告)号：US5445995A

公开(公告)日：1995-08-29

申请号：US994421

申请日：1992-12-21

Applicant: Paolo Casati ,  Pierangelo Magni

Inventor： Paolo Casati ,  Pierangelo Magni

IPC: B29C45/14 ,  B29C45/26 ,  H01L21/00 ,  H01L21/56 ,  H01L23/29 ,  H01L23/433 ,  H05K3/34

CPC classification number: H01L21/67126 ,  H01L21/565 ,  H01L23/4334 ,  H05K3/341 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L24/73 ,  H01L2924/14 ,  H05K2201/10689 ,  H05K2201/10931 ,  H05K2201/10969 ,  Y02P70/613 ,  Y10T29/49121

Abstract: A mold is disclosed for semiconductor devices intended for surface mounting, being of a type which comprises a metal plate and a body of solidified plastic resin. It consists of two plates which delimit at least one hollow adapted to receive the plate and to contain resin for forming the device body. Two elements of the mold push the plate from opposed sides against the bottom of the hollow. The hollow has two side extensions which are delimited by the side surfaces of the plate edges, thereby solidified projections are formed thereon which separate readily after the molding process. Thus, a structure is obtained wherein the plate has its bottom surface and two side edge portions fully exposed to allow optimum and controllable soldering to a printed circuit board.

Abstract translation: 公开了用于表面安装的半导体器件的模具，其是包括金属板和固化塑料树脂体的类型。 它包括两个板，它们限定至少一个适于容纳板的中空孔，并容纳用于形成装置主体的树脂。 模具的两个元件将板从相对的侧面推压到中空的底部。 中空具有由板边缘的侧表面限定的两个侧延伸部，由此在模制工艺之后容易地形成固化的突起。 因此，获得了其中板具有其底表面并且两个侧边缘部分完全暴露以允许对印刷电路板进行最佳和可控焊接的结构。

公开(公告)号：US5422923A

公开(公告)日：1995-06-06

申请号：US222253

申请日：1994-03-31

Applicant: Giona Fucili ,  Maurizio Nessi

Inventor： Giona Fucili ,  Maurizio Nessi

IPC: G04F5/00 ,  G06F1/025 ,  G06F7/62 ,  H02P6/08 ,  H03K5/13 ,  H03K21/38 ,  H03K21/00

CPC classification number: H03K5/13 ,  G06F1/025 ,  G06F7/62

Abstract: A programmable time-intervals generator comprising first and second digital counters, a memory, a digital divider and a digital adder. On the occurrence of a first event, the first counter starts counting, and on the occurrence of a second event, only the most significant bits of the number counted up to then are stored, thereby providing a division by truncation. From the stored number, at least two discrete fractions are obtained by the divider, whereafter said fractions are summed at the adder which operates on strings of bits. The second counter counts down the sum number and, on becoming cleared, generates a signal.

Abstract translation: 一种可编程时间间隔发生器，包括第一和第二数字计数器，存储器，数字除法器和数字加法器。 在发生第一事件时，第一个计数器开始计数，并且在第二个事件发生时，仅存储直到此数的最高有效位，从而通过截断进行除法。 从存储的数字中，通过除法器获得至少两个离散分数，之后所述分数在加法器处相加，该加法器对位串进行操作。 第二个计数器对和号进行计数，并在清零时产生一个信号。

公开(公告)号：US5412599A

公开(公告)日：1995-05-02

申请号：US951274

申请日：1992-09-25

Applicant: Vincenzo Daniele ,  Mirella Benedetti ,  Nuccio Villa

Inventor： Vincenzo Daniele ,  Mirella Benedetti ,  Nuccio Villa

IPC: H03K17/00 ,  H03K17/62 ,  H03K17/687 ,  H03K17/693 ,  G11C7/02 ,  H03K19/096

CPC classification number: H03K17/6235 ,  H03K17/6872 ,  H03K17/693 ,  H03K2217/0036

Abstract: A null consumption CMOS switch which may be set by nonvolatile programming is formed by a pair of complementary transistors preferably having a common drain and a common gate. The common gate is coupled to the floating gate a programmable and erasable, nonvolatile memory cell. The common gate/floating gate coupling can be a unitary floating gate structure. The floating gate directly drives the ON or OFF states of the two complementary transistors. On an output node of the switch, represented by the common drain of the pair of transistors, a signal present on a source node of one or the other of the two complementary transistors is replicated. The state of charge of the floating gate, imposed by programming or erasing, may be such as to reach advantageously a potential higher than the supply voltage or lower than the ground potential of the circuit. Different embodiments, such as a polarity selection, a path selector, a TRISTATE selector, and a logic gate selector are described.

Abstract translation: 可以由非易失性编程设置的零消耗CMOS开关由优选具有公共漏极和公共栅极的一对互补晶体管形成。 公共栅极耦合到浮动栅极可编程和可擦除的非易失性存储单元。 公共栅极/浮动栅极耦合可以是单一的浮动栅极结构。 浮栅直接驱动两个互补晶体管的导通或截止状态。 在由一对晶体管的公共漏极表示的开关的输出节点上，复制存在于两个互补晶体管中的一个或另一个的源极节点上的信号。 通过编程或擦除施加的浮动栅极的充电状态可以有利地达到高于电源电压或低于电路的地电位的电位。 描述了诸如极性选择，路径选择器，TRISTATE选择器和逻辑门选择器的不同实施例。

公开(公告)号：US5373225A

公开(公告)日：1994-12-13

申请号：US941665

申请日：1992-09-08

Applicant: Vanni Poletto ,  Marco Morelli

Inventor： Vanni Poletto ,  Marco Morelli

IPC: G05F1/56 ,  H02J1/00

CPC classification number: G05F1/56

Abstract: A low-drop voltage regulator includes a P-type power transistor having an input terminal connected to a supply source, an output terminal connected to a load, and a control terminal driven by the output of an operational amplifier having its non-inverting input connected to a reference voltage source and its inverting input connected to the output terminal of the power transistor. To improve the regulation characteristics of the regulator without jeopardizing stability, even under normally critical conditions, provision is made for a feedback network including a capacitive component between the output and inverting input of the operational amplifier.

Abstract translation: 一个低压降稳压器包括一个P型功率晶体管，它具有一个连接到一个电源的输入端，一个连接到一个负载的输出端，以及一个由其同相输入连接的运算放大器的输出驱动的控制端 到参考电压源，其反相输入连接到功率晶体管的输出端。 为了在不危及稳定性的情况下改善调节特性，即使在正常临界条件下，也提供了包括运算放大器的输出和反相输入之间的电容分量的反馈网络。

公开(公告)号：US5370517A

公开(公告)日：1994-12-06

申请号：US45983

申请日：1993-04-09

Applicant: Paolo Casati ,  Carlo C. De Martiis ,  Giuseppe Marchisi

Inventor： Paolo Casati ,  Carlo C. De Martiis ,  Giuseppe Marchisi

IPC: H01L21/56 ,  H01L23/433 ,  B29C ,  B29C45/14

CPC classification number: H01L23/4334 ,  H01L21/565 ,  H01L2924/0002 ,  Y10S425/228 ,  Y10T29/49121

Abstract: A die-stamped frame is fastened to a heat sink metal baseplate by wedging flexible tabs into receiving indentations of the baseplate while keeping the frame substantially in contact with the surface of the baseplate. The wire welding operations may then take place on the end of the fingers of the patterned metal frame while the same are solidly resting on the surface of the baseplate thus facilitating the welding. The backing-off of the metal frame from the surface of the heat sink baseplate takes place upon the closing of the mold used for encapsulating in resin the device. The injection of the resin and its solidification "freezes" the pins in the backed-off position imposed by the mold upon closing, thus ensuring the electrical isolation between the pins and the integral heat sink baseplate.

Abstract translation: 模压框架通过将柔性突片楔入接收底板的凹槽中而紧固到散热器金属底板上，同时保持框架基本上与基板的表面接触。 然后，线焊接操作可以在图案化的金属框架的指状物的端部上发生，同时固定在基板的表面上，从而便于焊接。 金属框架从散热器基板表面的脱落发生在用于封装在树脂中的模具的封闭件上。 树脂的注入及其固化在关闭时由模具施加的退回位置中的销钉“冻结”，从而确保销和整体式散热器基板之间的电气隔离。

公开(公告)号：US5365188A

公开(公告)日：1994-11-15

申请号：US192858

申请日：1994-02-07

Applicant: Edoardo Botti ,  Guido Brasca

Inventor： Edoardo Botti ,  Guido Brasca

IPC: H03F1/02 ,  H03F3/30 ,  H03F3/68 ,  H03F3/72

CPC classification number: H03F1/0277 ,  H03F3/3081 ,  H03F3/68 ,  H03F3/72

Abstract: A self-configurable, dual bridge, power amplifier has a window comparator sensing the level of input signals fed to the amplifier which drives a plurality of configuring switches capable of configuring the amplifier as a single bridge amplifier driving a first and a second loads connected in series or as two distinct bridge amplifiers each driving one of the two loads. As long as the two levels of the input signals remain comprised between a range defined by a negative voltage reference and a positive voltage reference, the amplifier is configured as a single bridge driving the two loads in series, thus reducing sensibly power dissipation.

Abstract translation: 自配置双桥功率放大器具有窗口比较器，其感测馈送到放大器的输入信号的电平，其驱动能够配置放大器的多个配置开关作为驱动第一和第二负载的单桥放大器 系列或作为两个不同的桥式放大器驱动两个负载中的一个。 只要输入信号的两个电平保持在由负电压基准和正电压基准定义的范围之间，则放大器被配置为串联驱动两个负载的单个桥，因此降低了明智的功率耗散。

公开(公告)号：US5337355A

公开(公告)日：1994-08-09

申请号：US991564

申请日：1992-12-16

Applicant: Luciano Tomasini ,  Rinaldo Castello

Inventor： Luciano Tomasini ,  Rinaldo Castello

IPC: H04M1/00 ,  H04M19/08 ,  H04M19/00

CPC classification number: H04M19/08

Abstract: A circuit is described which comprises an operational amplifier, two resistors connected between the telephone line and the inputs of the amplifier, a capacitor which is charged via a first bipolar transistor controlled by the amplifier via a first FET transistor, a second bipolar transistor in parallel to the connection of the first transistor and the capacitor, a second FET transistor, identical to the first and having its source and gate terminals connected to the corresponding terminals of the first, and two current generators connected to the drain terminals respectively of the first and the second FET transistor and to the bases, respectively, of the first and second bipolar transistor. The currents of the two generators and the other parameters of the circuit are such as to hold the first and second bipolar transistors in a conductive and a switched off state respectively, except when the line voltage fails below a minimum predetermined value; in which case the first and second transistors commute to the switched off and conductive states respectively. The circuit has a lower "voltage loss" than known circuits.

Abstract translation: 描述了一种电路，其包括运算放大器，连接在电话线路和放大器的输入端之间的两个电阻器，经由第一FET晶体管由放大器控制的第一双极晶体管充电的电容器，并联的第二双极晶体管 到第一晶体管和电容器的连接，第二FET晶体管，与第一晶体管和电容器的连接相同，并且其源极和栅极端子连接到第一晶体管的相应端子，以及两个电流发生器分别连接到第一和第二晶体管的漏极端子， 第二FET晶体管和第一和第二双极晶体管的基极。 除了当线路电压故障低于最小预定值之外，两个发生器的电流和电路的其它参数分别保持第一和第二双极晶体管处于导通和断开状态; 在这种情况下，第一和第二晶体管分别转换成关断和导通状态。 该电路具有比已知电路低的“电压损耗”。

公开(公告)号：US5332937A

公开(公告)日：1994-07-26

申请号：US942678

申请日：1992-09-09

Applicant: Rinaldo Castello ,  Roberto Alini ,  Andrea Baschirotto ,  Gianfranco Vai

Inventor： Rinaldo Castello ,  Roberto Alini ,  Andrea Baschirotto ,  Gianfranco Vai

IPC: H03F3/45 ,  H03H11/04 ,  H03K5/24

CPC classification number: H03F3/45179 ,  H03F3/45286 ,  H03F2203/45024 ,  H03H11/0433

Abstract: A transconductor differential stage for high-frequency filters, which has a MOS differential input pair with common sources. The drain of each MOS input is connected to the emitter of an npn bipolar. These two matched bipolars have their gates connected together with the gate of a third bipolar, which is diode-connected. Two matched current sources feed the two bipolars, and a third current source feeds the third bipolar. A single controlled current sink is connected to the sources of both MOS input transistors, and also (through a resistor) to the third bipolar.

Abstract translation: 用于高频滤波器的跨导差分级，具有通用源的MOS差分输入对。 每个MOS输入的漏极连接到npn双极的发射极。 这两个匹配的双极子的栅极与第二极二极管连接的第三极的栅极连接在一起。 两个匹配的电流源馈送两个双极，第三个电流源馈送第三个双极。 单个受控电流吸收器连接到两个MOS输入晶体管的源极，并且（通过电阻器）连接到第三极。

公开(公告)号：US5315268A

公开(公告)日：1994-05-24

申请号：US962488

申请日：1992-10-15

Applicant: Edoardo Botti ,  Claudio Tavazzani

Inventor： Edoardo Botti ,  Claudio Tavazzani

IPC: H03F1/52 ,  H03F1/30 ,  H03F3/20 ,  H03G3/20 ,  H03G3/30 ,  H03G5/16

CPC classification number: H03F1/52 ,  H03F1/302 ,  H03G3/20 ,  H03G3/3026 ,  H03F2200/447

Abstract: An amplifier comprising a power stage the output of which is compared with a reference level by a comparator. If the output exceeds the reference level, a reduction is made in the gain of a variable-gain cell upstream from the power stage. The reference level varies with temperature, and, more specifically, presents a high constant value (e.g., greater than the supply voltage) when temperature is below a predetermined threshold (e.g., 130.degree. C.), and decreases in proportion to an increase in temperature, when the temperature exceeds the predetermined threshold. Thus, the input signal is only attenuated in the event the output signal exceeds given values inversely proportional to temperature, and with no reduction in peak output at high temperature.

Abstract translation: 放大器，其包括功率级，其输出端通过比较器与参考电平进行比较。 如果输出超过参考电平，则在功率级上游的可变增益单元的增益中减小。 参考电平随温度变化，更具体地说，当温度低于预定阈值（例如，130℃）时，具有高的恒定值（例如，大于电源电压），并且与增加的比例 当温度超过预定阈值时。 因此，输出信号只有在输出信号超过与温度成反比的给定值的情况下才被衰减，并且在高温下峰值输出没有降低。