公开(公告)号：US11791248B2

公开(公告)日：2023-10-17

申请号：US18152733

申请日：2023-01-10

Applicant: Texas Instruments Incorporated

Inventor： Sreenivasan Kalyani Koduri

IPC: H01L21/48 ,  H01L23/495 ,  H01L23/31 ,  H01L21/56 ,  H05K1/18 ,  H01L23/552 ,  H05K3/34

CPC classification number: H01L21/4821 ,  H01L21/56 ,  H01L23/3135 ,  H01L23/49555 ,  H01L23/49558 ,  H01L23/552 ,  H05K1/181 ,  H05K3/3426 ,  H01L21/4842 ,  H01L23/49586 ,  H05K2201/10931

Abstract: In examples, a semiconductor device comprises a semiconductor die, an opaque mold compound housing covering the semiconductor die, a conductive terminal extending from the mold compound housing, and an insulative coat covering the mold compound housing and at least a portion of the conductive terminal.

公开(公告)号：US20180070449A1

公开(公告)日：2018-03-08

申请号：US15560264

申请日：2016-03-08

Applicant: OMRON Corporation

Inventor： Seiki Shimoda ,  Masaaki Abe

IPC: H05K1/18 ,  H01H50/02 ,  H01H50/14

CPC classification number: H05K1/181 ,  H01H50/023 ,  H01H50/043 ,  H01H50/047 ,  H01H50/14 ,  H01H51/229 ,  H01H2001/5888 ,  H05K2201/10053 ,  H05K2201/1078 ,  H05K2201/10803 ,  H05K2201/10931

Abstract: An electronic device where molten solder does not come into contact with a sealant so as not to destroy a sealing function. An electronic device is provided with: an insulating base mounted on a printed circuit board; a common planar terminal provided so as to extend from an outer side surface to a bottom surface edge of the insulating base, and cause electrical continuity between the outer side surface and the bottom surface edge of the insulating base; a cover fitted to the insulating base and covering the common planar terminal; and a sealant sealing a gap between the outer side surface of the insulating base and an inner circumferential surface of the cover. A solder pool is formed in a position surrounded by the printed circuit board and the common planar terminal at the bottom surface edge of the insulating base.

公开(公告)号：US20170332492A1

公开(公告)日：2017-11-16

申请号：US15152218

申请日：2016-05-11

Applicant: Flextronics Automotive GmbH & Co. KG

Inventor： Peter Lutz ,  Kevin Buermann

IPC: H05K1/18 ,  H05K3/30

CPC classification number: H05K1/189 ,  H05K3/288 ,  H05K3/305 ,  H05K3/328 ,  H05K2201/05 ,  H05K2201/0929 ,  H05K2201/10037 ,  H05K2201/10227 ,  H05K2201/1031 ,  H05K2201/10931 ,  H05K2203/0278 ,  H05K2203/04 ,  H05K2203/16

Abstract: The invention is related to an electrical circuitry assembly as well as a method for manufacturing such an electrical circuitry assembly, wherein the assembly basically but not exclusively comprising of an electrically conductive metal plate and a circuit including a conductive layer and wherein both the metal plate and the circuit shall be electrically connected to each other.

公开(公告)号：US07906739B2

公开(公告)日：2011-03-15

申请号：US11948507

申请日：2007-11-30

Applicant: Jean-Christophe Villain ,  Michel Cour

Inventor： Jean-Christophe Villain ,  Michel Cour

IPC: H01H9/00

CPC classification number: H05K3/303 ,  H01H2001/5888 ,  H05K3/341 ,  H05K2201/09472 ,  H05K2201/09781 ,  H05K2201/10053 ,  H05K2201/10931 ,  H05K2201/2036 ,  Y02P70/613

Abstract: An arrangement may include a substrate and an electrical component. The electrical component may include a base made of an insulating material and a plurality of connection terminals. Each connection terminal is connected to a corresponding connection pad of the substrate by means of a spot of solder paste. The arrangement may further include a block interposed between the substrate and the base of the electrical component. The block may be located substantially on the axis of application of a force for actuating the electrical component and may be designed to inhibit deformation of the base. The block may include a spot of solder paste soldered to an associated conducting pad on the substrate.

Abstract translation: 一种布置可以包括基底和电气部件。 电气部件可以包括由绝缘材料制成的基座和多个连接端子。 每个连接端子通过焊膏点连接到基板的相应的连接焊盘。 该布置还可以包括插入在基板和电气部件的基部之间的块。 该块可以基本上位于施加用于致动电气部件的力的轴线上，并且可以设计成阻止基座的变形。 块可以包括焊接到衬底上的相关联的导电焊盘的焊膏点。

公开(公告)号：US07608484B2

公开(公告)日：2009-10-27

申请号：US11554728

申请日：2006-10-31

Applicant: Bernhard P. Lange ,  Anthony L. Coyle ,  Jeffrey Gail Holloway

Inventor： Bernhard P. Lange ,  Anthony L. Coyle ,  Jeffrey Gail Holloway

IPC: H01L21/00

CPC classification number: H01L21/561 ,  H01L21/4821 ,  H01L23/3121 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/341 ,  H05K2201/10689 ,  H05K2201/10931 ,  H05K2201/10969 ,  H05K2201/10984 ,  Y02P70/613 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed herein is a method of manufacturing a semiconductor package with a solder standoff on lead pads that reach to the edge of the package (non-pullback leads). It includes encapsulating a plurality of die on a lead frame strip. The lead frame strip comprises a plurality of package sites, which further comprises a plurality of lead pads and a die pad. The method also includes forming a channel between the lead pads of nearby package sites without singulating the packages. Another step in the method includes disposing solder on the lead pads, the die pad, or the lead pads and the die pads without substantially covering the channel with solder. The manufacturing method further includes singulating the packages.

Abstract translation: 本文公开了一种制造半导体封装的方法，该半导体封装在引线焊盘上具有焊接位置，该焊盘抵达封装的边缘（非拉回引线）。 它包括将多个管芯封装在引线框架条上。 引线框架条包括多个封装位置，其还包括多个引线焊盘和管芯焊盘。 该方法还包括在附近的封装位置的引线焊盘之间形成通道，而不需要对封装进行分离。 该方法的另一步骤包括在焊盘，芯片焊盘或引线焊盘和裸片焊盘上布置焊料，而基本上不用焊料覆盖焊道。 制造方法还包括将包装分离。

公开(公告)号：US20040251523A1

公开(公告)日：2004-12-16

申请号：US10463051

申请日：2003-06-16

Applicant: SanDisk Corporation

Inventor： Hem P. Takiar

IPC: H01L023/495

CPC classification number: H05K3/3426 ,  H01L23/3128 ,  H01L23/49575 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/32188 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/18165 ,  H05K2201/10515 ,  H05K2201/10689 ,  H05K2201/10931 ,  H05K2201/2081 ,  Y02P70/613 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

Abstract: Improved apparatus and methods for stacking integrated circuit packages having leads are disclosed. According to one embodiment, the leads of an integrated circuit package are exposed and provided with solder balls so that corresponding leads of another integrated circuit package being stacked thereon can be electrically connected. The stacking results in increased integrated circuit density with respect to a substrate, yet the stacked integrated circuit packages are able to still enjoy having an overall thin or low profile.

Abstract translation: 公开了用于堆叠具有引线的集成电路封装的改进的装置和方法。 根据一个实施例，集成电路封装的引线被暴露并设置有焊球，使得堆叠在其上的另一个集成电路封装的相应引线可以电连接。 堆叠导致相对于衬底的集成电路密度增加，但是堆叠的集成电路封装仍然可以享受整体薄或薄的轮廓。

公开(公告)号：US06455355B1

公开(公告)日：2002-09-24

申请号：US09832398

申请日：2001-04-10

Applicant: Chieh-Yuan Lin ,  Jui-Yi Chuang ,  Chi-Chuan Wu

Inventor： Chieh-Yuan Lin ,  Jui-Yi Chuang ,  Chi-Chuan Wu

IPC: H01L2144

CPC classification number: H05K3/341 ,  H01L2224/48091 ,  H01L2224/48247 ,  H05K1/0206 ,  H05K3/3452 ,  H05K3/3484 ,  H05K3/42 ,  H05K2201/10727 ,  H05K2201/10931 ,  H05K2201/2036 ,  H05K2203/0455 ,  Y02P70/613 ,  H01L2924/00014

Abstract: A modified SMT (Surface Mount Technology) process is proposed for mounting an exposed-pad type of semiconductor device over a PCB (printed circuit board), which can help prevent the problem of floated soldering of the semiconductor device over the PCB. By this modified SMT process, a plurality of via holes are formed in the pad-mounting area of the printed circuit board; and a solder material is pasted over the bottom end of each of the via holes. As the semiconductor device is mounted in position over the printed circuit board, a solder-reflow process is performed on the pasted solder material so as to cause the pasted solder material to be wetted to the entire surface of the solder-wettable layer in each of the via holes, thereby allowing the solder material to reflow to the upper end of each of the via holes where the reflowed solder is also wetted to the exposed die pad of the semiconductor device, thereby securely bonding the semiconductor device to the PCB.

Abstract translation: 提出了一种改进的SMT（表面贴装技术）工艺，用于在PCB（印刷电路板）上安装暴露焊盘类型的半导体器件，这有助于防止半导体器件在PCB上漂浮焊接的问题。 通过这种改进的SMT工艺，在印刷电路板的焊盘安装区域中形成多个通孔; 并且焊料材料粘贴在每个通孔的底端上。 当半导体器件安装在印刷电路板上的适当位置时，对粘贴的焊料进行焊料回流处理，以使糊状的焊料材料被润湿到每个焊料可润湿层的整个表面 通孔，从而允许焊料材料回流到每个通孔的上端，其中回流焊料也被润湿到半导体器件的裸露裸片焊盘，从而将半导体器件牢固地接合到PCB。

公开(公告)号：US6046501A

公开(公告)日：2000-04-04

申请号：US942443

申请日：1997-10-01

Applicant: Osamu Ishikawa ,  Takahiro Yokoyama ,  Taketo Kunihisa ,  Masaaki Nishijima ,  Shinji Yamamoto ,  Junji Itoh ,  Toshio Fujiwara ,  Kaoru Muramatsu

Inventor： Osamu Ishikawa ,  Takahiro Yokoyama ,  Taketo Kunihisa ,  Masaaki Nishijima ,  Shinji Yamamoto ,  Junji Itoh ,  Toshio Fujiwara ,  Kaoru Muramatsu

IPC: H01L23/31 ,  H01L23/433 ,  H01L23/495 ,  H01L23/66 ,  H05K1/02 ,  H05K3/34 ,  H01L23/04 ,  H01L23/34

CPC classification number: H05K3/341 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49503 ,  H01L23/66 ,  H01L2224/27013 ,  H01L2924/13091 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/3011 ,  H05K1/0243 ,  H05K2201/10689 ,  H05K2201/10931 ,  H05K2201/10969 ,  Y02P70/613

Abstract: An RF-driven semiconductor chip is die-bonded to the top face of a metal plate. The semiconductor chip and the metal plate are molded together with outer leads in a plastic package in the form of a rectangular parallelepiped. The metal plate is exposed at the back face of the plastic package. The metal plate is not protruding from the front and rear side faces of the plastic package. The front and rear side faces of the metal plate are flush with the front and rear side faces of the plastic package and partially exposed at the front and rear side faces of the plastic package. The front and rear portions of the plastic package are centrally formed with respective cutaway portions each in the form of a rectangular parallelepiped. The top face of the metal plate is exposed in the cutaway portions formed centrally in the front and rear portions of the plastic package to form solder portions.

Abstract translation: RF驱动的半导体芯片与金属板的顶面芯片接合。 半导体芯片和金属板与塑料封装中的外引线一起模塑成长方体形状。 金属板在塑料包装的背面露出。 金属板不会从塑料封装的前后侧面突出。 金属板的前侧面和后侧面与塑料包装件的前侧面和后侧面齐平，并部分地暴露在塑料包装件的前侧和后侧面。 塑料包装件的前部和后部中心地形成有各自的切割部分，每个切口部分呈矩形平行六面体形式。 金属板的顶面露出在塑料封装的前后部中央形成的切口部，形成焊料部。

公开(公告)号：US09949376B2

公开(公告)日：2018-04-17

申请号：US14563778

申请日：2014-12-08

Applicant: Second Sight Medical Products, Inc.

Inventor： Robert J Greenberg ,  Neil H Talbot ,  James S Little

IPC: A61N1/375 ,  A61N1/05 ,  A61N1/36 ,  A61N1/372 ,  H05K3/28 ,  H05K1/11 ,  H05K1/14 ,  A61B5/00 ,  A61B5/0478 ,  H05K1/18 ,  H01L23/055 ,  H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K3/00 ,  H05K3/32 ,  H05K3/36 ,  H05K3/40

CPC classification number: H05K3/282 ,  A61B5/0006 ,  A61B5/0478 ,  A61B5/4836 ,  A61B5/6868 ,  A61B2562/0209 ,  A61B2562/046 ,  A61B2562/125 ,  A61N1/0529 ,  A61N1/0531 ,  A61N1/0534 ,  A61N1/3606 ,  A61N1/36071 ,  A61N1/36082 ,  A61N1/36139 ,  A61N1/375 ,  A61N1/3752 ,  A61N1/3754 ,  H01L23/055 ,  H01L2224/16225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48465 ,  H05K1/02 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0281 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/11 ,  H05K1/111 ,  H05K1/145 ,  H05K1/147 ,  H05K1/189 ,  H05K3/0044 ,  H05K3/005 ,  H05K3/0058 ,  H05K3/28 ,  H05K3/321 ,  H05K3/363 ,  H05K3/4015 ,  H05K3/4061 ,  H05K2201/0245 ,  H05K2201/053 ,  H05K2201/055 ,  H05K2201/09063 ,  H05K2201/09145 ,  H05K2201/09163 ,  H05K2201/097 ,  H05K2201/09981 ,  H05K2201/10303 ,  H05K2201/10318 ,  H05K2201/10674 ,  H05K2201/10795 ,  H05K2201/10931 ,  H05K2201/2009 ,  H05K2203/0195 ,  H05K2203/025 ,  H05K2203/0278 ,  H05K2203/0307 ,  H05K2203/068 ,  H05K2203/082 ,  H05K2203/1322 ,  H05K2203/1327 ,  H05K2203/1394 ,  H05K2203/1461 ,  H05K2203/1476 ,  H05K2203/162 ,  H05K2203/304 ,  H01L2924/00014 ,  H01L2924/00

Abstract: The present invention consists of an implantable device with at least one package that houses electronics that sends and receives data or signals, and optionally power, from an external system through at least one coil attached to at least one package and processes the data, including recordings of neural activity, and delivers electrical pulses to neural tissue through at least one array of multiple electrodes that are attached to the at least one package. The device is adapted to electrocorticographic (ECoG) and local field potential (LFP) signals. A brain stimulator, preferably a deep brain stimulator, stimulates the brain in response to neural recordings in a closed feedback loop. The device is advantageous in providing neuromodulation therapies for neurological disorders such as chronic pain, post traumatic stress disorder (PTSD), major depression, or similar disorders. The invention and components thereof are intended to be installed in the head, or on or in the cranium or on the dura, or on or in the brain.

公开(公告)号：US08232144B2

公开(公告)日：2012-07-31

申请号：US12560640

申请日：2009-09-16

Applicant: Bernhard P Lange ,  Anthony L Coyle ,  Jeffrey G Holloway

Inventor： Bernhard P Lange ,  Anthony L Coyle ,  Jeffrey G Holloway

IPC: H01L21/00

CPC classification number: H01L21/561 ,  H01L21/4821 ,  H01L23/3121 ,  H01L23/49582 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/16245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H05K3/341 ,  H05K2201/10689 ,  H05K2201/10931 ,  H05K2201/10969 ,  H05K2201/10984 ,  Y02P70/613 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed herein is a method of manufacturing a semiconductor package with a solder standoff on lead pads that reach to the edge of the package (non-pullback leads). It includes encapsulating a plurality of die on a lead frame strip. The lead frame strip comprises a plurality of package sites, which further comprises a plurality of lead pads and a die pad. The method also includes forming a channel between the lead pads of nearby package sites without singulating the packages. Another step in the method includes disposing solder on the lead pads, the die pad, or the lead pads and the die pads without substantially covering the channel with solder. The manufacturing method further includes singulating the packages.

Abstract translation: 本文公开了一种制造半导体封装的方法，该半导体封装在引线焊盘上具有焊接位置，该焊盘抵达封装的边缘（非拉回引线）。 它包括将多个管芯封装在引线框架条上。 引线框架条包括多个封装位置，其还包括多个引线焊盘和管芯焊盘。 该方法还包括在附近的封装位置的引线焊盘之间形成通道，而不需要对封装进行分离。 该方法的另一步骤包括在焊盘，芯片焊盘或引线焊盘和裸片焊盘上布置焊料，而基本上不用焊料覆盖焊道。 制造方法还包括将包装分离。