公开(公告)号：US20060261485A1

公开(公告)日：2006-11-23

申请号：US11492261

申请日：2006-07-25

申请人： Dinesh Chopra

发明人： Dinesh Chopra

IPC分类号： H01L23/52

CPC分类号： H01L21/2885 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76873

摘要： Apparatus with conductive interconnect layers disposed on a dual-purpose layer provide useful articles such as semiconductor wafers, semiconductor dies, memory devices, circuit modules, and electronic systems. The number of necessary processing steps to form such conductive interconnects are reduced by removing the need to employ a seed layer interposed between the barrier layer and the conductive interconnect layer.

摘要翻译： 设置在双用途层上的导电互连层的设备提供有用的物品，例如半导体晶片，半导体管芯，存储器件，电路模块和电子系统。 为了减少形成这种导电互连的必要处理步骤的数量，通过去除需要使用介于阻挡层和导电互连层之间的晶种层来减少。

公开(公告)号：US07112245B2

公开(公告)日：2006-09-26

申请号：US10772541

申请日：2004-02-05

申请人： Vishnu K. Agarwal ,  Dinesh Chopra

发明人： Vishnu K. Agarwal ,  Dinesh Chopra

IPC分类号： B05B13/02 ,  B05B7/06

CPC分类号： B24B37/22 ,  B24B37/26 ,  B24D3/28 ,  B24D11/001 ,  B24D18/0072

摘要： A planarizing pad for planarizing a microelectronic substrate, and a method and apparatus for forming the planarizing pad. In one embodiment, planarizing pad material is mixed with compressed gas to form a plurality of discrete elements that are distributed on a support material. At least a portion of the discrete elements are spaced apart from each other on the support material to form a textured surface for engaging a microelectronic substrate and removing material from the microelectronic substrate. The discrete elements can be uniformly or randomly distributed on the support material, and the discrete elements can be directly affixed to the support material or affixed to the support material with an adhesive.

摘要翻译： 用于平坦化微电子衬底的平坦化焊盘，以及用于形成平坦化焊盘的方法和装置。 在一个实施例中，平坦化焊盘材料与压缩气体混合以形成分布在支撑材料上的多个分立元件。 离散元件的至少一部分在支撑材料上彼此间隔开以形成纹理化表面，用于接合微电子衬底并从微电子衬底去除材料。 离散元件可以均匀地或随机地分布在支撑材料上，并且离散元件可以直接固定到支撑材料上或者用粘合剂固定到支撑材料上。

公开(公告)号：US20060154483A1

公开(公告)日：2006-07-13

申请号：US11277340

申请日：2006-03-23

申请人： Dinesh Chopra ,  Kevin Donohoe ,  Cem Basceri

发明人： Dinesh Chopra ,  Kevin Donohoe ,  Cem Basceri

IPC分类号： H01L21/44

CPC分类号： H01L21/28079 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76879 ,  H01L28/91 ,  H01L29/66583

摘要： In a copper plating process, a seed layer is uniformly deposited over a surface, including lining a high aspect ratio trench defined by that surface. A mask layer is provided using a process that fails to deposit in the trench. In one exemplary embodiment, the failure is due to the decrease in the isotropic flux of neutrals toward the bottom of the trench. Copper is subsequently electroplated. Because the seed layer is exposed only within the trench, copper deposits only therein. The self-aligned mask prevents plating outside of the trench. A chemical-mechanical planarization step removes the mask and the seed layer extending beyond the trench, leaving a copper structure within the trench. The structure may serve as a conductive line, an interconnect, or a capacitor plate.

摘要翻译： 在镀铜工艺中，种子层均匀地沉积在表面上，包括衬里由该表面限定的高纵横比的沟槽。 使用不能沉积在沟槽中的工艺来提供掩模层。 在一个示例性实施例中，故障是由于中性粒子向沟槽底部的各向同性通量的减小。 随后电镀铜。 因为种子层仅在沟槽内露出，所以铜仅沉积在其中。 自对准面罩可防止沟槽外的电镀。 化学机械平面化步骤去除掩模和种子层延伸超过沟槽，在沟槽内留下铜结构。 该结构可以用作导线，互连或电容器板。

公开(公告)号：US07041595B2

公开(公告)日：2006-05-09

申请号：US10114759

申请日：2002-04-02

申请人： Dinesh Chopra

发明人： Dinesh Chopra

IPC分类号： H01L21/4763

CPC分类号： H01L21/76846 ,  H01L21/2885 ,  H01L21/76873 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A barrier layer material and method of forming the same is disclosed. The method includes depositing a graded metal nitride layer in a single deposition chamber, with a high nitrogen content at a lower surface and a high metal content at an upper surface. In the illustrated embodiment, a metal nitride with a 1:1 nitrogen-to-metal ratio is initially deposited into a deep void, such as a via or trench, by reactive sputtering of a metal target in nitrogen atmosphere. After an initial thickness is deposited, flow of nitrogen source gas is reduced and sputtering continues, producing a metal nitride with a graded nitrogen content. After the nitrogen is stopped, deposition continues, resulting in a substantially pure metal top layer. This three-stage layer includes a highly conductive top layer, upon which copper can be directly electroplated without a separate seed layer deposition. Advantageously, native oxide on the top metal surface can be cleaned in situ by reversing polarity in the electroplating solution just prior to plating.

摘要翻译： 公开了一种阻挡层材料及其形成方法。 该方法包括在单个沉积室中沉积梯度金属氮化物层，在下表面具有高氮含量和在上表面具有高金属含量。 在所示实施例中，通过金属靶在氮气气氛中的反应溅射，首先将具有1：1氮 - 金属比率的金属氮化物沉积到诸如通孔或沟槽的深空隙中。 在沉积初始厚度之后，氮源气体的流动减少并继续溅射，产生具有梯度氮含量的金属氮化物。 在氮气停止之后，继续沉积，导致基本上纯的金属顶层。 该三级层包括高导电顶层，铜可直接电镀而不需要单独的种子层沉积。 有利地，顶部金属表面上的天然氧化物可以在电镀之前通过反转电镀溶液中的极性来原位清洗。

公开(公告)号：US07005379B2

公开(公告)日：2006-02-28

申请号：US10822030

申请日：2004-04-08

申请人： Nishant Sinha ,  Dinesh Chopra ,  Fred D. Fishburn

发明人： Nishant Sinha ,  Dinesh Chopra ,  Fred D. Fishburn

IPC分类号： H01L21/44 ,  H01L21/8242 ,  H01L21/20

CPC分类号： H01L21/288 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76879 ,  H01L23/522 ,  H01L27/10855 ,  H01L27/10888 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electroless plating can be utilized to form electrical interconnects associated with semiconductor substrates. For instance, a semiconductor substrate can be formed to have a dummy structure thereover with a surface suitable for electroless plating, and to also have a digit line thereover having about the same height as the dummy structure. A layer can be formed over the dummy structure and digit line, and openings can be formed through the layer to the upper surfaces of the dummy structure and digit line. Subsequently, a conductive material can be electroless plated within the openings to form electrical contacts within the openings. The opening extending to the dummy structure can pass through a capacitor electrode, and accordingly the conductive material formed within such opening can be utilized to form electrical contact to the capacitor electrode.

摘要翻译： 可以利用无电镀形成与半导体衬底相关的电互连。 例如，半导体基板可以形成为具有适合于化学镀的表面的虚拟结构，并且还具有与虚拟结构大致相同的高度的数字线。 可以在虚拟结构和数字线上形成层，并且可以通过该层到虚拟结构和数字线的上表面形成开口。 随后，导电材料可以在开口内无电镀，以在开口内形成电接触。 延伸到虚拟结构的开口可以通过电容器电极，因此形成在该开口内的导电材料可用于与电容器电极形成电接触。

公开(公告)号：US06945855B2

公开(公告)日：2005-09-20

申请号：US10230550

申请日：2002-08-29

申请人： Scott E. Moore ,  Dinesh Chopra

发明人： Scott E. Moore ,  Dinesh Chopra

IPC分类号： B24B21/04 ,  B24B53/007 ,  B24B53/017 ,  H01L21/00 ,  B24B1/00

CPC分类号： B24B53/017 ,  B24B21/04 ,  H01L21/67051

摘要： A method and apparatus for cleaning a web-based chemical-mechanical planarization (CMP) system. Specifically, a fluid spray bar is coupled to a frame assembly which may be mounted on a CMP system. The fluid spray bar will move along the frame assembly. As the fluid spray bar traverses the length of the frame assembly, a cleaning fluid is sprayed onto the web in order to clean the web between planarization cycles.

公开(公告)号：US06932687B2

公开(公告)日：2005-08-23

申请号：US10772540

申请日：2004-02-05

申请人： Vishnu K. Agarwal ,  Dinesh Chopra

发明人： Vishnu K. Agarwal ,  Dinesh Chopra

IPC分类号： B24B37/22 ,  B24B37/26 ,  B24D3/28 ,  B24D11/00 ,  B24D18/00 ,  B24B1/00

CPC分类号： B24B37/22 ,  B24B37/26 ,  B24D3/28 ,  B24D11/001 ,  B24D18/0072

摘要： A planarizing pad for planarizing a microelectronic substrate, and a method and apparatus for forming the planarizing pad. In one embodiment, planarizing pad material is mixed with compressed gas to form a plurality of discrete elements that are distributed on a support material. At least a portion of the discrete elements are spaced apart from each other on the support material to form a textured surface for engaging a microelectronic substrate and removing material from the microelectronic substrate. The discrete elements can be uniformly or randomly distributed on the support material, and the discrete elements can be directly affixed to the support material or affixed to the support material with an adhesive.

摘要翻译： 用于平坦化微电子衬底的平坦化焊盘，以及用于形成平坦化焊盘的方法和装置。 在一个实施例中，平坦化焊盘材料与压缩气体混合以形成分布在支撑材料上的多个分立元件。 离散元件的至少一部分在支撑材料上彼此间隔开以形成纹理化表面，用于接合微电子衬底并从微电子衬底去除材料。 离散元件可以均匀地或随机地分布在支撑材料上，并且离散元件可以直接固定到支撑材料上或者用粘合剂固定到支撑材料上。

公开(公告)号：US20050020004A1

公开(公告)日：2005-01-27

申请号：US10923359

申请日：2004-08-20

申请人： Dinesh Chopra

发明人： Dinesh Chopra

IPC分类号： B23H5/08 ,  C25F3/02 ,  C25F7/00 ,  H01L21/321 ,  H01L21/326 ,  H01L21/768 ,  H01L21/78 ,  H01L21/8238

CPC分类号： H01L21/3213 ,  B23H5/08 ,  C25F3/02 ,  C25F3/30 ,  C25F7/00 ,  H01L21/32115 ,  H01L21/32125 ,  H01L21/32134 ,  H01L21/7684

摘要： A method and apparatus for simultaneously removing conductive materials from a microelectronic substrate. A method in accordance with one embodiment of the invention includes contacting a surface of a microelectronic substrate with an electrolytic liquid, the microelectronic substrate having first and second different conductive materials. The method can further include controlling a difference between a first open circuit potential of the first conducive material and a second open circuit potential of the second conductive material by selecting a pH of the electrolytic liquid. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a varying electrical signal through the electrolytic liquid and the conductive materials. Accordingly, the effects of galvanic interactions between the two conductive materials can be reduced and/or eliminated.

摘要翻译： 一种用于从微电子衬底同时去除导电材料的方法和装置。 根据本发明的一个实施例的方法包括使微电子衬底的表面与电解液接触，微电子衬底具有第一和第二不同的导电材料。 该方法还可以包括通过选择电解液的pH来控制第一导电材料的第一开路电位和第二导电材料的第二开路电位之间的差。 该方法还可以包括通过使变化的电信号通过电解液和导电材料同时去除第一和第二导电材料的至少一部分。 因此，可以减少和/或消除两种导电材料之间的电偶相互作用的影响。

公开(公告)号：US06736869B1

公开(公告)日：2004-05-18

申请号：US09649429

申请日：2000-08-28

申请人： Vishnu K. Agarwal ,  Dinesh Chopra

发明人： Vishnu K. Agarwal ,  Dinesh Chopra

IPC分类号： B24D300

CPC分类号： B24B37/22 ,  B24B37/26 ,  B24D3/28 ,  B24D11/001 ,  B24D18/0072

摘要： A planarizing pad for planarizing a microelectronic substrate, and a method and apparatus for forming the planarizing pad. In one embodiment, planarizing pad material is mixed with compressed gas to form a plurality of discrete elements that are distributed on a support material. At least a portion of the discrete elements are spaced apart from each other on the support material to form a textured surface for engaging a microelectronic substrate and removing material from the microelectronic substrate. The discrete elements can be uniformly or randomly distributed on the support material, and the discrete elements can be directly affixed to the support material or affixed to the support material with an adhesive.

摘要翻译： 用于平坦化微电子衬底的平坦化焊盘，以及用于形成平坦化焊盘的方法和装置。 在一个实施例中，平坦化焊盘材料与压缩气体混合以形成分布在支撑材料上的多个分立元件。 离散元件的至少一部分在支撑材料上彼此间隔开以形成纹理化表面，用于接合微电子衬底并从微电子衬底去除材料。 离散元件可以均匀地或随机地分布在支撑材料上，并且离散元件可以直接固定到支撑材料上或者用粘合剂固定到支撑材料上。

公开(公告)号：US06727175B2

公开(公告)日：2004-04-27

申请号：US10210932

申请日：2002-08-02

申请人： Dinesh Chopra

发明人： Dinesh Chopra

IPC分类号： H01L2144

CPC分类号： H01L21/76843 ,  H01L21/265 ,  H01L21/76859 ,  H01L21/76873 ,  H01L21/76879 ,  H01L2221/1089 ,  Y10S438/918 ,  Y10S438/946

摘要： The present invention is generally directed to various methods of using ion implantation techniques to control various metal formation processes. In one illustrative embodiment, the method includes forming a metal seed layer above a patterned layer of insulating material, the patterned layer of insulating material defining a plurality of field areas, deactivating at least a portion of the metal seed layer in areas where the metal seed layer is positioned above at least some of the field areas, and performing a deposition process to deposit a metal layer above the metal seed layer. In some embodiments, the metal may includes copper, platinum, nickel, tantalum, tungsten, cobalt, etc. Portions of the metal seed layer may be deactivated by implanting ions into portions of the metal seed layer positioned above at least some of the field areas. The implanted ions may includes nitrogen, carbon, silicon, hydrogen, etc. In yet another illustrative embodiment, the system includes stencil mask implant tool for implanting ions into selected areas of a metal seed layer formed above a patterned layer of insulating material that defines a plurality of field areas, the ions being implanted into areas of the metal seed layer positioned above at least some of the field areas.

摘要翻译： 本发明一般涉及使用离子注入技术来控制各种金属形成过程的各种方法。 在一个说明性实施例中，该方法包括在图案化绝缘材料层之上形成金属种子层，所述图案化的绝缘材料层限定多个场区域，在金属种子区域中去激活金属种子层的至少一部分 层位于至少一些场区域的上方，并且执行沉积工艺以在金属种子层上方沉积金属层。 在一些实施方案中，金属可以包括铜，铂，镍，钽，钨，钴等。金属种子层的一部分可以通过将离子注入位于至少一些场区域上方的金属种子层的部分中而失活 。 注入的离子可以包括氮，碳，硅，氢等。在另一个说明性实施例中，该系统包括用于将离子注入形成在图案化的绝缘材料层之上的金属种子层的选定区域中的模板掩模植入工具， 多个场区域，离子被植入位于至少一些场区域之上的金属种子层的区域中。