公开(公告)号：US09724803B2

公开(公告)日：2017-08-08

申请号：US14389540

申请日：2012-03-30

Applicant: Jian Wang ,  Yinuo Jin ,  Hui Wang

Inventor： Jian Wang ,  Yinuo Jin ,  Hui Wang

IPC: B24C5/04 ,  C25F7/00 ,  C25F3/30

CPC classification number: B24C5/04 ,  C25F3/30 ,  C25F7/00

Abstract: A nozzle for charging and ejecting electrolyte in SFP process is disclosed. The nozzle includes an insulated foundation defining a through-hole, a conductive body as negative electrode connecting with a power source for charging the electrolyte and an insulated nozzle head. The conductive body has a fixing portion located on the insulated foundation. The fixing portion forms a receiving portion inserted into the through-hole and defining a receiving hole passing therethrough. The insulated nozzle head has a cover assembled with the insulated foundation above the conductive body and a tube extending through the cover and defining a main fluid path through where the charged electrolyte is ejected for polishing. The tube is inserted in the receiving hole and stretches out of the receiving hole of the conductive body forming an auxiliary fluid path between an inner circumferential surface of the receiving portion and an outer circumferential surface of the tube.

公开(公告)号：US20140377953A1

公开(公告)日：2014-12-25

申请号：US14281606

申请日：2014-05-19

Applicant: Micron Technology, Inc.

Inventor： Dinesh Chopra

IPC: H01L21/3213

CPC classification number: H01L21/3213 ,  B23H5/08 ,  C25F3/02 ,  C25F3/30 ,  C25F7/00 ,  H01L21/32115 ,  H01L21/32125 ,  H01L21/32134 ,  H01L21/7684

Abstract: A method and apparatus for simultaneously removing conductive materials from a microelectronic substrate. A method in accordance with one embodiment of the invention includes contacting a surface of a microelectronic substrate with an electrolytic liquid, the microelectronic substrate having first and second different conductive materials. The method can further include controlling a difference between a first open circuit potential of the first conducive material and a second open circuit potential of the second conductive material by selecting a pH of the electrolytic liquid. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a varying electrical signal through the electrolytic liquid and the conductive materials. Accordingly, the effects of galvanic interactions between the two conductive materials can be reduced and/or eliminated.

Abstract translation: 一种用于从微电子衬底同时去除导电材料的方法和装置。 根据本发明的一个实施例的方法包括使微电子衬底的表面与电解液接触，微电子衬底具有第一和第二不同的导电材料。 该方法还可以包括通过选择电解液的pH来控制第一导电材料的第一开路电位和第二导电材料的第二开路电位之间的差。 该方法还可以包括通过使变化的电信号通过电解液和导电材料同时去除第一和第二导电材料的至少一部分。 因此，可以减少和/或消除两种导电材料之间的电偶相互作用的影响。

公开(公告)号：US08475636B2

公开(公告)日：2013-07-02

申请号：US12481503

申请日：2009-06-09

Applicant: Steven Mayer ,  Jingbin Feng ,  Zhian He ,  Jonathan Reid ,  Seshasayee Varadarajan

Inventor： Steven Mayer ,  Jingbin Feng ,  Zhian He ,  Jonathan Reid ,  Seshasayee Varadarajan

IPC: C25D17/12 ,  C25D21/12

CPC classification number: C25D17/12 ,  C23C18/1601 ,  C25D5/02 ,  C25D17/001 ,  C25D17/002 ,  C25D17/007 ,  C25D17/008 ,  C25D21/12 ,  C25D21/14 ,  C25F3/30 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/32125 ,  H01L21/6715 ,  H01L21/76873

Abstract: An apparatus for electroplating a layer of metal onto the surface of a wafer includes an ionically resistive ionically permeable element located in close proximity of the wafer and an auxiliary cathode located between the anode and the ionically resistive ionically permeable element. The ionically resistive ionically permeable element serves to modulate ionic current at the wafer surface. The auxiliary cathode is configured to shape the current distribution from the anode. The provided configuration effectively redistributes ionic current in the plating system allowing plating of uniform metal layers and mitigating the terminal effect.

Abstract translation: 用于将金属层电镀到晶片表面上的装置包括位于晶片附近的离子电离离子可渗透元件和位于阳极和离子电离性可离子渗透元件之间的辅助阴极。 离子电阻性离子渗透元件用于调节晶片表面处的离子电流。 辅助阴极被配置成使来自阳极的电流分布成形。 所提供的配置有效地重新分布电镀系统中的离子电流，允许电镀均匀的金属层并减轻终端效应。

公开(公告)号：US20100038584A1

公开(公告)日：2010-02-18

申请号：US12190897

申请日：2008-08-13

Applicant: Tianbao DU

Inventor： Tianbao DU

IPC: C09K13/00 ,  H01L21/302

CPC classification number: H01L21/32125 ,  C09G1/02 ,  C09K3/1463 ,  C25F3/30

Abstract: A polishing composition for electrochemical mechanical polishing a surface of an object in which the polishing composition contains a phosphate electrolyte such as a potassium phosphate, a chelating agent such as a potassium citrate, a corrosion inhibitor such as benzotriazole, an oxidizing agent such as hydrogen peroxide, and a solvent such as water. The polishing composition preferably further contains abrasive particles such as colloidal silica particles.

Abstract translation: 一种用于电化学机械抛光抛光组合物包含磷酸盐电解质如磷酸钾，螯合剂如柠檬酸钾，缓蚀剂如苯并三唑，氧化剂如过氧化氢的物体表面的抛光组合物 ，和溶剂如水。 抛光组合物优选还含有磨料颗粒如胶体二氧化硅颗粒。

公开(公告)号：US20090280588A1

公开(公告)日：2009-11-12

申请号：US12435947

申请日：2009-05-05

Applicant: Leo Mathew ,  Dharmesh Jawarani

Inventor： Leo Mathew ,  Dharmesh Jawarani

IPC: H01L21/3205 ,  H01L31/02 ,  H01L33/00 ,  H01L21/20

CPC classification number: H01L21/3063 ,  C25F3/30 ,  H01L21/02002 ,  H01L21/7806 ,  H01L31/1892 ,  H01L33/0079 ,  H01L2924/0002 ,  Y02E10/50 ,  H01L2924/00

Abstract: A method of forming an electronic device can include forming a metallic layer over a side of a workpiece including a substrate, a differential etch layer, and a semiconductor layer. The differential etch layer may lie between the substrate and the semiconductor layer, and the semiconductor layer may lie along the side of the workpiece. The process can further include selectively removing at least a majority of the differential etch layer from between the substrate and the semiconductor layer, and separating the semiconductor layer and the metallic layer from the substrate. The selective removal can be performed using a wet etching, dry etching, or electrochemical technique. In a particular embodiment, the same plating bath may be used for plating the metallic layer and selectively removing the differential etch layer.

Abstract translation: 形成电子器件的方法可以包括在包括衬底，差分蚀刻层和半导体层的工件的侧面上形成金属层。 差分蚀刻层可以位于衬底和半导体层之间，并且半导体层可以沿着工件的侧面。 该工艺还可以包括从衬底和半导体层之间选择性地去除差分蚀刻层的至少大部分，以及从衬底分离半导体层和金属层。 可以使用湿蚀刻，干法蚀刻或电化学技术来进行选择性去除。 在特定实施例中，可以使用相同的镀浴来镀覆金属层并选择性地去除差分蚀刻层。

公开(公告)号：US20090107851A1

公开(公告)日：2009-04-30

申请号：US12285615

申请日：2008-10-09

Applicant: Akira Kodera ,  Xinming Wang ,  Itsuki Kobata ,  Yasushi Toma

Inventor： Akira Kodera ,  Xinming Wang ,  Itsuki Kobata ,  Yasushi Toma

IPC: H01L21/3063 ,  H01L21/67

CPC classification number: H01L21/32125 ,  B23H5/08 ,  C25F3/30

Abstract: An electrolytic polishing method of a substrate having a barrier film and an interconnect metal layer on a surface to be processed under the presence of an electrolytic solution, including a barrier film electrolytic polishing process which removes the barrier film by applying a voltage between a cathode and an anode, with the surface to be processed serving as the cathode, and causing relative motion between the surface to be processed and a polishing pad which faces and makes contact with the surface to be processed.

Abstract translation: 一种在电解液存在下在待加工表面上具有阻挡膜和互连金属层的基板的电解抛光方法，该方法包括：通过在阴极与阴极之间施加电压来除去阻挡膜的阻挡膜电解抛光工艺; 阳极，待处理的表面用作阴极，并且引起待处理表面与抛光垫之间的相对运动，所述抛光垫面向并与待处理表面接触。

公开(公告)号：US20080142375A1

公开(公告)日：2008-06-19

申请号：US11864254

申请日：2007-09-28

Applicant: Francois Doniat ,  Matthew L. Fisher ,  Alan D. Zdunek ,  Alexandro A. Barajas ,  Ian Suni ,  Xiangfeng Chu ,  Abhinav Tripathi ,  Yuzhuo Li

Inventor： Francois Doniat ,  Matthew L. Fisher ,  Alan D. Zdunek ,  Alexandro A. Barajas ,  Ian Suni ,  Xiangfeng Chu ,  Abhinav Tripathi ,  Yuzhuo Li

IPC: B23H3/00

CPC classification number: C09G1/02 ,  C25F3/30 ,  H01L21/32125

Abstract: Compositions and methods suitable for the electrochemical mechanical planarization of a conductive material layer on a semiconductor workpiece. Compositions contain a phosphonic acid based electrolyte, a corrosion inhibitor, a chelating agent, a pH adjusting agent, and a solvent as the remainder.

Abstract translation: 适用于半导体工件上导电材料层的电化学机械平面化的组合物和方法。 组合物含有基于膦酸的电解质，腐蚀抑制剂，螯合剂，pH调节剂和作为其余的溶剂。

公开(公告)号：US07056194B2

公开(公告)日：2006-06-06

申请号：US10871126

申请日：2004-06-18

Applicant: Trung Tri Doan ,  Scott G. Meikle

Inventor： Trung Tri Doan ,  Scott G. Meikle

IPC: B24B1/00

CPC classification number: B24B37/11 ,  B23H5/08 ,  B24B37/042 ,  B24B37/046 ,  B24B37/20 ,  C25F3/30 ,  H01L21/3212 ,  H01L21/32125

Abstract: The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.

公开(公告)号：US20040188259A1

公开(公告)日：2004-09-30

申请号：US10817659

申请日：2004-04-02

Inventor： Gregory J. Wilson ,  Paul R. McHugh ,  Robert A. Weaver ,  Thomas L. Ritzdorf

IPC: C25D021/12 ,  C25D005/02

CPC classification number: C25D21/12 ,  C25D17/001 ,  C25F3/30

Abstract: A facility for selecting and refining electrical parameters for processing a microelectronic workpiece in a processing chamber is described. The facility initially configures the electrical parameters in accordance with either a mathematical model of the processing chamber or experimental data derived from operating the actual processing chamber. After a workpiece is processed with the initial parameter configuration, the results are measured and a sensitivity matrix based upon the mathematical model of the processing chamber is used to select new parameters that correct for any deficiencies measured in the processing of the first workpiece. These parameters are then used in processing a second workpiece, which may be similarly measured, and the results used to further refine the parameters. In some embodiments, the facility analyzes a profile of the seed layer applied to a workpiece, and determines and communicates to a material deposition tool a set of control parameters designed to deposit material on the workpiece in a manner that compensates for deficiencies in the seed layer.

Abstract translation: 描述了一种用于选择和精炼用于在处理室中处理微电子工件的电参数的设备。 该设备最初根据处理室的数学模型或从操作实际处理室得到的实验数据来初始配置电参数。 在用初始参数配置处理工件之后，测量结果，并且使用基于处理室的数学模型的灵敏度矩阵来选择校正在第一工件的处理中测量的任何缺陷的新参数。 然后将这些参数用于处理可以类似地测量的第二工件，并且用于进一步改进参数的结果。 在一些实施例中，设备分析施加到工件的种子层的轮廓，并且确定并传送材料沉积工具一组控制参数，这些控制参数被设计成以补偿种子层中的缺陷的方式在工件上沉积材料 。

公开(公告)号：US06790130B2

公开(公告)日：2004-09-14

申请号：US10600907

申请日：2003-06-20

Applicant: Trung Tri Doan ,  Scott G. Meikle

Inventor： Trung Tri Doan ,  Scott G. Meikle

IPC: B24B100

CPC classification number: B24B37/11 ,  B23H5/08 ,  B24B37/042 ,  B24B37/046 ,  B24B37/20 ,  C25F3/30 ,  H01L21/3212 ,  H01L21/32125

Abstract: The invention includes a semiconductive processing method of electrochemical-mechanical removing at least some of a conductive material from over a surface of a semiconductor substrate. A cathode is provided at a first location of the wafer, and an anode is provided at a second location of the wafer. The conductive material is polished with the polishing pad polishing surface. The polishing occurs at a region of the conductive material and not at another region. The region where the polishing occurs is defined as a polishing operation location. The polishing operation location is displaced across the surface of the substrate from said second location of the substrate toward said first location of the substrate. The polishing operation location is not displaced from said first location toward said second location when the polishing operation location is between the first and second locations. The invention also includes a semiconductor processing method of removing at least some of a conductive material from over a surface of a semiconductive material wafer. A polishing pad is displaced across an upper surface of the wafer from a central region of the wafer toward a periphery of the wafer, and is not displaced from the periphery to the central region.