公开(公告)号：US11703901B2

公开(公告)日：2023-07-18

申请号：US17737692

申请日：2022-05-05

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Jean Camiolo ,  Alexandre Pons

IPC: G05F1/575 ,  G01R19/165 ,  G05F3/18 ,  G06F1/26 ,  H03F3/45 ,  H03K3/0233 ,  G05F1/56

CPC classification number: G05F1/575 ,  G01R19/16528 ,  G05F1/56 ,  G05F3/185 ,  G06F1/266 ,  H03F3/45076 ,  H03K3/02337

Abstract: A first terminal receives a first DC voltage. A switch selectively couples the first terminal to a second terminal providing an output. A control circuit selectively actuates the switch in response to a comparison of the first DC voltage to a second DC voltage. A low-dropout (LDO) linear voltage regulator, connected between the first and third terminals, operates to provide the second DC voltage from the first DC voltage.

公开(公告)号：US11675679B2

公开(公告)日：2023-06-13

申请号：US16787508

申请日：2020-02-11

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Jean Camiolo

IPC: G06F11/22 ,  G06F13/38 ,  G01R31/50 ,  G06F1/26

CPC classification number: G06F11/221 ,  G01R31/50 ,  G06F1/26 ,  G06F13/382 ,  G06F2213/0042

Abstract: An apparatus is for testing a device to be supplied with power via USB Power Delivery (USB-PD). The apparatus includes at least one USB Type-C connector configured to be connected to the device to be supplied with power to be tested, the at least one USB Type-C connector including a power supply terminal. Processing circuitry of the apparatus is configured to verify that a voltage at the power supply terminal is lower than a first threshold, verify a role of the device, generate requests representative of power supply configurations supported by the role of the device, and verify compatibility of the power supply configurations supported by the device with standardized power supply configurations.

公开(公告)号：US11664475B2

公开(公告)日：2023-05-30

申请号：US17090461

申请日：2020-11-05

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Karine Saxod ,  Nicolas Mastromauro

IPC: H01L31/14 ,  G01S7/484 ,  G01S7/4865 ,  H01L31/0203 ,  H01L33/52 ,  H01L31/18 ,  H01L33/00

CPC classification number: H01L31/143 ,  G01S7/484 ,  G01S7/4865 ,  H01L31/0203 ,  H01L31/18 ,  H01L33/005 ,  H01L33/52 ,  H01L2933/005

Abstract: A carrier substrate is configured to carry at least one electronic chip and includes a mounting front face. An encapsulating cover is mounted on the front face of the carrier substrate through a mounting. This mounting includes at least one seating surface through which the cover and the carrier substrate make contact. At least one adhesive bead is located elsewhere than the seating surface in order to securely fasten the encapsulation cover and the carrier substrate.

公开(公告)号：US11663697B2

公开(公告)日：2023-05-30

申请号：US17165778

申请日：2021-02-02

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Gregory Roffet ,  Stephane Drouard ,  Roger Monteith

IPC: G06T3/40 ,  G06T7/00 ,  G01S17/894

CPC classification number: G06T3/4038 ,  G01S17/894 ,  G06T7/97 ,  G06T2200/32 ,  G06T2207/10016

Abstract: A device for assembling at least two shots of a scene acquired by at least one sensor includes a memory and processing circuitry. The processing circuitry is configured to save, in the memory, a first data set contained in a first signal generated by each pixel of the sensor and indicative of a first shot of the scene, and a second data set contained in a second signal generated by each pixel of the sensor and indicative of a second shot of the scene. The processing circuitry is further configured to assemble the first and second shots on the basis of the content of the first and second data sets of a plurality of pixels in order to form a resulting scene.

公开(公告)号：US11653441B2

公开(公告)日：2023-05-16

申请号：US16951695

申请日：2020-11-18

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grenoble 2) SAS

Inventor： Julien Didion ,  Thierry Lapergue

IPC: H05K1/02 ,  H04B1/16 ,  H05K1/18

CPC classification number: H05K1/025 ,  H04B1/16 ,  H05K1/181 ,  H05K2201/09272 ,  H05K2201/09281 ,  H05K2201/10045 ,  H05K2201/10098

Abstract: A device includes a printed circuit board substrate, an antenna connected to the printed circuit board substrate, an amplifier connected to the printed circuit board substrate, and a matching track having a first end electrically connected to an input of the amplifier and a second end electrically connected to an output of the antenna. The matching track has an outgrowth that is symmetrical along a median axis of the outgrowth. The matching track is rectilinear and has a constant width over an initial part extending between the widening area and the first end. A median axis of the initial part and the median axis of the outgrowth form an angle comprised between 60 and 120°.

公开(公告)号：US11650738B2

公开(公告)日：2023-05-16

申请号：US17111778

申请日：2020-12-04

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Gerald Briat ,  Stephane Marmey

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0652 ,  G06F3/0659 ,  G06F3/0679

Abstract: The integrity of a memory is checked by: storing data representative of an operation to be executed in the memory; executing the operation; and erasing the data once the execution is complete.

公开(公告)号：US20230145151A1

公开(公告)日：2023-05-11

申请号：US18052478

申请日：2022-11-03

Applicant: STMicroelectronics (Grenoble 2) SAS

Inventor： Laurent Simony

IPC: H04N25/709 ,  H02M3/155 ,  H04N25/77

CPC classification number: H04N25/709 ,  H02M3/155 ,  H04N25/77

Abstract: In accordance with an embodiment, a power supply circuit includes: a first transistor device comprising a first gate associated with a first transconductance and a second gate associated with a transconductance greater than the first transconductance; and a second transistor device including a third gate associated with a second transconductance and a fourth gate associated with a transconductance greater than the second transconductance. The second transistor device is configured to supply power to at least one load, the first and the third gates are controlled by a closed regulation loop, and the second and the fourth gates are controlled by a sampled reference voltage.

公开(公告)号：US20230140705A1

公开(公告)日：2023-05-04

申请号：US17970327

申请日：2022-10-20

Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

Inventor： Younes BOUTALEB ,  Romain COFFY

IPC: H01L23/367 ,  H01L21/52 ,  H01L23/498

Abstract: The present description concerns an electronic device comprising an electronic chip and a package for protecting said chip, said package comprising: a substrate comprising an alternation of electrically-insulating layers and of thermally-conductive layers where at least one electrically-insulating layer comprises at least a thermally-conductive portion; and a cover made of a thermally-conductive material comprising at least one lateral portion arranged in at least one cavity formed from a first surface of said substrate.

公开(公告)号：US11641523B2

公开(公告)日：2023-05-02

申请号：US17452512

申请日：2021-10-27

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics SA

Inventor： Arnaud Bourge ,  Tarek Lule ,  Gregory Roffet

IPC: H04N5/235 ,  H04N5/355 ,  H04N5/353 ,  H01L27/146

Abstract: An image sensor includes a plurality of pixels, where each of the plurality of pixels includes a photodiode. The image sensor is configured to capture images of a scene exposed with a flickering light source by for each of the plurality of pixels, acquiring a value representative of a light level at a corresponding pixel by gradually varying a value of sensitivity of the corresponding pixel.

公开(公告)号：US20230113667A1

公开(公告)日：2023-04-13

申请号：US18065475

申请日：2022-12-13

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Jawad Benhammadi ,  Sylvain Meyer

IPC: G06F13/24 ,  G06F13/16 ,  G06F21/85 ,  H03K19/20 ,  G06F1/3237

Abstract: In accordance with an embodiment, an electronic device includes: an interrupt controller having an input for receiving a controller clock signal, and an output, the interrupt controller configured to deliver an output interrupt signal on the output when the controller clock signal is active, and a control circuit comprising, an input interface for receiving at least one interrupt signal likely to emanate from at least one item of equipment external to the device, a clock input for receiving an external clock signal, and a first controller connected to the input interface and to the clock input, the first controller configured to automatically generate the controller clock signal from the external clock signal from when the at least one interrupt signal is asserted until a delivery of a corresponding output interrupt signal.