公开(公告)号：US06867340B2

公开(公告)日：2005-03-15

申请号：US10268649

申请日：2002-10-10

Applicant: Seung-Hoon Oh ,  Sang-Il Lee ,  Kyoung-Hak Seong ,  Sang-Hoon Park

Inventor： Seung-Hoon Oh ,  Sang-Il Lee ,  Kyoung-Hak Seong ,  Sang-Hoon Park

IPC: B01J29/18 ,  B01J29/22 ,  B01J29/40 ,  B01J29/44 ,  B01J29/70 ,  B01J29/80 ,  B01J37/00 ,  C07C6/12 ,  C07C15/02 ,  C07C15/08

CPC classification number: C07C6/126 ,  B01J29/18 ,  B01J29/22 ,  B01J29/40 ,  B01J29/44 ,  B01J29/7007 ,  B01J29/80 ,  B01J37/0009 ,  B01J2229/26 ,  B01J2229/42 ,  C07C6/123 ,  C07C2521/04 ,  C07C2521/12 ,  C07C2529/18 ,  C07C2529/22 ,  C07C2529/40 ,  C07C2529/44 ,  C07C2529/70 ,  C07C2529/74 ,  Y02P20/52

Abstract: A catalyst for the disproportionation/transalkylation of various hydrocarbons consists of a carrier and a metal component supported on the carrier. The carrier comprises 10 to 80 wt % of mordenite and/or beta type zeolite with a mole ratio of silica/alumina ranging from 10 to 200; 0 to 70 wt % of ZSM-5 type zeolite with a mole ratio of silica/alumina ranging from 30 to 500; and 5 to 90 wt % of at least one inorganic binder selected from the group consisting of gamma-alumina, silica, silica alumina, bentonite, kaolin, clinoptilolite, and montmorillonite. The metal component comprises platinum and either tin or lead. The catalyst enables mixed xylenes to be produced at remarkably high yields from benzene, toluene and C9 or higher aromatic compounds through disproportionation/transalkylation with a great reduction in aromatic loss. In addition, the catalyst can maintain its catalytic activity for a long period of time without deactivation.

Abstract translation: 用于各种烃的歧化/烷基转移的催化剂由负载在载体上的载体和金属组分组成。 载体包含10至80重量％的二氧化硅/氧化铝的摩尔比为10至200的丝光沸石和/或β型沸石; 0〜70重量％的二氧化硅/氧化铝摩尔比为30〜500的ZSM-5型沸石; 和5至90重量％的至少一种选自γ-氧化铝，二氧化硅，二氧化硅氧化铝，膨润土，高岭土，斜发沸石和蒙脱石的无机粘合剂。 金属组分包括铂和锡或铅。 该催化剂能够通过歧化/烷基转移从苯，甲苯和C9或更高级芳族化合物以非常高的收率产生混合二甲苯，并大大降低芳族损失。 此外，催化剂可以长时间保持其催化活性而不失活。

公开(公告)号：US06723580B2

公开(公告)日：2004-04-20

申请号：US09964156

申请日：2001-09-25

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L2100

CPC classification number: H01L27/14689 ,  H01L27/14603 ,  H01L27/14609

Abstract: The present invention relates to a pinned photodiode used in a CMOS image sensor. The pinned photodiode according to the present invention has an uneven surface for increasing an area of a PN junction of the photodiode. So, the increased PN junction area improves a light sensitivity of the photodiode. That is, the epitaxial layer, in which the photodiode is formed, has a trench or a protrusion. Also, in the pinned photodiode, since the P0 diffusion layer is directly in contact with the P-epi layer, the two P-type layers have the same potential and then it may operate in a low voltage.

公开(公告)号：US06563187B1

公开(公告)日：2003-05-13

申请号：US09342343

申请日：1999-06-29

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L3100

CPC classification number: H01L27/14643 ,  G11C13/04 ,  H01L27/10814 ,  H01L27/10873 ,  H01L27/10894 ,  H01L27/14609 ,  H01L27/14634

Abstract: The present invention relates to a CMOS (Complementary Metal Oxide Silicon) image sensor; and, more particularly, to an image sensor integrated into one chip, together with a memory. The CMOS image sensor according to the present invention comprises: a pixel array formed on a chip, having a plurality of unit pixels; a logic circuit formed on the chip to process signals form the pixel array; and a memory formed on the chip to store outputs from the logic circuit, wherein the pixel array, the logic circuit and the memory are isolated from each other by insulating layers, whereby the pixel array, the logic circuit and the memory are integrated on the same chip.

Abstract translation: 本发明涉及CMOS（互补金属氧化物硅）图像传感器; 更具体地，涉及与存储器一起集成到一个芯片中的图像传感器。 根据本发明的CMOS图像传感器包括：形成在芯片上的具有多个单位像素的像素阵列; 形成在芯片上以处理由像素阵列构成的信号的逻辑电路; 以及形成在所述芯片上的用于存储来自所述逻辑电路的输出的存储器，其中所述像素阵列，所述逻辑电路和所述存储器通过绝缘层彼此隔离，由此所述像素阵列，所述逻辑电路和所述存储器被集成在 相同的芯片

公开(公告)号：US06329679B1

公开(公告)日：2001-12-11

申请号：US09342344

申请日：1999-06-29

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L31062

CPC classification number: H01L27/14689 ,  H01L27/14603 ,  H01L27/14609

Abstract: The present invention relates to a pinned photodiode used in a CMOS image sensor. The pinned photodiode according to the present invention has an uneven surface for increasing an area of a PN junction of the photodiode. So, the increased PN junction area improves a light sensitivity of the photodiode. That is, the epitaxial layer, in which the photodiode is formed, has a trench or a protrusion. Also, in the pinned photodiode, since the P0 diffusion layer is directly in contact with the P-epi layer, the two P-type layers have the same potential and then it may operate in a low voltage.

Abstract translation: 本发明涉及CMOS图像传感器中使用的钉扎光电二极管。 根据本发明的钉扎光电二极管具有用于增加光电二极管的PN结的面积的不平坦表面。 因此，增加的PN结面积提高了光电二极管的光灵敏度。 也就是说，其中形成光电二极管的外延层具有沟槽或突起。 此外，在pined光电二极管中，由于P0扩散层与P-epi层直接接触，所以两个P型层具有相同的电位，然后可以在低电压下工作。

公开(公告)号：US06218210B1

公开(公告)日：2001-04-17

申请号：US09342968

申请日：1999-06-29

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L2100

CPC classification number: H01L27/14609 ,  H01L27/14689

Abstract: The present invention is to provide a method for fabricating a CMOS image sensor, including, the steps of providing a semiconductor layer of a first conductive type; exposing a portion of the semiconductor layer, thereby defining a light sensing area in which a photodiode is formed; growing an epitaxial layer on the exposed semiconductor layer; implanting impurities of a second conductive type into the grown epitaxial layer, thereby forming a second type diffusion layer; implanting impurities of the first conductive type into the grown epitaxial layer so that a first type diffusion layer is formed in the second type diffusion layer, wherein a thickness of the first conductive diffusion layer formed is thinner than that of the second type conductive diffusion layer; and patterning the grown epitaxial layer.

Abstract translation: 本发明提供一种制造CMOS图像传感器的方法，包括提供第一导电类型的半导体层的步骤; 暴露半导体层的一部分，从而限定其中形成光电二极管的光感测区域; 在暴露的半导体层上生长外延层; 将第二导电类型的杂质注入生长的外延层中，从而形成第二类型扩散层; 将第一导电类型的杂质注入生长的外延层中，使得在第二类型扩散层中形成第一类型扩散层，其中形成的第一导电扩散层的厚度比第二类型的扩散层的厚度薄; 并构图生长的外延层。

公开(公告)号：US5931377A

公开(公告)日：1999-08-03

申请号：US951256

申请日：1997-10-16

Applicant: Woo Kang ,  Sang-Hoon Park ,  Hyoung-Woo Roh

Inventor： Woo Kang ,  Sang-Hoon Park ,  Hyoung-Woo Roh

IPC: B60H1/32 ,  B60H1/00 ,  F25B41/06 ,  G05D16/06 ,  F25B41/04

CPC classification number: F25B41/062 ,  B60H1/00485 ,  F25B2341/0683

Abstract: A block type expansion valve for use in a vehicular air conditioning system has a dampening spring to dampen movements of a diaphragm within a diaphragm chamber. The dampening spring is fixed to an upper fixing member positioned on an adjusting hollow thread and a lower fixing members positioned on the diaphragm. The adjusting hollow thread is engaged into a cylindrical thread member to allow a level of biasing force of the dampening spring to be adjusted.

Abstract translation: 用于车辆空调系统的块式膨胀阀具有阻尼弹簧以阻尼隔膜室内的隔膜的运动。 阻尼弹簧固定在定位在调节中空线上的上固定构件和位于隔膜上的下固定构件。 调节中空线接合到圆柱形螺纹构件中，以允许调节润版弹簧的偏压力水平。

公开(公告)号：US5930670A

公开(公告)日：1999-07-27

申请号：US747794

申请日：1996-11-14

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L21/28 ,  H01L21/768

CPC classification number: H01L21/76877 ,  Y10S438/906

Abstract: The present invention relates to a method of forming a tungsten plug of a semiconductor device. After forming the tungsten plug in the contact hole, a tungsten residue existed in a portion except a contact hole is oxidized by oxidation and removed. The oxidation process is performed using a chemical mixture of hydrogen peroxide and ultrapure water. A metal wiring pattern including a reflection prevention layer can also be provided on the tungsten plug prior to the residue oxidation and removal.

Abstract translation: 本发明涉及形成半导体器件的钨丝塞的方法。 在接触孔中形成钨插塞后，除了接触孔氧化并除去之外，部分存在钨残留物。 使用过氧化氢和超纯水的化学混合物进行氧化处理。 在残留氧化和除去之前，也可以在钨丝塞上设置包括防反射层的金属布线图案。

公开(公告)号：US5786229A

公开(公告)日：1998-07-28

申请号：US579880

申请日：1995-12-28

Applicant: Sang-Hoon Park

Inventor： Sang-Hoon Park

IPC: H01L21/316 ,  H01L21/76 ,  H01L21/762 ,  H01L21/761

CPC classification number: H01L21/76224 ,  Y10S148/05

Abstract: A method for isolation between semiconductor devices includes the steps of: forming sequentially a first oxide film and silicon nitride layer on a silicon substrate; forming a first photoresist pattern on the nitride layer where field oxide is not to be formed; etching the exposed nitride to predetermined depth; stripping the first photoresist film; oxidizing the resultant wafer of the above step until a second oxide grows on the etched silicon substrate and extends itself from the region of the patterned nitride and first oxide layer to a predetermined outward distance; forming a second photoresist film at the portions excepting the surface of the nitride layer; etching the nitride layer, the first oxide layer and a portion of second oxide positioned at the vertical downward direction under the first oxide; stripping the second photoresist film, growing epitaxially the exposed portion of the etched silicon substrate; depositing an insulating layer on the resultant structure of the above step and polishing the deposited insulating layer until the epitaxial layer is exposed.

Abstract translation: 半导体器件之间的隔离方法包括以下步骤：在硅衬底上依次形成第一氧化膜和氮化硅层; 在不形成场氧化物的氮化物层上形成第一光致抗蚀剂图案; 将暴露的氮化物蚀刻到预定深度; 剥离第一光致抗蚀剂膜; 氧化上述步骤的所得晶片，直到第二氧化物在蚀刻的硅衬底上生长并且从图案化氮化物和第一氧化物层的区域自身延伸到预定的向外距离; 在除了氮化物层的表面之外的部分处形成第二光致抗蚀剂膜; 在所述第一氧化物下蚀刻所述氮化物层，所述第一氧化物层和位于所述垂直向下方向的第二氧化物的一部分; 剥离第二光致抗蚀剂膜，外延生长蚀刻的硅衬底的暴露部分; 在上述步骤的合成结构上沉积绝缘层，并研磨沉积的绝缘层，直到外延层露出。

公开(公告)号：US5668043A

公开(公告)日：1997-09-16

申请号：US605691

申请日：1996-02-22

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L21/31 ,  H01L21/76 ,  H01L21/762

CPC classification number: H01L21/76294 ,  H01L21/76237

Abstract: The present invention provides a method for forming a field oxide layer without the use of the LOCOS process. Accordingly, the present invention provides a superior effect capable of increasing the active region and improving the integration of semiconductor devices, preventing the bird's beak from being generated. Also, in the present invention, since the width of the field oxide layer is the same as that of a spacer on the sidewall of the insulating layer, the area of the field oxide layer is minimized.

Abstract translation: 本发明提供了不使用LOCOS工艺形成场氧化物层的方法。 因此，本发明提供了能够增加有源区域并提高半导体器件的集成的优异效果，防止了鸟嘴的产生。 此外，在本发明中，由于场氧化物层的宽度与绝缘层的侧壁上的间隔物的宽度相同，因此场氧化物层的面积最小化。

公开(公告)号：US5661327A

公开(公告)日：1997-08-26

申请号：US665048

申请日：1996-06-12

Applicant: Sang Hoon Park

Inventor： Sang Hoon Park

IPC: H01L23/522 ,  H01L21/265 ,  H01L21/336 ,  H01L21/768 ,  H01L29/08 ,  H01L29/417 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC classification number: H01L29/66606 ,  H01L29/0847 ,  H01L29/41775 ,  H01L2924/0002

Abstract: A transistor including an insulating film, a gate, and a source/drain all formed on a semiconductor substrate, wherein the gate overlaps at an edge thereof with the source/drain disposed below the gate, whereby the transistor has a structure capable of avoiding a direct contact between the metal wiring and the source/drain. The gate is formed after a formation of the source/drain.

Abstract translation: 一种晶体管，其包括全部形成在半导体衬底上的绝缘膜，栅极和源极/漏极，其中栅极在其边缘处重叠，源/漏极设置在栅极下方，由此晶体管具有能够避免 金属布线与源极/漏极之间的直接接触。 在形成源极/漏极之后形成栅极。