UNEVEN WEAR LEVELING IN ANALOG MEMORY DEVICES
    41.
    发明申请
    UNEVEN WEAR LEVELING IN ANALOG MEMORY DEVICES 有权
    在模拟记忆体设备中耐磨损

    公开(公告)号:US20150012686A1

    公开(公告)日:2015-01-08

    申请号:US13935746

    申请日:2013-07-05

    Applicant: Apple Inc.

    CPC classification number: G06F12/0246 G06F2212/7211

    Abstract: A method for data storage in a memory that includes multiple analog memory cells, includes defining, based on a characteristic of the memory cells, an uneven wear leveling scheme that programs and erases at least first and second subsets of the memory cells with respective different first and second Programming and Erasure (P/E) rates. Data is stored in the memory in accordance with the uneven wear leveling scheme.

    Abstract translation: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法,包括基于所述存储器单元的特性定义不均匀磨损平衡方案,所述不均匀磨损均衡方案以相应不同的第一方式来编程和擦除所述存储器单元的至少第一和第二子集 和第二个编程和擦除(P / E)率。 根据不均匀的磨损均衡方案将数据存储在存储器中。

    ENHANCED DATA STORAGE IN 3-D MEMORY USING STRING-SPECIFIC SOURCE-SIDE BIASING
    43.
    发明申请
    ENHANCED DATA STORAGE IN 3-D MEMORY USING STRING-SPECIFIC SOURCE-SIDE BIASING 有权
    3-D存储器中的数据存储增强使用特定的源极偏置

    公开(公告)号:US20140313832A1

    公开(公告)日:2014-10-23

    申请号:US13865351

    申请日:2013-04-18

    Applicant: APPLE INC.

    CPC classification number: G11C16/10 G11C16/0483 G11C16/3454 G11C16/3459

    Abstract: A method includes storing data in a memory, which includes multiple strings of analog memory cells arranged in a three-dimensional (3-D) configuration having a first dimension associated with bit lines, a second dimension associated with word lines and a third dimension associated with sections, such that each string is associated with a respective bit line and a respective section and includes multiple memory cells that are connected to the respective word lines. For a group of the strings, respective values of a property of the strings in the group are evaluated. Source-side voltages are calculated for the respective strings in the group, depending on the respective values of the property, and respective source-sides of the strings in the group are biased with the corresponding source-side voltages. A memory operation is performed on the strings in the group while the strings are biased with the respective source-side voltages.

    Abstract translation: 一种方法包括将数据存储在存储器中,其包括以具有与位线相关联的第一维度的三维(3-D)配置布置的多个模拟存储器单元串,与字线相关联的第二维度和与第三维度相关联的第三维度 具有部分,使得每个字符串与相应的位线和相应的部分相关联,并且包括连接到各个字线的多个存储器单元。 对于一组字符串,对组中字符串的属性的各个值进行评估。 根据属性的各个值,针对组中的各个串来计算源侧电压,并且组中的串的各个源侧被相应的源极侧电压偏置。 当串被相应的源侧电压偏置时,对组中的串执行存储器操作。

    Inter-word-line programming in arrays of analog memory cells
    44.
    发明授权
    Inter-word-line programming in arrays of analog memory cells 有权
    模拟存储器单元阵列中的字间行编程

    公开(公告)号:US08824214B2

    公开(公告)日:2014-09-02

    申请号:US13709267

    申请日:2012-12-10

    Applicant: Apple Inc.

    Abstract: A method includes selecting a word line for programming in an array of analog memory cells that are arranged in rows associated with respective word lines and columns associated with respective bit lines. Word-line voltages, which program the memory cells in the selected word line, are applied to the respective word lines. Bit-line voltages, which cause one or more additional memory cells outside the selected word line to be programmed as a result of programming the selected word line, are applied to the respective bit lines. Using the applied word-line and bit-line voltages, data is stored in the memory cells in the selected word line and the additional memory cells are simultaneously programmed.

    Abstract translation: 一种方法包括选择用于在与相应字线相关联的行中排列的模拟存储器单元阵列中编程的字线,所述行与相应位线相关联。 将所选字线中的存储单元编程的字线电压施加到相应的字线。 将所选择的字线外部的一个或多个附加存储单元作为所选字线编程的结果编程的位线电压被施加到相应的位线。 使用所应用的字线和位线电压,将数据存储在所选字线中的存储单元中,并且附加存储单元被同时编程。

    ADAPTIVE OVER-PROVISIONING IN MEMORY SYSTEMS
    45.
    发明申请
    ADAPTIVE OVER-PROVISIONING IN MEMORY SYSTEMS 有权
    存储系统中的自适应过度配置

    公开(公告)号:US20140122787A1

    公开(公告)日:2014-05-01

    申请号:US14150212

    申请日:2014-01-08

    Applicant: Apple Inc.

    Abstract: A method for data storage includes, in a memory that includes multiple memory blocks, specifying at a first time a first over-provisioning overhead, and storing data in the memory while retaining in the memory blocks memory areas, which do not hold valid data and whose aggregated size is at least commensurate with the specified first over-provisioning overhead. Portions of the data from one or more previously-programmed memory blocks containing one or more of the retained memory areas are compacted. At a second time subsequent to the first time, a second over-provisioning overhead, different from the first over-provisioning overhead, is specified, and data storage and data portion compaction is continued while complying with the second over-provisioning overhead.

    Abstract translation: 一种用于数据存储的方法包括在包括多个存储器块的存储器中,在第一时间指定第一过度供应开销,并且将数据存储在存储器中,同时保留存储器块,其不保存有效数据, 其聚合大小至少与指定的第一超额配置开销相称。 包含一个或多个保留的存储区域的一个或多个预先编程的存储块的数据的部分被压缩。 在第一次之后的第二时间,指定与第一过度供应开销不同的第二过度供应开销,并且在遵循第二过度供应开销的同时继续数据存储和数据部分压缩。

    FAST ANALOG MEMORY CELL READOUT USING MODIFIED BIT-LINE CHARGING CONFIGURATIONS
    46.
    发明申请
    FAST ANALOG MEMORY CELL READOUT USING MODIFIED BIT-LINE CHARGING CONFIGURATIONS 有权
    使用改进的位线充电配置的快速模拟存储器单元读数

    公开(公告)号:US20140052940A1

    公开(公告)日:2014-02-20

    申请号:US13709656

    申请日:2012-12-10

    Applicant: APPLE INC.

    CPC classification number: G06F12/00 G06F12/02

    Abstract: A method for data storage includes providing at least first and second readout schemes for reading storage values from a group of analog memory cells that are connected to respective bit lines. The first readout scheme reads the storage values using a first bit line charging configuration having a first sense time, and the second readout scheme reads the storage values using a second bit line charging configuration having a second sense time, shorter than the first sense time. A condition is evaluated with respect to a read operation that is to be performed over a group of the memory cells. One of the first and second readout schemes is selected responsively to the evaluated condition. The storage values are read from the group of the memory cells using the selected readout scheme.

    Abstract translation: 一种用于数据存储的方法包括提供至少第一和第二读出方案,用于从连接到各个位线的一组模拟存储器单元读取存储值。 第一读出方案使用具有第一感测时间的第一位线充电配置读取存储值,并且第二读出方案使用比第一感测时间短的具有第二感测时间的第二位线充电配置来读取存储值。 针对要在一组存储器单元上执行的读取操作来评估条件。 响应于评估条件选择第一和第二读出方案中的一个。 使用所选择的读出方案从存储器单元的组中读取存储值。

    Adaptive over-provisioning in memory systems
    47.
    发明授权
    Adaptive over-provisioning in memory systems 有权
    内存系统中的自适应过度配置

    公开(公告)号:US08650461B2

    公开(公告)日:2014-02-11

    申请号:US13908018

    申请日:2013-06-03

    Applicant: Apple Inc.

    Abstract: A method for data storage includes, in a memory that includes multiple memory blocks, specifying at a first time a first over-provisioning overhead, and storing data in the memory while retaining in the memory blocks memory areas, which do not hold valid data and whose aggregated size is at least commensurate with the specified first over-provisioning overhead. Portions of the data from one or more previously-programmed memory blocks containing one or more of the retained memory areas are compacted. At a second time subsequent to the first time, a second over-provisioning overhead, different from the first over-provisioning overhead, is specified, and data storage and data portion compaction is continued while complying with the second over-provisioning overhead.

    Abstract translation: 一种用于数据存储的方法包括在包括多个存储器块的存储器中,在第一时间指定第一过度供应开销,并且将数据存储在存储器中,同时保留存储器块,其不保存有效数据, 其聚合大小至少与指定的第一超额配置开销相称。 包含一个或多个保留的存储区域的一个或多个预先编程的存储块的数据的部分被压缩。 在第一次之后的第二时间,指定与第一过度供应开销不同的第二过度供应开销,并且在遵循第二过度供应开销的同时继续数据存储和数据部分压缩。

    Handling malfunction in a memory system comprising a nonvolatile memory by monitoring bad-block patterns

    公开(公告)号:US10936456B1

    公开(公告)日:2021-03-02

    申请号:US16280090

    申请日:2019-02-20

    Applicant: Apple Inc.

    Abstract: A controller includes an interface and storage circuitry. The interface communicates with one or more memory devices, each of the memory devices includes multiple memory cells organized in memory blocks. The storage circuitry is configured to perform multiple storage operations to the memory cells in the one or more memory devices, and mark memory blocks in which one or more storage operations have failed as bad blocks. The controller is further configured to identify a pattern of multiple bad blocks occurring over a sequence of multiple consecutive storage operations, the pattern is indicative of a system-level malfunction in a memory system including the controller, and in response to identifying the pattern, to perform a corrective action to the memory system.

    Programming Schemes for Multi-Level Analog Memory Cells
    49.
    发明申请
    Programming Schemes for Multi-Level Analog Memory Cells 审中-公开
    多级模拟存储单元的编程方案

    公开(公告)号:US20160372184A1

    公开(公告)日:2016-12-22

    申请号:US15256992

    申请日:2016-09-06

    Applicant: Apple Inc.

    Abstract: A method for data storage includes storing first data bits in a set of multi-bit analog memory cells at a first time by programming the memory cells to assume respective first programming levels. Second data bits are stored in the set of memory cells at a second time that is later than the first time by programming the memory cells to assume respective second programming levels that depend on the first programming levels and on the second data bits. A storage strategy is selected responsively to a difference between the first and second times. The storage strategy is applied to at least one group of the data bits, selected from among the first data bits and the second data bits.

    Abstract translation: 一种用于数据存储的方法包括:通过对存储器单元进行编程来采用各自的第一编程级别,来将第一数据位在第一时间存储在一组多位模拟存储单元中。 第二数据位通过对存储器单元进行编程以采取依赖于第一编程电平和第二数据位的相应的第二编程电平而在比第一时间晚的第二时间存储在存储单元组中。 响应于第一次和第二次之间的差异选择存储策略。 将存储策略应用于从第一数据位和第二数据位中选择的至少一组数据位。

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