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41.发明公开公开(公告)号：US20240237555A9
公开(公告)日：2024-07-11
申请号：US18277688
申请日：2022-02-17
Applicant: D-WAVE SYSTEMS INC.
Inventor： Colin C. Enderud , Mohammad H. Amin , Loren J. Swenson
IPC: H10N60/01 , H01L23/522 , H01L23/532 , H01L25/18 , H10N60/12 , H10N60/80 , H10N69/00
CPC classification number: H10N60/0912 , H01L23/5223 , H01L23/5227 , H01L23/53285 , H01L25/18 , H10N60/12 , H10N60/805 , H10N69/00
Abstract: A method of fabrication of a superconducting device includes forming a first portion of the superconducting device on a first chip, a second portion of the superconducting device on a second chip, and bonding the first chip to the second chip, arranged in a flip-chip configuration. The first portion of the superconducting device on the first chip includes a dissipative portion of the superconducting device. A multi-layer superconducting integrated circuit is implemented so that noise-susceptible superconducting devices are positioned in wiring layers formed from a low-noise superconductive material and that underlie wiring layers that are formed from a different superconductive material. A superconducting integrated circuit has a first stack with a first superconducting wiring layer formed from a first high kinetic inductance material and a second superconducting wiring layer communicatively coupled to the first superconducting wiring layer to form a first control circuit, a second stack comprising a third superconducting wiring layer formed from a second high kinetic inductance material and a fourth superconducting wiring layer communicatively coupled the third superconducting wiring layer to form a second control circuit. The superconducting integrated circuit also has a third stack with a controllable device, and at least one of the first control circuit and the second control circuit is communicatively coupled to the controllable device.
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公开(公告)号：US11941486B2
公开(公告)日：2024-03-26
申请号：US18137271
申请日：2023-04-20
Applicant: D-WAVE SYSTEMS INC.
Inventor： Steven P. Reinhardt , Andrew D. King , Loren J. Swenson , Warren T. E. Wilkinson , Trevor Michael Lanting
IPC: G06N10/00 , G05B19/042
CPC classification number: G06N10/00 , G05B19/042 , G05B2219/25071
Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
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43.发明授权公开(公告)号：US11424521B2
公开(公告)日：2022-08-23
申请号：US16975646
申请日：2019-02-20
Applicant: D-WAVE SYSTEMS INC.
Inventor： Jed D. Whittaker , Loren J. Swenson , Mark H. Volkmann
Abstract: A superconducting circuit may include a transmission line having at least one transmission line inductance, a superconducting resonator, and a coupling capacitance that communicatively couples the superconducting resonator to the transmission line. The transmission line inductance may have a value selected to at least partially compensate for a variation in a characteristic impedance of the transmission line, the variation caused at least in part by the coupling capacitance. The coupling capacitance may be distributed along the length of the transmission line. A superconducting circuit may include a transmission line having at least one transmission line capacitance, a superconducting resonator, and a coupling inductance that communicatively couples the superconducting resonator to the transmission line. The transmission line capacitance may be selected to at least partially compensate for a variation in coupling strength between the superconducting resonator and the transmission line.
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公开(公告)号：US20220123048A1
公开(公告)日：2022-04-21
申请号：US17429456
申请日：2020-02-13
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , George E.G. Sterling , Mark H. Volkmann , Colin C. Enderud
Abstract: A circuit can include a galvanic coupling of a coupler to a qubit by a segment of kinetic inductance material. The circuit can include a galvanic kinetic inductance coupler having multiple windings. The circuit can include a partially-galvanic coupler having multiple windings. The partially-galvanic coupler can include a magnetic coupling and a galvanic coupling. The circuit can include an asymmetric partially-galvanic coupler having a galvanic coupling and a first magnetic coupling to one qubit and a second magnetic coupling to a second qubit. The circuit can include a compact kinetic inductance qubit having a qubit body loop comprising a kinetic inductance material. A multilayer integrated circuit including a kinetic inductance layer can form a galvanic kinetic inductance coupling. A multilayer integrated circuit including a kinetic inductance layer can form at least a portion of a compact kinetic inductance qubit body loop.
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Patent Agency Ranking
公开(公告)号：US11263547B2
公开(公告)日：2022-03-01
申请号：US15881307
申请日：2018-01-26
Inventor： Steven P. Reinhardt , Andrew D. King , Loren J. Swenson , Warren T. E. Wilkinson , Trevor Michael Lanting
IPC: G06N10/00 , G05B19/042
Abstract: Computational systems and methods employ characteristics of a quantum processor determined or sampled between a start and an end of an annealing evolution per an annealing schedule. The annealing evolution can be reinitialized, reversed or continued after determination. The annealing evolution can be interrupted. The annealing evolution can be ramped immediately prior to or as part of determining the characteristics. The annealing evolution can be paused or not paused immediately prior to ramping. A second representation of a problem can be generated based at least in part on the determined characteristics from an annealing evolution performed on a first representation of the problem. The determined characteristics can be autonomously compared to an expected behavior, and alerts optionally provided and/or the annealing evolution optionally terminated based on the comparison. Iterations of annealing evolutions may be performed until an exit condition occurs.
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46.发明授权公开(公告)号：US11127893B2
公开(公告)日：2021-09-21
申请号：US16098801
申请日：2017-05-03
Applicant: D-WAVE SYSTEMS INC.
Inventor： Mark W. Johnson , Paul I. Bunyk , Andrew J. Berkley , Richard G. Harris , Kelly T. R. Boothby , Loren J. Swenson , Emile M. Hoskinson , Christopher B. Rich , Jan E. S. Johansson
Abstract: Approaches useful to operation of scalable processors with ever larger numbers of logic devices (e.g., qubits) advantageously take advantage of QFPs, for example to implement shift registers, multiplexers (i.e., MUXs), de-multiplexers (i.e., DEMUXs), and permanent magnetic memories (i.e., PMMs), and the like, and/or employ XY or XYZ addressing schemes, and/or employ control lines that extend in a “braided” pattern across an array of devices. Many of these described approaches are particularly suited for implementing input to and/or output from such processors. Superconducting quantum processors comprising superconducting digital-analog converters (DACs) are provided. The DACs may use kinetic inductance to store energy via thin-film superconducting materials and/or series of Josephson junctions, and may use single-loop or multi-loop designs. Particular constructions of energy storage elements are disclosed, including meandering structures. Galvanic connections between DACs and/or with target devices are disclosed, as well as inductive connections.
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公开(公告)号：US11105866B2
公开(公告)日：2021-08-31
申请号：US16397790
申请日：2019-04-29
Applicant: D-WAVE SYSTEMS INC.
Inventor： Loren J. Swenson , Andrew J. Berkley , Mark H. Volkmann , George E. G. Sterling
IPC: G01R33/035 , H01L39/22 , G06N10/00
Abstract: A device is dynamically isolated via a broadband switch that includes a plurality of cascade elements in series, wherein each cascade element comprises a first set of SQUIDs in series, a matching capacitor, and a second set of SQUIDs in series. The broadband switch is set to a passing state via flux bias lines during programming and readout of the device and set to a suppression state during device's calculation to reduce operation errors at the device. A device is electrically isolated from high-frequencies via an unbiased broadband switch. A device is coupled to a tunable thermal bath that includes a broadband switch.
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公开(公告)号：US10897068B2
公开(公告)日：2021-01-19
申请号：US16134592
申请日：2018-09-18
Applicant: D-WAVE SYSTEMS INC.
Inventor： Alexandr M. Tcaciuc , Loren J. Swenson , George E. G. Sterling
Abstract: Adaptions and improvements to coaxial metal powder filters include distributing a dissipative matrix mixture comprising superconductive material, metal powder, epoxy, and/or magnetic material within a volume defined by an outer tubular conductor and inner conductor. The frequency response of the filter may be tuned by exploiting the energy gap frequency of superconductive material in the dissipative matrix. The inner surface of the outer tubular conductor may be covered with a superconductive material. For a dissipative matrix comprising magnetic material or superconductive powder particles of a certain size, an external magnetic field can be applied to tune the frequency response of the filter.
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49.发明授权公开(公告)号：US10755190B2
公开(公告)日：2020-08-25
申请号：US15382278
申请日：2016-12-16
Applicant: D-Wave Systems Inc.
Inventor： Alexandr M. Tcaciuc , Pedro A. de Buen , Peter D. Spear , Sergey V. Uchaykin , Colin C. Enderud , Richard D. Neufeld , Jeremy P. Hilton , J. Craig Petroff , Amar B. Kamdar , Gregory D. Peregrym , Edmond Ho Yin Kan , Loren J. Swenson , George E. G. Sterling , Gregory Citver
IPC: H01F7/06 , G06N10/00 , H03H3/00 , H01F41/04 , H01F13/00 , H03H7/42 , H05K1/02 , H01F41/076 , H03H1/00 , H05K1/16 , H01L39/14 , H01L39/02
Abstract: An electrical filter includes a dielectric substrate with inner and outer coils about a first region and inner and outer coils about a second region, a portion of cladding removed from wires that form the coils and coupled to electrically conductive traces on the dielectric substrate via a solder joint in a switching region. An apparatus to thermally couple a superconductive device to a metal carrier with a through-hole includes a first clamp and a vacuum pump. A composite magnetic shield for use at superconductive temperatures includes an inner layer with magnetic permeability of at least 50,000; and an outer layer with magnetic saturation field greater than 1.2 T, separated from the inner layer by an intermediate layer of dielectric. An apparatus to dissipate heat from a superconducting processor includes a metal carrier with a recess, a post that extends upwards from a base of the recess and a layer of adhesive on top of the post. Various cryogenic refrigeration systems are described.
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