摘要:
The present disclosure provides a thermo-mechanically reliable copper TSV and a technique to form such TSV during BEOL processing. The TSV constitutes an annular trench which extends through the semiconductor substrate. The substrate defines the inner and outer sidewalls of the trench, which sidewalls are separated by a distance within the range of 5 to 10 microns. A conductive path comprising copper or a copper alloy extends within said trench from an upper surface of said first dielectric layer through said substrate. The substrate thickness can be 60 microns or less. A dielectric layer having interconnect metallization conductively connected to the conductive path is formed directly over said annular trench.
摘要:
A cellular communication system comprises an access point (101) which supports an underlay cell of a first cell on an underlay frequency using another frequency. A proximity detector (113) detects user equipment (109) in response to a wireless transmission therefrom, which uses a different transmission technology from a transmission of the cellular communication system. In response to the proximity detection, the access point (101) temporarily transmits a pilot signal on the first cell frequency. The user equipment (109) is then switched to the access point (109) and the underlay frequency in response to a detection indication from the user equipment (109) indicating that the pilot signal has been detected. Following the switch the access point (101) terminates the transmission of the pilot signal.
摘要:
Disclosed is a method of forming a semiconductor-on-insulator (SOI) structure on bulk semiconductor starting wafer. Parallel semiconductor bodies are formed at the top surface of the wafer. An insulator layer is deposited and recessed. Exposed upper portions of the semiconductor bodies are used as seed material for growing epitaxial layers of semiconductor material laterally over the insulator layer, thereby creating a semiconductor layer. This semiconductor layer can be used to form one or more SOI devices (e.g., single-fin or multi-fin MUGFET, multiple series-connected single-fin, multi-fin MUGFETs). However, placement of SOI device components in and/or on portions of the semiconductor layer should be predetermined to avoid locations which might impact device performance (e.g., placement of any FET gate on a semiconductor fin formed from the semiconductor layer can be predetermined to avoid interfaces between joined epitaxial semiconductor material sections). Also disclosed is a SOI structure formed using the above-described method.
摘要:
Disclosed is a method of forming a semiconductor-on-insulator (SOI) structure on a bulk semiconductor starting wafer. Parallel semiconductor bodies are formed at the top surface of the wafer. An insulator layer is deposited and recessed. Exposed upper portions of the semiconductor bodies are used as seed material for growing epitaxial layers of semiconductor material laterally over the insulator layer, thereby creating a semiconductor layer. This semiconductor layer can be used to form one or more SOI devices (e.g., a single-fin or multi-fin MUGFET or multiple series-connected single-fin or multi-fin MUGFETs). However, placement of SOI device components in and/or on portions of the semiconductor layer should be predetermined to avoid locations which might impact device performance (e.g., placement of any FET gate on a semiconductor fin formed from the semiconductor layer can be predetermined to avoid interfaces between joined epitaxial semiconductor material sections). Also disclosed is a SOI structure formed using the above-described method.
摘要:
A structure and method for forming isolation and a buried plate for a trench capacitor is disclosed. Embodiments of the structure comprise an epitaxial layer serving as the buried plate, and a bounded deep trench isolation area serving to isolate one or more deep trench structures. Embodiments of the method comprise angular implanting of the deep trench isolation area to form a P region at the base of the deep trench isolation area that serves as an anti-punch through implant.
摘要:
The present invention provides antifuse structures having an integrated heating element and methods of programming the same, the antifuse structures comprising first and second conductors and a dielectric layer formed between the conductors, where one or both of the conductors functions as both a conventional antifuse conductor and as a heating element for directly heating the antifuse dielectric layer during programming.
摘要:
A method is provided for fabricating a 3D integrated circuit structure. According to the method, a first active circuitry layer wafer that includes active circuitry is provided, and a first portion of the first active circuitry layer wafer is removed such that a second portion of the first active circuitry layer wafer remains. Another wafer that includes active circuitry is provided, and the other wafer is bonded to the second portion of the first active circuitry layer wafer. The first active circuitry layer wafer is lower-cost than the other wafer. Also provided are a tangible computer readable medium encoded with a program for fabricating a 3D integrated circuit structure, and a 3D integrated circuit structure.
摘要:
An apparatus and method for communicating system information in a wireless communication network. A first step 200 includes defining unicast threshold parameter(s). A next step 201 includes receiving a request for system information. A next step 202, 204 includes determining if the system information exceeds the threshold parameter(s). A next step 206-216 includes scheduling an ad-hoc broadcast of the system information if the system information exceeds the threshold parameter(s). A next step 218 includes sending a pointer to the scheduled ad-hoc broadcast. A next step 220 includes broadcasting the network service provider information per the schedule.
摘要:
The present invention relates to a semiconductor device that contains a trench metal-insulator-metal (MIM) capacitor and a field effect transistor (FET), and a design structure including the semiconductor device embodied in a machine readable medium. The trench MIM capacitor comprises a first metallic electrode layer located over interior walls of a trench in a substrate, a dielectric layer located in the trench over the first metallic electrode layer, and a second metallic electrode layer located in the trench over the dielectric layer. The FET comprises a source region, a drain region, a channel region between the source and drain regions, and a gate electrode over the channel region. The trench MIM capacitor is connected to the FET by a metallic strap. The semiconductor device of the present invention can be fabricated by a process in which the trench MIM capacitor is formed after the FET source/drain region but before the FET source/drain metal silicide contacts, for minimizing metal contamination in the FET.
摘要:
A network for a cellular communication system comprises access points (105-109) supporting cells within a region (113). Each access point (105-109) has an individual proxy address of a proxy address space which is a local address space of an address proxy (101) and a common network address of a network address space which is a network wide address space. A gateway access point (103) covers an entry point to the region (113) and detects a remote station entering the region. It then determines an access point (105) in the region to which the remote station is handed over and transmits a binding message to the address proxy (101) with an indication of the access point (105). In response to receiving the binding message, the address proxy (101) establishes a binding between the common network address and the proxy address of the access point (105). Data for the remote station is then forwarded to the access point (105) using the binding.