Otoplasty for behind-the-ear (BTE) hearing aids
    41.
    发明授权
    Otoplasty for behind-the-ear (BTE) hearing aids 失效
    耳后成形术(BTE)助听器

    公开(公告)号:US07233676B2

    公开(公告)日:2007-06-19

    申请号:US10790126

    申请日:2004-03-02

    申请人: Erich Bayer

    发明人: Erich Bayer

    IPC分类号: H04R25/00

    摘要: An otoplastic for production of behind-the-ear hearing aids. The hearing aid includes a preferably flexible signal conductor, such as an acoustic tube positioned in the auditory canal, whereby the otoplastic matches the individual anatomy of the patient and its locating part is in the form of a clip, which, at least partly arched, follows the outer edge of the cavum conchae. A branch following the edge of the cavum conchae transforms, above the antitragus, into a bent crosspiece traversing the cavum conchae and extending in the direction of the porous acusticus externus. The end section of the crosspiece lies in the upper section of the auditory canal and widens to accept the signal conductor (42).

    摘要翻译: 用于生产耳后助听器的耳用塑料。 助听器包括优选地柔性的信号导体,例如位于耳道中的声管,其中耳型匹配患者的个体解剖结构,并且其定位部分是夹子的形式,其至少部分拱起, 遵循腔囊的外缘。 紧跟着腔穴边缘的一个分支,在反垄断物上方转变成穿过孔腔的弯曲的横梁,并沿着多孔的外the的方向延伸。 横档的端部位于听道的上部,并加宽以接收信号导体(42)。

    Integrated power switching circuit
    42.
    发明授权
    Integrated power switching circuit 有权
    集成电源开关电路

    公开(公告)号:US07061217B2

    公开(公告)日:2006-06-13

    申请号:US11042296

    申请日:2005-01-24

    IPC分类号: G05F1/40

    CPC分类号: H03K17/08122

    摘要: A power switching circuit includes a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage, and that has a current path connected in series with a load between first and second supply terminals, and comprising a gate driver circuit that drives the gate of the power MOS transistor directly from the supply voltage. A gate driver circuit has a pair of series-connected switching transistors connected between the first and second supply terminals. An interconnection node between the switching transistors is connected to the gate of the power MOS transistor. The gate driver circuit further includes a reference voltage source and a voltage comparator comparing the gate voltage of the power MOS transistor with the reference voltage to provide a disabling output that disables one of the switching transistors when the gate voltage of the power MOS transistor reaches the reference voltage. By selecting a reference voltage level not higher than the maximum permissible gate-to-source voltage of the power MOS transistor, its gate is effectively protected from excessive gate-to-source voltage. Yet, the switching transistor in the gate driver circuit other than that connected to the ground supply terminal (usually referred to as Vcc terminal), may have its current path connected directly, or through just a feedback resistor, to the high supply terminal (usually referred to as Vcc terminal).

    摘要翻译: 功率开关电路包括功率MOS晶体管,其具有基本上高于允许的栅极 - 源极电压的最大源极 - 漏极电压,并且具有与第一和第二电源端子之间的负载串联连接的电流路径,并且包括栅极 驱动电路,直接从电源电压驱动功率MOS晶体管的栅极。 栅极驱动器电路具有连接在第一和第二电源端子之间的一对串联连接的开关晶体管。 开关晶体管之间的互连节点连接到功率MOS晶体管的栅极。 栅极驱动器电路还包括参考电压源和将功率MOS晶体管的栅极电压与参考电压进行比较的电压比较器,以提供当功率MOS晶体管的栅极电压达到阈值时禁用开关晶体管中的一个的禁用输出 参考电压。 通过选择不高于功率MOS晶体管的最大允许栅极 - 源极电压的参考电压电平,其栅极被有效地保护免受过大的栅极到源极电压的影响。 然而,除了连接到接地电源端子(通常称为Vcc端子)之外的栅极驱动电路中的开关晶体管可以将其电流路径直接连接或仅通过反馈电阻器连接到高电源端子(通常 简称Vcc终端)。

    Integrated power switching circuit
    43.
    发明申请
    Integrated power switching circuit 有权
    集成电源开关电路

    公开(公告)号:US20050161700A1

    公开(公告)日:2005-07-28

    申请号:US11042296

    申请日:2005-01-24

    CPC分类号: H03K17/08122

    摘要: An improved power switching circuit is disclosed. The circuit comprises a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage, and that has a current path connected in series with a load between first and second supply terminals, and comprising a gate driver circuit that drives the gate of the power MOS transistor directly from the supply voltage. A gate driver circuit has a pair of series-connected switching transistors connected between the first and second supply terminals. An interconnection node between the switching transistors is connected to the gate of the power MOS transistor. The gate driver circuit further comprises a reference voltage source and a voltage comparator comparing the gate voltage of the power MOS transistor with the reference voltage to provide a disabling output that disables one of the switching transistors when the gate voltage of the power MOS transistor reaches the reference voltage. By selecting a reference voltage level not higher than the maximum permissible gate-to-source voltage of the power MOS transistor, its gate is effectively protected from excessive gate-to-source voltage. Yet, the switching transistor in the gate driver circuit other than that connected to the ground supply terminal (usually referred to as Vcc terminal), may have its current path connected directly, or through just a feedback resistor, to the high supply terminal (usually referred to as Vcc terminal).

    摘要翻译: 公开了一种改进的功率开关电路。 该电路包括功率MOS晶体管,其具有基本上高于允许的栅极 - 源极电压的最大源极 - 漏极电压,并且具有与第一和第二电源端子之间的负载串联连接的电流路径,并且包括栅极驱动器电路 其直接从电源电压驱动功率MOS晶体管的栅极。 栅极驱动器电路具有连接在第一和第二电源端子之间的一对串联连接的开关晶体管。 开关晶体管之间的互连节点连接到功率MOS晶体管的栅极。 栅极驱动器电路还包括参考电压源和电压比较器,将功率MOS晶体管的栅极电压与参考电压进行比较,以提供禁用输出,当功率MOS晶体管的栅极电压达到 参考电压。 通过选择不高于功率MOS晶体管的最大允许栅极 - 源极电压的参考电压电平,其栅极被有效地保护免受过大的栅极到源极电压的影响。 然而,除了连接到接地电源端子(通常称为Vcc端子)之外的栅极驱动电路中的开关晶体管可以将其电流路径直接连接或仅通过反馈电阻器连接到高电源端子(通常 简称Vcc终端)。

    DC/DC converter
    44.
    发明授权
    DC/DC converter 有权
    DC / DC转换器

    公开(公告)号:US06483282B1

    公开(公告)日:2002-11-19

    申请号:US09953467

    申请日:2001-09-13

    申请人: Erich Bayer

    发明人: Erich Bayer

    IPC分类号: G05F316

    CPC分类号: H02M3/073

    摘要: A charge pump-type DC/DC converter comprises n (n≧2) elementary stages, each consisting of a charge pump capacitor and several controllable switches connected thereto, whereby the input voltage of the DC/DC converter is applied to the input of the first stage, both electrodes of the charge pump capacitor of the kth stage are each connectable to one of the controllable switches with the output of the (k−1)th stage, k=2, . . . , n and the output of the nth stage forms the output of the DC/DC converter. The DC/DC converter in accordance with the invention is characterized in that it in addition enables one or more further controllable switches to be connected, via which the electrode of the charge pump capacitor of the nth stage which in the discharge phase is not connected to the output of the converter, to one or more outputs of the 1th stage (1=(n−2), . . . 1) and/or of the input voltage, and comprises a control circuit which in the discharge phase of the charge pump cycle signals ON, as a function of the input voltage of the DC/DC converter, that switch of the array consisting of the one controllable switch via which the electrode of the charge pump capacitor of the nth stage can be connected to the output of the (n−1)th stage and the further controllable switches and connects the voltage applied thereto to the cited electrode of the charge pump capacitor of the nth stage at which the efficiency of the DC/DC converter is a maximum.

    摘要翻译: 电荷泵型DC / DC转换器包括n(n> = 2)个基本级,每个基本级由电荷泵电容器和连接到其上的几个可控开关组成,由此将DC / DC转换器的输入电压施加到 第一级,第k级的电荷泵电容器的两个电极均可连接到第(k-1)级的输出k = 2的可控开关之一。 。 。 ,n,第n级的输出形成DC / DC转换器的输出。 根据本发明的DC / DC转换器的特征在于,它还能够连接一个或多个另外的可控开关,通过该开关,在放电阶段中不连接到第n级的电荷泵电容器的电极 转换器的输出到第一级(1 =(n-2),...)和/或输入电压的一个或多个输出,并且包括控制电路,其在充电的放电阶段 泵循环信号ON,作为DC / DC转换器的输入电压的函数,由第一级的电荷泵电容器的电极可以连接到第一级的电极的一个可控开关组成的阵列的开关 第(n-1)级和另外可控开关,并将施加到其上的电压连接到DC / DC转换器的效率最大的第n级的电荷泵电容器的所引用电极。

    DC/DC converter incorporating a skip mode regulator
    45.
    发明授权
    DC/DC converter incorporating a skip mode regulator 有权
    包含跳跃模式调节器的DC / DC转换器

    公开(公告)号:US06359797B1

    公开(公告)日:2002-03-19

    申请号:US09610276

    申请日:2000-07-06

    IPC分类号: H02M318

    CPC分类号: H02M3/07 H02M1/146

    摘要: The invention relates to a DC/DC converter operating on the principle of a charge pump, comprising at least one charge pump capacitor and several controllable switches connected thereto. The switches are actuated by a control circuit with an oscillator. A skip mode comparator signals the charge pump alternatingly ON and OFF depending on the condition of the output voltage of the converter. Prior art converters featured high output current spikes and a heavy output voltage ripple. The converter in accordance with the invention reduces these problems by a regulator circuit which receives the control signal of the comparator and converts it into a signal characterizing the momentary ON/OFF duration ratio of the charge pump with which it controls the ON resistance of at least one of the switches so that the ON/OFF duration ratio of the charge pump can be set to a predetermined design value, at which the output current spikes of the charge pump are reduced. Provided parallel to this switch is a further small switch whose ON resistance is not controlled to thus ensure a small idle current of the charge pump at a low load.

    摘要翻译: 本发明涉及一种基于电荷泵原理工作的DC / DC转换器,其包括至少一个电荷泵电容器和连接到其上的多个可控开关。 开关由具有振荡器的控制电路驱动。 跳闸模式比较器根据转换器的输出电压的条件,交替地将电荷泵通电和断开。 现有技术的转换器具有高输出电流尖峰和大的输出电压纹波。 根据本发明的转换器通过调节器电路来减少这些问题,调节器电路接收比较器的控制信号并将其转换成表征电荷泵的瞬时ON / OFF持续时间比的信号,其至少控制电阻的ON电阻 其中一个开关使得电荷泵的ON / OFF持续时间比可以被设置为预定的设计值,在该设定值下,电荷泵的输出电流尖峰减小。 与该开关并联设置的是另一个小开关,其导通电阻不被控制,从而确保电荷泵在低负载下的小的空闲电流。

    Loss of ground protection for electronic relays
    46.
    发明授权
    Loss of ground protection for electronic relays 有权
    电子继电器失去接地保护

    公开(公告)号:US06246557B1

    公开(公告)日:2001-06-12

    申请号:US09215853

    申请日:1998-12-18

    IPC分类号: H02H318

    CPC分类号: H03K17/0822 H03K17/063

    摘要: A loss-of-ground protection circuit for an electronic relay including a control circuit driving a power transistor, and at least one cutoff transistor having a grounded control terminal, the cutoff transistor being interposed between the control circuit and a control terminal of the power transistor, and having a polarity such that loss of ground will cause the cutoff transistor to turn off.

    摘要翻译: 一种用于电子继电器的地漏保护电路,包括驱动功率晶体管的控制电路和至少一个具有接地控制端的截止晶体管,所述截止晶体管插在所述控制电路和所述功率晶体管的控制端之间 并且具有使得接地损耗将导致截止晶体管截止的极性。

    DC/DC converter
    47.
    发明授权
    DC/DC converter 有权
    DC / DC转换器

    公开(公告)号:US06226194B1

    公开(公告)日:2001-05-01

    申请号:US09595302

    申请日:2000-06-15

    IPC分类号: H02M318

    CPC分类号: H02M3/07 H02M1/32 H02M1/36

    摘要: The invention relates to a DC/DC converter operating on the principle of a charge pump and comprising a first capacitor C1 alternatingly charged via four MOSFETs M1-M4 to the input voltage and then discharged in series with the input voltage via a second capacitor C2 connected to the output of the circuit. To set the starting current for charging the as yet empty capacitors to a precisely defined small value a switchable current mirror M3, M5 is used comprising one of the four MOSFETs (M3) and a further small MOSFET (M5) which is connected to a current source 4. A comparator 5 handles selection between the starting phase and the normal charge pump mode by comparing the output voltage Vout of the converter to a reference voltage Vref, it switching the current mirror and—via two small switches S2 and S3 connected to the gates of two of the four MOSFETs—also two of the four MOSFETs so that the capacitors may be charged in an energy-saving way. As compared to existing more complicated achievements this novel DC/DC converter is producable integrated on a smaller circuit area, it in addition to this taking into account the short-circuit case of the converter. In one special embodiment a foldback effect is achievable via a further MOSFET connected in parallel to the current source, the gate of this MOSFET being connected to the output of the converter.

    摘要翻译: 本发明涉及一种以电荷泵原理工作的DC / DC转换器,它包括经由四个MOSFET M1-M4交替充电至输入电压的第一电容器C1,然后通过连接的第二电容器C2与输入电压串联放电 到电路的输出。 为了将用于将空的电容器充电至精确定义的小值的启动电流,使用可切换电流镜M3,M5,其包括四个MOSFET(M3)中的一个以及连接到电流的另一小型MOSFET(M5) 比较器5通过将转换器的输出电压Vout与参考电压Vref进行比较来处理起始相位和正常电荷泵模式之间的选择,它切换电流镜和经由两个小型开关S2和S3连接到 四个MOSFET中的两个的栅极 - 也是四个MOSFET中的两个,使得电容器可以以节能的方式被充电。 与现有更复杂的成果相比,这款新颖的DC / DC转换器可以集成在更小的电路面积上,除了考虑到转换器的短路情况外。 在一个特殊实施例中,通过与电流源并联连接的另一个MOSFET可实现折返效应,该MOSFET的栅极连接到转换器的输出端。

    Integrated CMOS circuit
    48.
    发明授权
    Integrated CMOS circuit 失效
    集成CMOS电路

    公开(公告)号:US5977815A

    公开(公告)日:1999-11-02

    申请号:US66305

    申请日:1998-04-27

    CPC分类号: H01L27/0921

    摘要: A CMOS circuit (10), which is integrated in a semiconductor substrate, comprises a principal circuit part (12), which includes the major part of the circuit components in a well isolated from the substrate by a substrate diode. The CMOS circuit furthermore comprises a power output stage (16) driving an inductive load (26, 28). A sensor (18) is connected with one output (22, 24) of the power output stage (16) and on detection of a voltage biasing the substrate diode (30, 32) in the conducting direction produces a switching signal at the output. On occurrence of the switching signal produced by the sensor (18) a controllable switch (20) disconnects the supply voltage from the principal circuit part (12). In its own separate well (46) a status memory (14) is formed on the substrate adjacent to the principal circuit part (12), such status memory (14) comprising memory elements for storage of status data of the principal circuit part (12) on disconnection of the supply voltage.

    摘要翻译: PCT No.PCT / EP96 / 04686 Sec。 371日期:1998年4月27日 102(e)1998年4月27日PCT PCT 1996年10月28日PCT公布。 第WO97 / 15952号公报 日期1997年5月1日集成在半导体衬底中的CMOS电路(10)包括主电路部分(12),其包括通过衬底二极管与衬底隔离的电路部件的主要部分。 CMOS电路还包括驱动感性负载(26,28)的功率输出级(16)。 传感器(18)与功率输出级(16)的一个输出(22,24)连接,并且在导通方向上检测到偏压衬底二极管(30,32)的电压在输出端产生开关信号。 在由传感器(18)产生的开关信号的发生中,可控开关(20)断开与主电路部分(12)的电源电压。 在其独立的井(46)中,在与主电路部分(12)相邻的衬底上形成状态存储器(14),该状态存储器(14)包括用于存储主电路部分(12)的状态数据的存储元件 )断开电源电压。

    Clock generator and phase comparator for use in such a clock generator
    49.
    发明授权
    Clock generator and phase comparator for use in such a clock generator 失效
    用于这种时钟发生器的时钟发生器和相位比较器

    公开(公告)号:US5877641A

    公开(公告)日:1999-03-02

    申请号:US352487

    申请日:1994-12-09

    摘要: A clock generator contains a reference oscillator (10), a digital closed delay chain (12), a digital frequency divider (14) and a digital phase comparator (16). The frequency divider (14) is connected between the output of the adjustable delay chain (12) and one input of the phase comparator (16). The output of the reference oscillator (10) is connected to a further input of the phase comparator (16). Between the output of the phase comparator (16) and the delay chain (12) a digital up-down counter (18) is connected, the counting direction of which is determined by the output signal of the phase comparator (16) and by means of which the corresponding length of the delay chain (12) is adjustable.

    摘要翻译: 时钟发生器包括参考振荡器(10),数字闭合延迟链(12),数字分频器(14)和数字相位比较器(16)。 分频器(14)连接在可调节延迟链(12)的输出端和相位比较器(16)的一个输入端之间。 参考振荡器(10)的输出端连接到相位比较器(16)的另一个输入端。 在相位比较器(16)的输出与延迟链(12)之间,连接数字升降计数器(18),其计数方向由相位比较器(16)的输出信号和装置 其延迟链(12)的相应长度可调节。

    Circuit arrangement for driving an MOS field-effect transistor allocated
to the supply circuit of an electrical load
    50.
    发明授权
    Circuit arrangement for driving an MOS field-effect transistor allocated to the supply circuit of an electrical load 失效
    用于驱动分配给电负载的电源电路的MOS场效应晶体管的电路装置

    公开(公告)号:US5841297A

    公开(公告)日:1998-11-24

    申请号:US684900

    申请日:1996-07-25

    CPC分类号: H03K17/163 H03K17/04123

    摘要: A circuit arrangement 10 for driving an MOS field-effect transistor QO allocated to the supply circuit KO of an electrical load R.sub.L contains a charging circuit K1 and a discharging circuit K2, which can be alternatively connected to the MOS field-effect transistor QO. A sensing circuit K3 supplies the measuring signal S.sub.M typical of gate-source voltage U.sub.GS of the MOS field-effect transistor QO, via which the internal resistance of the charging or discharging circuit K1, K2 and/or a current I.sub.a impressed upon these circuits K1, K2, in the sense of a positive feedback, is controlled, in such a way that the resulting time constant, according to which the input capacitance of the MOS field-effect, transistor QO is charged or discharged, becomes smaller during the transition of the MOS field-effect transistor QO from the off state to the conductive state and larger during the transition from the conductive to the off-state.

    摘要翻译: 用于驱动分配给电负载RL的电源电路KO的MOS场效应晶体管QO的电路装置10包括充电电路K1和可以替代地连接到MOS场效应晶体管QO的放电电路K2。 感测电路K3提供典型的MOS场效应晶体管QO的栅极 - 源极电压UGS的测量信号SM,通过该测量信号SM将充电或放电电路K1,K2的内部电阻和/或施加在这些电路K1上的电流Ia 在正反馈意义上的K2被控制,使得在MOS场效应晶体管QO的输入电容被充电或放电的结果时间常数在转换期间变得更小 MOS场效应晶体管QO从断开状态到导通状态,并且在从导通状态转换到断开状态期间较大。