摘要:
An otoplastic for production of behind-the-ear hearing aids. The hearing aid includes a preferably flexible signal conductor, such as an acoustic tube positioned in the auditory canal, whereby the otoplastic matches the individual anatomy of the patient and its locating part is in the form of a clip, which, at least partly arched, follows the outer edge of the cavum conchae. A branch following the edge of the cavum conchae transforms, above the antitragus, into a bent crosspiece traversing the cavum conchae and extending in the direction of the porous acusticus externus. The end section of the crosspiece lies in the upper section of the auditory canal and widens to accept the signal conductor (42).
摘要:
A power switching circuit includes a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage, and that has a current path connected in series with a load between first and second supply terminals, and comprising a gate driver circuit that drives the gate of the power MOS transistor directly from the supply voltage. A gate driver circuit has a pair of series-connected switching transistors connected between the first and second supply terminals. An interconnection node between the switching transistors is connected to the gate of the power MOS transistor. The gate driver circuit further includes a reference voltage source and a voltage comparator comparing the gate voltage of the power MOS transistor with the reference voltage to provide a disabling output that disables one of the switching transistors when the gate voltage of the power MOS transistor reaches the reference voltage. By selecting a reference voltage level not higher than the maximum permissible gate-to-source voltage of the power MOS transistor, its gate is effectively protected from excessive gate-to-source voltage. Yet, the switching transistor in the gate driver circuit other than that connected to the ground supply terminal (usually referred to as Vcc terminal), may have its current path connected directly, or through just a feedback resistor, to the high supply terminal (usually referred to as Vcc terminal).
摘要:
An improved power switching circuit is disclosed. The circuit comprises a power MOS transistor that has a maximum source-drain voltage substantially higher than a permissible gate-source voltage, and that has a current path connected in series with a load between first and second supply terminals, and comprising a gate driver circuit that drives the gate of the power MOS transistor directly from the supply voltage. A gate driver circuit has a pair of series-connected switching transistors connected between the first and second supply terminals. An interconnection node between the switching transistors is connected to the gate of the power MOS transistor. The gate driver circuit further comprises a reference voltage source and a voltage comparator comparing the gate voltage of the power MOS transistor with the reference voltage to provide a disabling output that disables one of the switching transistors when the gate voltage of the power MOS transistor reaches the reference voltage. By selecting a reference voltage level not higher than the maximum permissible gate-to-source voltage of the power MOS transistor, its gate is effectively protected from excessive gate-to-source voltage. Yet, the switching transistor in the gate driver circuit other than that connected to the ground supply terminal (usually referred to as Vcc terminal), may have its current path connected directly, or through just a feedback resistor, to the high supply terminal (usually referred to as Vcc terminal).
摘要:
A charge pump-type DC/DC converter comprises n (n≧2) elementary stages, each consisting of a charge pump capacitor and several controllable switches connected thereto, whereby the input voltage of the DC/DC converter is applied to the input of the first stage, both electrodes of the charge pump capacitor of the kth stage are each connectable to one of the controllable switches with the output of the (k−1)th stage, k=2, . . . , n and the output of the nth stage forms the output of the DC/DC converter. The DC/DC converter in accordance with the invention is characterized in that it in addition enables one or more further controllable switches to be connected, via which the electrode of the charge pump capacitor of the nth stage which in the discharge phase is not connected to the output of the converter, to one or more outputs of the 1th stage (1=(n−2), . . . 1) and/or of the input voltage, and comprises a control circuit which in the discharge phase of the charge pump cycle signals ON, as a function of the input voltage of the DC/DC converter, that switch of the array consisting of the one controllable switch via which the electrode of the charge pump capacitor of the nth stage can be connected to the output of the (n−1)th stage and the further controllable switches and connects the voltage applied thereto to the cited electrode of the charge pump capacitor of the nth stage at which the efficiency of the DC/DC converter is a maximum.
摘要:
The invention relates to a DC/DC converter operating on the principle of a charge pump, comprising at least one charge pump capacitor and several controllable switches connected thereto. The switches are actuated by a control circuit with an oscillator. A skip mode comparator signals the charge pump alternatingly ON and OFF depending on the condition of the output voltage of the converter. Prior art converters featured high output current spikes and a heavy output voltage ripple. The converter in accordance with the invention reduces these problems by a regulator circuit which receives the control signal of the comparator and converts it into a signal characterizing the momentary ON/OFF duration ratio of the charge pump with which it controls the ON resistance of at least one of the switches so that the ON/OFF duration ratio of the charge pump can be set to a predetermined design value, at which the output current spikes of the charge pump are reduced. Provided parallel to this switch is a further small switch whose ON resistance is not controlled to thus ensure a small idle current of the charge pump at a low load.
摘要:
A loss-of-ground protection circuit for an electronic relay including a control circuit driving a power transistor, and at least one cutoff transistor having a grounded control terminal, the cutoff transistor being interposed between the control circuit and a control terminal of the power transistor, and having a polarity such that loss of ground will cause the cutoff transistor to turn off.
摘要:
The invention relates to a DC/DC converter operating on the principle of a charge pump and comprising a first capacitor C1 alternatingly charged via four MOSFETs M1-M4 to the input voltage and then discharged in series with the input voltage via a second capacitor C2 connected to the output of the circuit. To set the starting current for charging the as yet empty capacitors to a precisely defined small value a switchable current mirror M3, M5 is used comprising one of the four MOSFETs (M3) and a further small MOSFET (M5) which is connected to a current source 4. A comparator 5 handles selection between the starting phase and the normal charge pump mode by comparing the output voltage Vout of the converter to a reference voltage Vref, it switching the current mirror and—via two small switches S2 and S3 connected to the gates of two of the four MOSFETs—also two of the four MOSFETs so that the capacitors may be charged in an energy-saving way. As compared to existing more complicated achievements this novel DC/DC converter is producable integrated on a smaller circuit area, it in addition to this taking into account the short-circuit case of the converter. In one special embodiment a foldback effect is achievable via a further MOSFET connected in parallel to the current source, the gate of this MOSFET being connected to the output of the converter.
摘要:
A CMOS circuit (10), which is integrated in a semiconductor substrate, comprises a principal circuit part (12), which includes the major part of the circuit components in a well isolated from the substrate by a substrate diode. The CMOS circuit furthermore comprises a power output stage (16) driving an inductive load (26, 28). A sensor (18) is connected with one output (22, 24) of the power output stage (16) and on detection of a voltage biasing the substrate diode (30, 32) in the conducting direction produces a switching signal at the output. On occurrence of the switching signal produced by the sensor (18) a controllable switch (20) disconnects the supply voltage from the principal circuit part (12). In its own separate well (46) a status memory (14) is formed on the substrate adjacent to the principal circuit part (12), such status memory (14) comprising memory elements for storage of status data of the principal circuit part (12) on disconnection of the supply voltage.
摘要:
A clock generator contains a reference oscillator (10), a digital closed delay chain (12), a digital frequency divider (14) and a digital phase comparator (16). The frequency divider (14) is connected between the output of the adjustable delay chain (12) and one input of the phase comparator (16). The output of the reference oscillator (10) is connected to a further input of the phase comparator (16). Between the output of the phase comparator (16) and the delay chain (12) a digital up-down counter (18) is connected, the counting direction of which is determined by the output signal of the phase comparator (16) and by means of which the corresponding length of the delay chain (12) is adjustable.
摘要:
A circuit arrangement 10 for driving an MOS field-effect transistor QO allocated to the supply circuit KO of an electrical load R.sub.L contains a charging circuit K1 and a discharging circuit K2, which can be alternatively connected to the MOS field-effect transistor QO. A sensing circuit K3 supplies the measuring signal S.sub.M typical of gate-source voltage U.sub.GS of the MOS field-effect transistor QO, via which the internal resistance of the charging or discharging circuit K1, K2 and/or a current I.sub.a impressed upon these circuits K1, K2, in the sense of a positive feedback, is controlled, in such a way that the resulting time constant, according to which the input capacitance of the MOS field-effect, transistor QO is charged or discharged, becomes smaller during the transition of the MOS field-effect transistor QO from the off state to the conductive state and larger during the transition from the conductive to the off-state.