SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE CONTROLLER THEREWITH
    42.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND VOLTAGE CONTROLLER THEREWITH 审中-公开
    半导体集成电路和电压控制器

    公开(公告)号:US20110187419A1

    公开(公告)日:2011-08-04

    申请号:US13017268

    申请日:2011-01-31

    IPC分类号: H03B19/00 G05F1/10

    CPC分类号: G05F1/10 H03B19/00

    摘要: A semiconductor integrated circuit is capable of accurately detecting the characteristics of a chip. The semiconductor integrated circuit includes a monitor circuit and a control circuit. The control circuit generates a clock pulse signal having M successive pulses (M is 2 or a greater integer), and outputs the clock pulse signal to the monitor circuit. The monitor circuit includes a frequency divider and a ring oscillator. The frequency divider frequency divides the clock pulse signal by M and generates the resulting signal as an enable signal. The ring oscillator generates an oscillation signal as a monitor output value during a period defined in accordance with the enable signal.

    摘要翻译: 半导体集成电路能够准确地检测芯片的特性。 半导体集成电路包括监视电路和控制电路。 控制电路产生具有M个连续脉冲(M为2或更大整数)的时钟脉冲信号,并将该时钟脉冲信号输出到监视电路。 监视电路包括分频器和环形振荡器。 分频器频率将时钟脉冲信号除以M,并产生结果信号作为使能信号。 环形振荡器在根据使能信号定义的周期期间产生作为监视器输出值的振荡信号。

    Level converting circuit
    43.
    发明授权
    Level converting circuit 有权
    电平转换电路

    公开(公告)号:US07671656B2

    公开(公告)日:2010-03-02

    申请号:US12196422

    申请日:2008-08-22

    申请人: Masahiro Nomura

    发明人: Masahiro Nomura

    IPC分类号: H03L5/00

    CPC分类号: H03K19/018521

    摘要: A level shifter in which short circuit current and the increase in delay are reduced when a first power source is controlled. In a level shifter for converting a signal level of a first logic circuit to which a first power source is supplied into a signal level of a second logic circuit to which a second power source is supplied, the circuit includes a switching circuit between a GND power source terminal of a level shift core circuit and a GND power source. The switching circuit is controlled by a third logic circuit which generates a control signal under control of the first power source, and a pull-up/pull-down circuit at an output of the level shift core circuit. The pull-up and/or pull-down circuit is controlled by the third logic circuit.

    摘要翻译: 当控制第一电源时,降低短路电流和延迟增加的电平移位器。 在用于将提供第一电源的第一逻辑电路的信号电平转换为提供第二电源的第二逻辑电路的信号电平的电平移位器中,所述电路包括在GND电源 电平移位核心电路的源极端子和GND电源。 开关电路由在第一电源的控制下产生控制信号的第三逻辑电路和在电平移位核心电路的输出端的上拉/下拉电路来控制。 上拉和/或下拉电路由第三逻辑电路控制。

    Novel Cyclic Aminophenylalkanoic Acid Derivative
    44.
    发明申请
    Novel Cyclic Aminophenylalkanoic Acid Derivative 审中-公开
    新型环状氨基苯基链烷酸衍生物

    公开(公告)号:US20090036489A1

    公开(公告)日:2009-02-05

    申请号:US11886909

    申请日:2006-03-22

    CPC分类号: C07D417/12 C07D409/12

    摘要: The present invention provides cyclic aminophenylalkanoic acid derivatives that act as agonists for human peroxisome proliferator-activated receptors (PPARs), in particular human PPARα isoform, and are effective in the treatment of abnormal lipid metabolism, diabetes and other disorders. The present invention also provides addition salts of such cyclic aminophenylalkanoic acid derivatives and pharmaceutical compositions containing these compounds.Specifically, the present invention provides cyclic aminophenylalkanoic acid derivatives represented by the following general formula (1): , or pharmaceutically acceptable salts thereof.

    摘要翻译: 本发明提供了作为人类过氧化物酶体增殖物激活受体(PPAR),特别是人PPARα同种型的激动剂的环状氨基苯基链烷酸衍生物,并且有效治疗脂质代谢异常,糖尿病等疾病。 本发明还提供了这种环状氨基苯基链烷酸衍生物的加成盐和含有这些化合物的药物组合物。 具体地说,本发明提供由以下通式(1)表示的环状氨基苯基链烷酸衍生物或其药学上可接受的盐。

    Programmable semiconductor device
    45.
    发明授权
    Programmable semiconductor device 失效
    可编程半导体器件

    公开(公告)号:US07446562B2

    公开(公告)日:2008-11-04

    申请号:US11628532

    申请日:2005-05-25

    IPC分类号: H01L25/00 H03K19/177

    摘要: A programmable semiconductor device of the invention includes: processing element unit executing a predetermined operation; input/output connection unit acting as a signal input part and/or a signal output part in processing element unit; interconnecting unit, comprised of a plurality of wires, connecting processing element unit via input/output connection unit; bidirectional repeater unit, arranged between the intersection points of interconnecting unit, performing disconnection, or driving interconnecting unit in the forward direction or in the reverse direction; and interconnection connecting unit, arranged at the intersection point, connecting interconnecting unit at the intersection point.

    摘要翻译: 本发明的可编程半导体器件包括:执行预定操作的处理元件单元; 用作信号输入部分的输入/输出连接单元和/或处理元件单元中的信号输出部分; 由多根电线组成的互连单元,经由输入/输出连接单元连接处理元件单元; 双向中继器单元,布置在互连单元的交点之间,在正向或反向上执行断开或驱动互连单元; 和互连连接单元,布置在交点处,交叉点处连接互连单元。

    Novel Cyclic Amino Benzoic Acid Derivative
    46.
    发明申请
    Novel Cyclic Amino Benzoic Acid Derivative 失效
    新型环状氨基苯甲酸衍生物

    公开(公告)号:US20070249580A1

    公开(公告)日:2007-10-25

    申请号:US11659854

    申请日:2005-08-11

    摘要: The present invention relates to cyclic amino benzoic acid derivatives which are effective in therapy of lipid metabolism abnormality, diabetes and the like as a human peroxisome proliferators-activated receptor (PPAR) agonist, in particular, as an agonist against human PPARα isoform, and addition salts thereof, and pharmaceutical compositions containing these compounds. A cyclic amino benzoic acid derivative represented by the general formula (1) [wherein a ring Ar represents an aryl group which may have substituent, or the like; Y represents a C1-C4 alkylene, C2-C4 alkenylene, C2-C4 alkynylene, or the like; Z represents an oxygen atom, sulfur atom or —(CH2)n— (n represents 0, 1 or 2); X represents a hydrogen atom, halogen atom, lower alkyl group which may be substituted with a halogen atom, or the like; R represents a hydrogen atom or lower alkyl group, and —COOR substitutes for an ortho position or metha position of binding position of ring W] or a pharmaceutically acceptable salt thereof.

    摘要翻译: 本发明涉及作为人类过氧化物酶体增殖物激活受体(PPAR)激动剂的脂质代谢异常的治疗有效的环状氨基苯甲酸衍生物,特别是作为对人PPARα同种型的激动剂的添加 其盐,以及含有这些化合物的药物组合物。 由通式(1)表示的环状氨基苯甲酸衍生物[其中环Ar表示可具有取代基的芳基等; Y表示C 1 -C 4亚烷基,C 2 -C 4亚烯基,C 2 C 3 -C 4亚炔基等; Z表示氧原子,硫原子或 - (CH 2 CH 2)n - (n表示0,1或2)。 X表示氢原子,卤素原子,可被卤素原子取代的低级烷基等; R代表氢原子或低级烷基,-COOR代替环W的结合位置的邻位或甲基位置]或其药学上可接受的盐。

    Semiconductor device for preventing noise generation
    48.
    发明授权
    Semiconductor device for preventing noise generation 有权
    用于防止产生噪声的半导体装置

    公开(公告)号:US07199490B2

    公开(公告)日:2007-04-03

    申请号:US10311525

    申请日:2001-06-13

    申请人: Masahiro Nomura

    发明人: Masahiro Nomura

    摘要: There is provided a second switch used to turn on/off connection between a first circuit portion with a decoupling capacitance on a first switch side. Then, in accordance with on/off of the first switch, the second switch is turned on/off. By performing such switch control, when the first and second switches and are turned off and the first circuit portion shifts to the standby mode, the electric charge stored in the decoupling capacitance in the on state of the first and second switches is held. The electric charge held in the decoupling capacitance contributes to charging of a parasitic capacitance of the first circuit portion when the first and second switches and are again turned on. Therefore, when the first circuit portion shifts from the standby mode to the normal operating mode, the instantaneous voltage drop at a first connection point can be reduced.

    摘要翻译: 提供了用于在第一开关侧具有去耦电容的第一电路部分之间接通/断开连接的第二开关。 然后,根据第一开关的开/关,第二开关被接通/断开。 通过执行这样的开关控制,当第一和第二开关被关断并且第一电路部分转移到待机模式时,保持在第一和第二开关的接通状态下的解耦电容中存储的电荷。 保持在去耦电容中的电荷有助于当第一和第二开关再次接通时对第一电路部分的寄生电容进行充电。 因此,当第一电路部分从待机模式转换到正常工作模式时,可以减小第一连接点处的瞬时电压降。

    Multi-power source semiconductor device
    49.
    发明申请
    Multi-power source semiconductor device 有权
    多功率源半导体器件

    公开(公告)号:US20060232316A1

    公开(公告)日:2006-10-19

    申请号:US10565190

    申请日:2004-07-15

    申请人: Masahiro Nomura

    发明人: Masahiro Nomura

    IPC分类号: G06F1/04

    摘要: In a multi-supply-voltage semiconductor device including multiple blocks 31, 32, each of which has independent clock circuit 41, 42, and operating with variable power supply 101, variable delay circuit 20 which changes the amount of delay in accordance with the voltage value of the variable power supply 101 is provided to a clock signal supplied to several blocks 32 from clock generator circuit 10. This can reduce clock skew between the blocks even when the power supply voltage of variable power supply 101 is changed.

    摘要翻译: 在包括多个块31,32的多电源电压半导体器件中,每个具有独立的时钟电路41,42,并且与可变电源101一起工作,可变延迟电路20根据电压来改变延迟量 可变电源101的值被提供给从时钟发生器电路10提供给多个块32的时钟信号。 这可以减少块之间的时钟偏移,即使可变电源101的电源电压改变。

    Semiconductor integrated circuit device
    50.
    发明申请
    Semiconductor integrated circuit device 失效
    半导体集成电路器件

    公开(公告)号:US20060091936A1

    公开(公告)日:2006-05-04

    申请号:US11261753

    申请日:2005-10-31

    IPC分类号: H03K3/01

    摘要: A substrate bias is controlled such that a leakage current is minimum. A semiconductor integrated circuit device comprises a leakage detecting circuit which detects a leakage current by using leakage detecting MOSFETs, a control circuit which generates a control signal depending on an output from the leakage detecting circuit, a substrate bias generating circuit which changes a substrate bias depending on the control signal, and a controlled circuit including a MOSFET having the same characteristics as that of each of the leakage detecting MOSFETs. The leakage detecting circuit detects a substrate leakage current which includes as the substrate bias becomes deep and a subthreshold leakage current which decreases as the substrate bias becomes deep. A control signal is transmitted to the substrate bias generating circuit such that the substrate bias is made deep when the substrate leakage current is smaller than the subthreshold leakage current and such that the substrate bias is made shallow when the substrate leakage current is larger than the subthreshold leakage current.

    摘要翻译: 控制衬底偏置使得漏电流最小。 一种半导体集成电路装置,包括利用泄漏检测用MOSFET检测泄漏电流的漏电检测电路,根据来自漏电检测电路的输出产生控制信号的控制电路,将衬底偏置变化的衬底偏置产生电路 控制信号的控制电路以及具有与各漏电检测用MOSFET相同特性的MOSFET的受控电路。 泄漏检测电路检测衬底偏置变深时包括的衬底漏电流,以及随着衬底偏压变深而减小的亚阈值漏电流。 控制信号被传送到衬底偏置产生电路,使得当衬底漏电流小于亚阈值漏电流时衬底偏压变深,并且当衬底泄漏电流大于次阈值时衬底偏置变浅 漏电流。