公开(公告)号：US20160322306A1

公开(公告)日：2016-11-03

申请号：US14698639

申请日：2015-04-28

Applicant: Infineon Technologies AG

Inventor： Michael Roesner ,  Gudrun Stranzl ,  Manfred Engelhardt ,  Martin Zgaga

IPC: H01L23/544 ,  G06K7/14 ,  H01L21/67 ,  H01L21/78 ,  H01L21/3065

CPC classification number: H01L23/544 ,  H01L21/30655 ,  H01L21/78 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2223/5446 ,  H01L2223/54473

Abstract: The description discloses a method for use in manufacturing integrated circuit chips. The method comprises providing a wafer having a plurality of integrated circuits each provided in an separate active areas, and, for each active area, outside the active area, providing a code pattern that is associated with the integrated circuit. A computer-readable medium is also disclosed. Further, a manufacturing apparatus configured to receive a wafer and to remove material from the wafer so as to provide a scribe line to the wafer formed as a trench for use in separation of the wafer into dies is also disclosed. The description also discloses a wafer, an integrated circuit chip die substrate originating from a wafer of origin and carrying an integrated circuit, and an integrated circuit chip.

Abstract translation: 该说明书公开了一种用于制造集成电路芯片的方法。 该方法包括提供具有多个集成电路的晶片，每个集成电路分别设置在单独的有源区域中，并且对于每个有源区域，在有源区域外部，提供与集成电路相关联的代码图案。 还公开了一种计算机可读介质。 此外，还公开了一种制造装置，其被配置为接收晶片并从晶片去除材料，以便为形成为用于将晶片分离成模具的沟槽形成的晶片提供划线。 该说明书还公开了一种晶片，源自原始晶片的集成电路芯片芯片基板和承载集成电路，以及集成电路芯片。

公开(公告)号：US20160260658A1

公开(公告)日：2016-09-08

申请号：US15155271

申请日：2016-05-16

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Andreas Meiser ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/528 ,  H01L21/48 ,  H01L21/78

CPC classification number: H01L23/49562 ,  H01L21/4807 ,  H01L21/56 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/32 ,  H01L24/49 ,  H01L24/94 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/0603 ,  H01L2224/08245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/0532 ,  H01L2924/05341 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/03

Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.

Abstract translation: 一种用于形成半导体器件的方法包括在具有第一侧和第二侧的半导体衬底中形成器件区域。 器件区域邻近第一侧形成。 该方法还包括在半导体衬底的第一侧上形成晶种层，并在种子层上形成图案化的抗蚀剂层。 在图案化的抗蚀剂层内的种子层上形成接触焊盘。 该方法还包括在形成接触焊盘之后去除图案化的抗蚀剂层，以暴露图案化抗蚀剂层下面的种子层的一部分，以及在种子层的暴露部分上形成保护层。

公开(公告)号：US09368436B2

公开(公告)日：2016-06-14

申请号：US14614119

申请日：2015-02-04

Applicant: Infineon Technologies AG

Inventor： Manfred Schneegans ,  Andreas Meiser ,  Martin Mischitz ,  Michael Roesner ,  Michael Pinczolits

IPC: H01L21/78 ,  H01L23/528 ,  H01L23/495 ,  H01L21/48 ,  H01L23/00

CPC classification number: H01L23/49562 ,  H01L21/4807 ,  H01L21/56 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/291 ,  H01L23/3121 ,  H01L23/49503 ,  H01L23/49582 ,  H01L23/49586 ,  H01L23/528 ,  H01L24/03 ,  H01L24/05 ,  H01L24/08 ,  H01L24/32 ,  H01L24/49 ,  H01L24/94 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/68336 ,  H01L2221/6834 ,  H01L2221/68377 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/0391 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05556 ,  H01L2224/05576 ,  H01L2224/05647 ,  H01L2224/05687 ,  H01L2224/0603 ,  H01L2224/08245 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/0532 ,  H01L2924/05341 ,  H01L2924/05432 ,  H01L2924/05442 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/20111 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/03

Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.

Abstract translation: 一种用于形成半导体器件的方法包括在具有第一侧和第二侧的半导体衬底中形成器件区域。 器件区域邻近第一侧形成。 该方法还包括在半导体衬底的第一侧上形成晶种层，并在种子层上形成图案化的抗蚀剂层。 在图案化的抗蚀剂层内的种子层上形成接触焊盘。 该方法还包括在形成接触焊盘之后去除图案化的抗蚀剂层，以暴露图案化抗蚀剂层下面的种子层的一部分，以及在种子层的暴露部分上形成保护层。

公开(公告)号：US20150064877A1

公开(公告)日：2015-03-05

申请号：US14014699

申请日：2013-08-30

Applicant: Infineon Technologies AG

Inventor： Petra Fischer ,  Michael Roesner ,  Gudrun Stranzl

IPC: H01L21/78

CPC classification number: H01L21/78 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2224/03001

Abstract: A method for processing a semiconductor wafer in accordance with various embodiments may include: providing a semiconductor wafer including at least one chip and at least one kerf region adjacent to the at least one chip, the kerf region including at least one auxiliary structure; applying a mask layer to the semiconductor wafer; removing the at least one auxiliary structure in the at least one kerf region; removing the applied mask layer; and separating the semiconductor wafer along the at least one kerf region.

Abstract translation: 根据各种实施例的用于处理半导体晶片的方法可以包括：提供包括至少一个芯片的半导体晶片和与所述至少一个芯片相邻的至少一个切割区域，所述切割区域包括至少一个辅助结构; 对半导体晶片施加掩模层; 去除所述至少一个切口区域中的所述至少一个辅助结构; 去除所施加的掩模层; 以及沿着所述至少一个切口区域分离所述半导体晶片。