公开(公告)号：US20070168607A1

公开(公告)日：2007-07-19

申请号：US11640312

申请日：2006-12-18

Applicant: Yoriharu Takai ,  Kenji Yoshida

Inventor： Yoriharu Takai ,  Kenji Yoshida

IPC: G06F12/00

CPC classification number: G06F12/0866 ,  G06F2212/1028 ,  G06F2212/222 ,  Y02D10/13

Abstract: In a storage device, the data process can be performed without lowering the data processing efficiency even when the sector length of the host device side and the sector length of the hard disk side are different from each other. Partial data or whole data of a second data block using a long sector defined on the hard disk side as a base and surrounding the starting end and terminating end addresses of a first data block using a host-defined sector as a base is read from the hard disk and written to the flash memory before the data process using the flash memory as a cache is performed based on a command.

Abstract translation: 在存储装置中，即使当主机侧的扇区长度和硬盘侧的扇区长度彼此不同时，也可以不降低数据处理效率来进行数据处理。 从使用主机定义的扇区作为基础的第一数据块的使用以硬盘侧定义的长扇区为周围的起始端和终止终端地址的第二数据块的部分数据或整体数据被读取 在使用闪存作为缓存的数据处理之前，基于命令执行硬盘并写入闪存。

公开(公告)号：US07061345B2

公开(公告)日：2006-06-13

申请号：US10493662

申请日：2002-12-13

Applicant: Koichiro Misu ,  Koji Ibata ,  Kouji Murai ,  Kenji Yoshida ,  Kousaku Yamagata ,  Kenji Itoh ,  Isao Murase ,  Masao Koshinaka

Inventor： Koichiro Misu ,  Koji Ibata ,  Kouji Murai ,  Kenji Yoshida ,  Kousaku Yamagata ,  Kenji Itoh ,  Isao Murase ,  Masao Koshinaka

IPC: H03H9/54 ,  H03H9/64

CPC classification number: H03H9/6483 ,  H03H7/0115 ,  H03H7/0123 ,  H03H7/1758 ,  H03H7/1766 ,  H03H7/463

Abstract: Filter circuitry is provided with a series element and a parallel element. The filter circuitry transmits signals that fall within a certain passband and attenuates signals that don't fall within the certain passband. The series element is comprised of a resonance element having antiresonance characteristics, and the parallel element is comprised of a series circuit including an inductor and a capacitor.

Abstract translation: 滤波器电路具有串联元件和并联元件。 滤波器电路传输落入一定通带内的信号，并衰减不落入某一通带内的信号。 串联元件由具有反谐振特性的谐振元件构成，并联元件由包括电感器和电容器的串联电路构成。

公开(公告)号：US20060097399A1

公开(公告)日：2006-05-11

申请号：US11265231

申请日：2005-11-03

Applicant: Masaaki Hatano ,  Motoya Okazaki ,  Junichi Wada ,  Takeshi Nishioka ,  Hisashi Kaneko ,  Takeshi Fujimaki ,  Kazuyuki Higashi ,  Kenji Yoshida ,  Noriaki Matsunaga

Inventor： Masaaki Hatano ,  Motoya Okazaki ,  Junichi Wada ,  Takeshi Nishioka ,  Hisashi Kaneko ,  Takeshi Fujimaki ,  Kazuyuki Higashi ,  Kenji Yoshida ,  Noriaki Matsunaga

IPC: H01L23/48

CPC classification number: G06F17/5068

Abstract: A method for generating a pattern includes reading out an interconnect layout and a hole layout, the interconnect layout prescribing interconnect patterns, the hole layout prescribing hole patterns configured to connect to the interconnect patterns; extracting one of the hole patterns to be connected within the same interconnect layer level to one of the interconnect patterns in a pattern processing area; extracting a first processing area including the extracted hole pattern; calculating a first pattern density of the interconnect patterns included in the first processing area; and generating first additional patterns in the first processing area based on the first pattern density.

Abstract translation: 一种用于产生图案的方法包括：读出互连布局和孔布局;布置规定互连图案的布局布局;布置配置为连接到互连图案的孔图案的孔布局; 在图案处理区域中将在相同互连层级中连接的孔图案中的一个提取到所述互连图案之一; 提取包括所提取的孔图案的第一处理区域; 计算包括在第一处理区域中的互连图案的第一图案密度; 以及基于所述第一图案密度在所述第一处理区域中生成第一附加图案。

公开(公告)号：US06949373B2

公开(公告)日：2005-09-27

申请号：US10294778

申请日：2002-11-15

Applicant: Masayuki Tsuchiya ,  Kenji Yoshida

Inventor： Masayuki Tsuchiya ,  Kenji Yoshida

IPC: C07H21/04 ,  C12N9/12 ,  C12N9/22 ,  C12N15/12 ,  C12Q1/68 ,  C07H21/02 ,  C07K1/00 ,  C07K14/00

CPC classification number: C12N9/1276 ,  C12Y207/07049

Abstract: The present invention aims to provide a novel gene having a reverse transcriptase motif. The invention isolates a novel gene having a reverse transcriptase motif, and gives its complete base sequence determined. The invention also provides a protein encoded by the gene, and an antibody against the protein. The use of them is useful in developing a method for detecting telomerase activity, a method for detecting a cancer cell, a telomerase activity inhibitor, and a method for screening a telomerase activity inhibitor.

Abstract translation: 本发明旨在提供具有逆转录酶基序的新基因。 本发明分离具有逆转录酶基序的新基因，并确定其完整的碱基序列。 本发明还提供了由该基因编码的蛋白质和针对该蛋白质的抗体。 它们的用途可用于开发检测端粒酶活性的方法，检测癌细胞的方法，端粒酶活性抑制剂和筛选端粒酶活性抑制剂的方法。

公开(公告)号：US20050198358A1

公开(公告)日：2005-09-08

申请号：US11062746

申请日：2005-02-23

Applicant: Kenji Yoshida

Inventor： Kenji Yoshida

IPC: G06F1/20 ,  G06F15/16

CPC classification number: G06F1/206

Abstract: An information device disclosed herein includes a communicator which communicates with a host, wherein, in a heat release mode, the communicator transmits a reply that the data has not been properly received to the host at a given ratio even when the data has been properly received; a heat-producing internal unit which operates according to the data received by the communicator, the heat-producing unit producing heat by operating continuously; a temperature detector which detects a temperature of the internal unit; and a first mode changer which changes the communicator from a normal mode to the heat release mode when the temperature detected by the temperature detector is a first set value or higher.

Abstract translation: 本文公开的信息装置包括与主机进行通信的通信器，其中，在散热模式中，即使当数据已被正确接收时，通信器以给定的比例向主机发送数据未被正确接收的答复 ; 发热内部单元，其根据由通信器接收的数据进行操作，所述发热单元通过连续运行来产生热量; 温度检测器，其检测内部单元的温度; 以及当由温度检测器检测到的温度为第一设定值或更高时，将通信器从正常模式改变为放热模式的第一模式更换器。

公开(公告)号：US06924597B2

公开(公告)日：2005-08-02

申请号：US10370524

申请日：2003-02-24

Applicant: Kenji Yoshida ,  Masayuki Shibata

Inventor： Kenji Yoshida ,  Masayuki Shibata

IPC: H01J11/48 ,  H01J11/12 ,  H01J11/22 ,  H01J11/24 ,  H01J11/26 ,  H01J11/34 ,  H01J11/36 ,  H01J11/00

CPC classification number: H01J11/36 ,  H01J11/12 ,  H01J11/48

Abstract: A plasma display panel is provided in which an operational quality is prevented from being deteriorated by resonance of a substrate. The plasma display panel includes a partition for dividing a discharge gas space defined by a pair of substrates and a sealing material in accordance with a cell arrangement of a display screen. There is a void space between the upper surface of the end portion of the partition and the surface of the opposed substrate, the surfaces contacting each other. The natural frequency of the portion from the inner edge of the void space to the inner edge of the sealing material is raised above audio frequency region of a human.

Abstract translation: 提供了一种等离子体显示面板，其中通过基板的共振防止操作质量的劣化。 等离子体显示面板包括用于根据显示屏的单元布置来划分由一对基板和密封材料限定的放电气体空间的隔板。 在隔板的端部的上表面和相对的基板的表面之间存在空隙，这些表面彼此接触。 从空隙空间的内边缘到密封材料的内边缘的部分的固有频率在人的音频区域上升。

公开(公告)号：US06774024B2

公开(公告)日：2004-08-10

申请号：US10717556

申请日：2003-11-21

Applicant: Koji Miyamoto ,  Kenji Yoshida ,  Hisashi Kaneko

Inventor： Koji Miyamoto ,  Kenji Yoshida ,  Hisashi Kaneko

IPC: H01L2972

CPC classification number: H01L23/53238 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

Abstract: One via contact through which upper and lower interconnections of a multilevel interconnection are connected to each other is provided when the width or volume of the lower interconnection is not larger than a given value. A plurality of via contacts are arranged at regular intervals, each of which is not larger than a given value, in an effective diffusion region of voids included in the lower interconnection, when the width or volume of the lower interconnection exceeds a given value.

Abstract translation: 当下互连的宽度或体积不大于给定值时，提供一个通孔，多通道互连的上互连和下互连彼此连接。 当下部互连的宽度或体积超过给定值时，多个通孔触点以规定的间隔布置在每个不大于给定值的空隙的有效扩散区域中。

公开(公告)号：US06398570B1

公开(公告)日：2002-06-04

申请号：US09709553

申请日：2000-11-13

Applicant: Kenji Yoshida ,  Takashi Naito ,  Shigeru Murayama ,  Katsuhiko Sakamoto ,  Takashi Masaki

Inventor： Kenji Yoshida ,  Takashi Naito ,  Shigeru Murayama ,  Katsuhiko Sakamoto ,  Takashi Masaki

IPC: H01R1315

CPC classification number: H05K7/1007 ,  G01R1/0416 ,  H01R12/88

Abstract: A semiconductor component mounting apparatus for mounting a semiconductor component to test the electric characteristics of the semiconductor component, comprising: a contactor 20 with which the semiconductor component contacts; a substrate 30 which supplies an electric signal to the contactor 20; a plurality of connection components 40, each of which has an electric terminal 48 for supplying the electric signal to the substrate 30 and which is fixed to the substrate 30; a plurality of connectors 50 which has a contact pin 70 including a contact part 74 for contacting with the electric terminal 48 of the connection component 40, a housing 68 for holding the contact pin 70, a pushing part 78 for pushing the contact pin 70 to the electric terminal 48, and which is freely-detachably connected to one of the plurality of the connection components 40; a holder 80 which holds the plurality of the connectors 50, and a fixing part 86 which fixes the holder 80 to the substrate 30, wherein the contact part 74 slides along the electric terminal 48, while contacting with the electric terminal 40, when the pushing part 78 pushes the contact pin 70.

Abstract translation: 一种用于安装半导体部件以测试半导体部件的电特性的半导体部件安装装置，包括：半导体部件与其接触的接触器20; 将电信号提供给接触器20的基板30; 多个连接部件40，每个连接部件40具有用于将电信号提供到基板30并且固定到基板30的电端子48; 多个连接器50具有接触销70，该接触销70包括用于与连接部件40的电端子48接触的接触部分74，用于保持接触销70的壳体68，用于将接触销70推到的推动部分78 电气端子48，并且可自由拆卸地连接到多个连接部件40之一; 保持多个连接器50的保持器80和将保持器80固定到基板30的固定部86，其中接触部74在与电端子40接触的同时沿着电端子48滑动，当推动 部分78推动接触销70。

公开(公告)号：US06222315B1

公开(公告)日：2001-04-24

申请号：US09144651

申请日：1998-08-31

Applicant: Atsushi Yoshizawa ,  Hirofumi Kubota ,  Kenji Yoshida ,  Taizo Ishida

Inventor： Atsushi Yoshizawa ,  Hirofumi Kubota ,  Kenji Yoshida ,  Taizo Ishida

IPC: H05B3322

CPC classification number: H01L27/3283 ,  H01L51/5206 ,  H01L2251/5392 ,  H05B33/22

Abstract: A luminescent display panel includes a substrate (106), a plurality of first electrodes (102) formed on the substrate (106), and a plurality of insulating films (109) formed on the substrate (106) to cover edge portions of each first electrode (102) and having the central portion thereof exposed. A luminescent layer (103) is formed on exposed portions of the first electrodes (102) and on the insulating films (109), and a plurality of second electrodes (101) are formed on the luminescent layer (103). Each of the plurality of insulating films (109) has a thickness which becomes gradually smaller toward a center line of each adjacent first electrode (102).

Abstract translation: 发光显示面板包括基板（106），形成在基板（106）上的多个第一电极（102）和形成在基板（106）上的多个绝缘膜（109），以覆盖每个第一 电极（102）并使其中心部分露出。 在第一电极（102）的暴露部分和绝缘膜（109）上形成发光层（103），在发光层（103）上形成多个第二电极（101）。 多个绝缘膜（109）中的每一个具有朝向相邻的第一电极（102）的中心线逐渐变小的厚度。

公开(公告)号：US06184698B2

公开(公告)日：2001-02-06

申请号：US09347867

申请日：1999-07-09

Applicant: Kenji Yoshida ,  Takashi Naito ,  Shigeru Murayama ,  Katsuhiko Sakamoto ,  Takashi Masaki

Inventor： Kenji Yoshida ,  Takashi Naito ,  Shigeru Murayama ,  Katsuhiko Sakamoto ,  Takashi Masaki

IPC: G01R3102

CPC classification number: H05K7/1007 ,  G01R1/0416 ,  H01R12/88

Abstract: A semiconductor component mounting apparatus for mounting a semiconductor component to test the electric characteristics of the semiconductor component, comprising: a contactor 20 with which the semiconductor component contacts; a substrate 30 which supplies an electric signal to the contactor 20; a plurality of connection components 40, each of which has an electric terminal 48 for supplying the electric signal to the substrate 30 and which is fixed to the substrate 30; a plurality of connectors 50 which has a contact pin 70 including a contact part 74 for contacting with the electric terminal 48 of the connection component 40, a housing 68 for holding the contact pin 70, a pushing part 78 for pushing the contact pin 70 to the electric terminal 48, and which is freely-detachably connected to one of the plurality of the connection components 40; a holder 80 which holds the plurality of the connectors 50; and a fixing part 86 which fixes the holder 80 to the substrate 30, wherein the contact part 74 slides along the electric terminal 48, while contacting with the electric terminal 48, when the pushing part 78 pushes the contact pin 70.

Abstract translation: 一种用于安装半导体部件以测试半导体部件的电特性的半导体部件安装装置，包括：半导体部件与其接触的接触器20; 将电信号提供给接触器20的基板30; 多个连接部件40，每个连接部件40具有用于将电信号提供到基板30并且固定到基板30的电端子48; 多个连接器50具有接触销70，该接触销70包括用于与连接部件40的电端子48接触的接触部分74，用于保持接触销70的壳体68，用于将接触销70推到的推动部分78 电气端子48，并且可自由拆卸地连接到多个连接部件40之一; 保持多个连接器50的保持器80; 以及固定部分86，其将保持器80固定到基板30，其中当推动部分78推动接触销70时，接触部分74在与电端子48接触的同时沿着电端子48滑动。