公开(公告)号：US20140015109A1

公开(公告)日：2014-01-16

申请号：US13917973

申请日：2013-06-14

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Saravjeet Singh ,  Todd Egan ,  Ajay Kumar ,  Seshadri Ramaswami

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Saravjeet Singh ,  Todd Egan ,  Ajay Kumar ,  Seshadri Ramaswami

IPC分类号： H01L21/78

CPC分类号： H01L23/32 ,  H01L21/463 ,  H01L21/47 ,  H01L21/475 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L21/82 ,  H01L27/04 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.

摘要翻译： 描述了切割半导体晶片和输送单个模具的方法。 在一个示例中，在其上划分具有多个集成电路的晶片的方法包括将晶片切割成设置在切割带上方的多个单片模具。 该方法还涉及在切割胶带上方的多个分割模具之上和之间形成水溶性材料层。

公开(公告)号：US08940619B2

公开(公告)日：2015-01-27

申请号：US13917973

申请日：2013-06-14

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Saravjeet Singh ,  Todd Egan ,  Ajay Kumar ,  Seshadri Ramaswami

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Aparna Iyer ,  Saravjeet Singh ,  Todd Egan ,  Ajay Kumar ,  Seshadri Ramaswami

IPC分类号： H01L21/78 ,  H01L21/463 ,  H01L21/47 ,  H01L21/475 ,  H01L21/82 ,  H01L21/56 ,  H01L21/683

CPC分类号： H01L23/32 ,  H01L21/463 ,  H01L21/47 ,  H01L21/475 ,  H01L21/561 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L21/82 ,  H01L27/04 ,  H01L2924/0002 ,  H01L2924/00

摘要： Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.

摘要翻译： 描述了切割半导体晶片和输送单个模具的方法。 在一个示例中，在其上划分具有多个集成电路的晶片的方法包括将晶片切割成设置在切割带上方的多个单片模具。 该方法还涉及在切割胶带上方的多个分割模具之上和之间形成水溶性材料层。

公开(公告)号：US20140011337A1

公开(公告)日：2014-01-09

申请号：US14023360

申请日：2013-09-10

申请人： James M. Holden ,  Wei-Sheng Lei ,  Brad Eaton ,  Todd Egan ,  Saravjeet Singh

发明人： James M. Holden ,  Wei-Sheng Lei ,  Brad Eaton ,  Todd Egan ,  Saravjeet Singh

IPC分类号： H01L21/78

CPC分类号： H01L21/78 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/67207 ,  H01L21/6836 ,  H01L2221/68327

摘要： Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.

摘要翻译： 具有多个IC的切割基板的方法。 一种方法包括在第一掩模材料层上形成包括可溶于半导体衬底上的溶剂的第一掩模材料层和不溶于溶剂的第二掩模材料层的多层掩模。 多层掩模用激光划线工艺图案化以提供具有间隙的图案化掩模。 图案化使IC之间的衬底的区域暴露。 然后通过图案化掩模中的间隙对衬底进行等离子体蚀刻，以用第二掩模材料层对IC进行分离，从而为等离子体蚀刻的至少一部分保护第一掩模材料层。 可溶性材料层在分离后溶解以除去多层掩模。

公开(公告)号：US08557682B2

公开(公告)日：2013-10-15

申请号：US13161427

申请日：2011-06-15

申请人： James M. Holden ,  Wei-Sheng Lei ,  Brad Eaton ,  Todd Egan ,  Saravjeet Singh

发明人： James M. Holden ,  Wei-Sheng Lei ,  Brad Eaton ,  Todd Egan ,  Saravjeet Singh

IPC分类号： H01L21/00

CPC分类号： H01L21/78 ,  B23K26/364 ,  B23K26/40 ,  B23K2103/172 ,  B23K2103/42 ,  B23K2103/50 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/67207 ,  H01L21/6836 ,  H01L2221/68327

摘要： Methods of dicing substrates having a plurality of ICs. A method includes forming a multi-layered mask comprising a first mask material layer soluble in a solvent over the semiconductor substrate and a second mask material layer, insoluble in the solvent, over the first mask material layer. The multi-layered mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then plasma etched through the gaps in the patterned mask to singulate the IC with the second mask material layer protecting the first mask material layer for at least a portion of the plasma etch. The soluble material layer is dissolved subsequent to singulation to remove the multi-layered mask.

摘要翻译： 具有多个IC的切割基板的方法。 一种方法包括在第一掩模材料层上形成包括可溶于半导体衬底上的溶剂的第一掩模材料层和不溶于溶剂的第二掩模材料层的多层掩模。 多层掩模用激光划线工艺图案化以提供具有间隙的图案化掩模。 图案化使IC之间的衬底的区域暴露。 然后通过图案化掩模中的间隙对衬底进行等离子体蚀刻，以用第二掩模材料层对IC进行分离，从而为等离子体蚀刻的至少一部分保护第一掩模材料层。 可溶性材料层在分离后溶解以除去多层掩模。

公开(公告)号：US09281244B1

公开(公告)日：2016-03-08

申请号：US14490598

申请日：2014-09-18

申请人： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

发明人： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/02 ,  H01L21/78 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/67 ,  H01J37/32 ,  B23K26/36

CPC分类号： H01L21/78 ,  B23K26/364 ,  H01J37/32889 ,  H01J2237/335 ,  H01L21/3065 ,  H01L21/3086 ,  H01L21/67207

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with an adaptive optics-controlled laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个例子中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模，该掩模由覆盖并保护集成电路的层组成。 然后用自适应光学控制激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以对集成电路进行分离。

公开(公告)号：US20160027697A1

公开(公告)日：2016-01-28

申请号：US14337810

申请日：2014-07-22

申请人： Wei-Sheng Lei ,  Prabhat Kumar ,  Jungrae Park ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Prabhat Kumar ,  Jungrae Park ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/822 ,  H01L21/033 ,  H01L21/67 ,  H01L21/02

CPC分类号： H01L21/822 ,  B23K26/0732 ,  B23K26/364 ,  B23K2103/56 ,  H01L21/02057 ,  H01L21/0337 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/31105 ,  H01L21/32131 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/78

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a top hat laser beam profile laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个例子中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模，该掩模由覆盖并保护集成电路的层组成。 然后用顶帽激光束轮廓激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以对集成电路进行分离。

公开(公告)号：US09209084B2

公开(公告)日：2015-12-08

申请号：US14454656

申请日：2014-08-07

申请人： Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/78 ,  H01L21/3065 ,  H01L21/82 ,  B23K26/00 ,  B23K26/06

CPC分类号： H01L21/78 ,  B23K26/0006 ,  B23K26/0624 ,  B23K26/50 ,  B23K26/53 ,  B23K26/57 ,  B23K2101/40 ,  B23K2103/56 ,  H01L21/3065 ,  H01L21/82

摘要： Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.

公开(公告)号：US09177861B1

公开(公告)日：2015-11-03

申请号：US14491728

申请日：2014-09-19

申请人： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

发明人： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/00 ,  H01L21/78 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/67 ,  H01J37/32 ,  B23K26/36 ,  B23K26/16

CPC分类号： H01L21/3065 ,  B23K26/0736 ,  B23K26/367 ,  B23K26/38 ,  B23K2103/56 ,  H01J37/32 ,  H01J37/32889 ,  H01J2237/334 ,  H01J2237/335 ,  H01L21/02057 ,  H01L21/30655 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/67069 ,  H01L21/67092 ,  H01L21/78

摘要： Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with an elliptical or a spatio-temporal controlled laser beam profile laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

摘要翻译： 对具有多个集成电路的每个晶片进行切割的半导体晶片的方法进行了说明。 在一个例子中，对具有多个集成电路的半导体晶片进行切割的方法包括在半导体晶片上形成掩模，该掩模由覆盖并保护集成电路的层组成。 然后用椭圆形或空间 - 时间控制的激光束轮廓激光划线工艺对掩模进行构图，以提供具有间隙的图案化掩模，暴露集成电路之间的半导体晶片的区域。 然后通过图案化掩模中的间隙对半导体晶片进行等离子体蚀刻，以对集成电路进行分离。

公开(公告)号：US09159621B1

公开(公告)日：2015-10-13

申请号：US14272101

申请日：2014-05-07

申请人： Wei-Sheng Lei ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/78 ,  H01L21/683

CPC分类号： H01L21/78 ,  H01L21/67092 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/68377

摘要： Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of scribing a semiconductor wafer having a plurality of integrated circuits involves adhering a backside of a semiconductor wafer to an inner portion of a carrier tape of a substrate carrier that includes a tape frame mounted above the carrier tape. The method also involves overlaying a protective frame above a front side of the semiconductor wafer and above an exposed outer portion of the carrier tape, the protective frame having an opening exposing an inner region of the front side of the semiconductor wafer. The method also involves laser scribing the front side of the semiconductor wafer with the protective frame in place.

摘要翻译： 对具有多个集成电路的各晶片的切割半导体晶片的方法和装置进行说明。 在一个示例中，划片具有多个集成电路的半导体晶片的方法包括将半导体晶片的背面粘附到包括安装在载带上方的带框架的基板载体的载带的内部。 该方法还包括将保护框架覆盖在半导体晶片的前侧上方并且在载带的暴露的外部部分上方，保护框架具有暴露半导体晶片的前侧的内部区域的开口。 该方法还包括用保护框架将半导体晶片的前侧激光划片到位。

公开(公告)号：US20150279739A1

公开(公告)日：2015-10-01

申请号：US14226038

申请日：2014-03-26

申请人： Wei-Sheng Lei ,  James S. Papanu ,  Aparna Iyer ,  Brad Eaton ,  Ajay Kumar

发明人： Wei-Sheng Lei ,  James S. Papanu ,  Aparna Iyer ,  Brad Eaton ,  Ajay Kumar

IPC分类号： H01L21/78 ,  H01L23/544

CPC分类号： H01L21/78 ,  H01L21/3065 ,  H01L21/6835 ,  H01L21/6836 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2224/11 ,  H01L2224/16145 ,  H01L2224/16225

摘要： Approaches for front side laser scribe plus backside bump formation and laser scribe and plasma etch dicing process are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof involves forming first scribe lines on the front side, between the integrated circuits, with a first laser scribing process. The method also involves forming arrays of metal bumps on a backside of the semiconductor wafer, each array corresponding to one of the integrated circuits. The method also involves forming second scribe lines on the backside, between the arrays of metal bumps, with a second laser scribing process, wherein the second scribe lines are aligned with the first scribe lines. The method also involves plasma etching the semiconductor wafer through the second scribe lines to singulate the integrated circuits.

摘要翻译： 描述了用于前侧激光划片加背面凸块形成和激光划线和等离子体蚀刻切割工艺的方法。 例如，在前侧具有集成电路的半导体晶片的切割方法包括在第一激光划线工序之间，在集成电路之间的正面侧形成第一划线。 该方法还涉及在半导体晶片的背面形成金属凸块阵列，每​​个阵列对应于一个集成电路。 该方法还涉及在金属凸块阵列之间的背侧，第二激光划线工艺之间形成第二刻划线，其中第二刻划线与第一划刻线对准。 该方法还包括通过第二划线等离子体蚀刻半导体晶片以对集成电路进行分离。