公开(公告)号：US06211549B1

公开(公告)日：2001-04-03

申请号：US09153295

申请日：1998-09-15

申请人： Hideyuki Funaki ,  Akio Nakagawa

发明人： Hideyuki Funaki ,  Akio Nakagawa

IPC分类号： H01L2976

CPC分类号： H01L27/0688 ,  H01L21/8221 ,  H01L29/7317 ,  H01L29/7397

摘要： A semiconductor device includes a first semiconductor element and a second semiconductor element, wherein the first semiconductor element of trench structure and the control circuit including the second semiconductor element such as a TFT or a bipolar transistor can be easily integrated by making the device structure such that the source layer of the buried gate electrode of the first semiconductor element and part of the second semiconductor element, such as the emitter or collector region, can be simultaneously formed.

摘要翻译： 半导体器件包括第一半导体元件和第二半导体元件，其中沟槽结构的第一半导体元件和包括诸如TFT或双极晶体管的第二半导体元件的控制电路可以通过使器件结构使得 可以同时形成第一半导体元件的掩埋栅电极的源极层和第二半导体元件的一部分，例如发射极或集电极区域。

公开(公告)号：US6163051A

公开(公告)日：2000-12-19

申请号：US154041

申请日：1998-09-16

申请人： Akio Nakagawa ,  Tomoko Matsudai ,  Hideyuki Funaki ,  Norio Yasuhara

发明人： Akio Nakagawa ,  Tomoko Matsudai ,  Hideyuki Funaki ,  Norio Yasuhara

IPC分类号： H01L21/331 ,  H01L29/06 ,  H01L29/739 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66325 ,  H01L29/0696 ,  H01L29/7394 ,  H01L29/7398

摘要： A high breakdown voltage semiconductor device comprising a first base region of a first conductivity type, a second base region of a second conductivity type, which is formed in a surface region of the first base region, a first gate insulation film formed on an inner wall of a first LOCOS groove formed passing through the second base region to reach the first base region, a first gate electrode formed on the first gate insulation film, a first source region of a first conductivity type, which is formed in a surface region of the second base region around the first LOCOS groove in such a manner as to contact with the first gate insulating film, a first drain region formed in a surface region of the first base region in such a manner as to be spaced apart from the second base region, a source electrode formed on the first source region and on the second base region, and a drain electrode formed on the first drain region.

摘要翻译： 一种高耐压电压半导体器件，包括第一导电类型的第一基极区域和形成在第一基极区域的表面区域中的第二导电类型的第二基极区域，形成在内壁上的第一栅极绝缘膜 形成为穿过第二基极区域以到达第一基极区域的第一LOCOS沟槽，形成在第一栅极绝缘膜上的第一栅极电极，形成在第一栅极绝缘膜的表面区域中的第一导电类型的第一源极区域， 第二基区，以与第一栅极绝缘膜接触的方式围绕第一LOCOS沟槽;第一漏极区，形成在第一基极区域的表面区域中，以与第二基极区域隔开; 形成在第一源极区域和第二基极区域上的源电极以及形成在第一漏极区域上的漏电极。

公开(公告)号：US6133617A

公开(公告)日：2000-10-17

申请号：US393273

申请日：1999-09-10

申请人： Keizo Hirayama ,  Hideyuki Funaki ,  Fumito Suzuki ,  Akio Nakagawa

发明人： Keizo Hirayama ,  Hideyuki Funaki ,  Fumito Suzuki ,  Akio Nakagawa

IPC分类号： H01L29/06 ,  H01L29/40 ,  H01L29/47 ,  H01L29/861 ,  H01L29/872 ,  H01L27/095 ,  H01L29/812 ,  H01L31/07

CPC分类号： H01L29/404 ,  H01L29/0692 ,  H01L29/8611 ,  H01L29/872 ,  Y10S257/928

摘要： Disclosed is a high breakdown voltage semiconductor device comprising a semiconductor substrate, an active layer consisting of a high resistivity semiconductor layer of a first conductivity type formed on the substrate with an insulating layer interposed therebetween, a first impurity region of the first conductivity type formed within the active layer, a second impurity region of a second conductivity type formed within the active layer, a third impurity region of the second conductivity type formed within the second impurity region and having a high impurity concentration, a first electrode being in ohmic contact with the first impurity region and the fourth impurity region, and a second electrode being in Schottky contact with the second impurity region and in ohmic contact with the third impurity region.

摘要翻译： 公开了一种高耐压电压半导体器件，包括半导体衬底，由在衬底上形成有绝缘层的第一导电类型的高电阻率半导体层组成的有源层，其间形成有第一导电类型的第一杂质区， 有源层，在有源层内形成的第二导电类型的第二杂质区，形成在第二杂质区内并具有高杂质浓度的第二导电类型的第三杂质区，第一电极与 第一杂质区和第四杂质区，以及与第二杂质区肖特基接触并与第三杂质区欧姆接触的第二电极。

公开(公告)号：US6133607A

公开(公告)日：2000-10-17

申请号：US82937

申请日：1998-05-22

申请人： Hideyuki Funaki ,  Akio Nakagawa

发明人： Hideyuki Funaki ,  Akio Nakagawa

IPC分类号： H01L29/739 ,  H01L29/76

CPC分类号： H01L29/7394

摘要： The present invention provides a semiconductor device having high-speed switching characteristics and high output characteristics. More specifically, the semiconductor device includes a second conductivity type drain layer having a low impurity concentration, for decreasing the efficiency of injecting holes, and a second conductivity type contact layer having a high impurity concentration, for avoiding an increase in contact resistance. With this structure, an increase in ON-state voltage can be avoided while improving the switching rate by the second conductivity type drain layer. That is, the present invention achieves high-speed switching characteristics and high output characteristics at the same time.

摘要翻译： 本发明提供一种具有高速开关特性和高输出特性的半导体器件。 更具体地，半导体器件包括具有低杂质浓度的第二导电类型漏极层，用于降低注入孔的效率，以及具有高杂质浓度的第二导电型接触层，以避免接触电阻的增加。 利用这种结构，可以避免在通过第二导电类型漏极层改善开关速率的同时增加导通电压。 也就是说，本发明同时实现高速开关特性和高输出特性。

公开(公告)号：US5777371A

公开(公告)日：1998-07-07

申请号：US716863

申请日：1996-09-20

申请人： Yusuke Kawaguchi ,  Yoshihiro Yamaguchi ,  Hideyuki Funaki

发明人： Yusuke Kawaguchi ,  Yoshihiro Yamaguchi ,  Hideyuki Funaki

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L29/7816 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/7801 ,  H01L29/7824 ,  H01L29/42368

摘要： A high-breakdown-voltage semiconductor device includes a high-resistance semiconductor layer, a drift layer of the first conductivity type selectively formed in the surface of the high-resistance semiconductor layer, a drain layer formed in the surface of the drift layer of the first conductivity type, base layers of the second conductivity type selectively formed in the surface of the high-resistance semiconductor layer, a plurality of island-shaped source layers of the first conductivity type formed in the surfaces of the base layers of the second conductivity type, a gate electrode formed on the base layers of the second conductivity type between the source layers of the first conductivity type and the drift layer of the first conductivity type and between adjacent source layers of the first conductivity type via a gate insulating film, a drain electrode which contacts the drain layer, and source electrodes which contact both the source layers of the first conductivity type and the base layers of the second conductivity type.

摘要翻译： 高耐压半导体器件包括高电阻半导体层，选择性地形成在高电阻半导体层的表面中的第一导电类型的漂移层，形成在所述高电阻半导体层的漂移层的表面中的漏极层 第一导电类型，选择性地形成在高电阻半导体层的表面中的第二导电类型的基极层，形成在第二导电类型的基极层的表面中的多个第一导电类型的岛状源极层 形成在第一导电类型的源极层和第一导电类型的漂移层之间的第二导电类型的基极层上的栅极电极和经由栅极绝缘膜的第一导电类型的相邻源极层之间， 与漏极层接触的电极以及接触第一导电类型的源极层的源电极 第二导电类型的基层。

公开(公告)号：US5438220A

公开(公告)日：1995-08-01

申请号：US085056

申请日：1993-07-02

申请人： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

发明人： Akio Nakagawa ,  Norio Yasuhara ,  Tomoko Matsudai ,  Yoshihiro Yamaguchi ,  Ichiro Omura ,  Hideyuki Funaki

IPC分类号： H01L21/336 ,  H01L21/74 ,  H01L21/762 ,  H01L27/06 ,  H01L27/092 ,  H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861

CPC分类号： H01L29/404 ,  H01L21/74 ,  H01L21/76264 ,  H01L21/76297 ,  H01L27/0623 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/405 ,  H01L29/407 ,  H01L29/408 ,  H01L29/66772 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78624 ,  H01L29/8611 ,  H01L21/76275 ,  H01L21/76286 ,  H01L29/78603 ,  H01L2924/0002

摘要： A high breakdown voltage semiconductor device includes a semiconductor substrate, an insulating layer formed on the semiconductor substrate, an active layer formed on the insulating layer and made of a high resistance semiconductor of a first conductivity type, a first impurity region of the first conductivity type formed in the active layer, and a second impurity region of a second conductivity type formed in the active layer and spaced apart from the first impurity region by a predetermined distance. The first impurity region is formed of diffusion layers. The diffusion layers are superimposed one upon another and differ in diffusion depth or diffusion window width, or both.

摘要翻译： 高耐压半导体器件包括半导体衬底，形成在半导体衬底上的绝缘层，形成在绝缘层上并由第一导电类型的高电阻半导体形成的有源层，第一导电类型的第一杂质区 形成在有源层中的第二杂质区和形成在有源层中并与第一杂质区隔开预定距离的第二导电类型的第二杂质区。 第一杂质区由扩散层形成。 扩散层彼此叠加并且扩散深度或扩散窗宽度不同，或两者均不同。

公开(公告)号：US09136290B2

公开(公告)日：2015-09-15

申请号：US13416036

申请日：2012-03-09

申请人： Kazuhiro Suzuki ,  Risako Ueno ,  Honam Kwon ,  Mitsuyoshi Kobayashi ,  Hideyuki Funaki

发明人： Kazuhiro Suzuki ,  Risako Ueno ,  Honam Kwon ,  Mitsuyoshi Kobayashi ,  Hideyuki Funaki

IPC分类号： H01L27/146

CPC分类号： H01L27/14618 ,  H01L24/32 ,  H01L27/14627 ,  H01L27/14685 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

摘要： According to one embodiment, a solid state imaging device includes a sensor substrate having a plurality of pixels formed on an upper face, a microlens array substrate having a plurality of microlenses formed and a connection post with one end bonded to a region between the microlenses on the microlens array substrate and with the other end bonded to the upper face.

摘要翻译： 根据一个实施例，固态成像装置包括具有形成在上表面上的多个像素的传感器基板，形成有多个微透镜的微透镜阵列基板和一端连接到微透镜之间的区域的连接柱 微透镜阵列基板并且另一端结合到上表面。

公开(公告)号：US09094594B2

公开(公告)日：2015-07-28

申请号：US13039508

申请日：2011-03-03

申请人： Mitsuyoshi Kobayashi ,  Hideyuki Funaki ,  Risako Ueno

发明人： Mitsuyoshi Kobayashi ,  Hideyuki Funaki ,  Risako Ueno

IPC分类号： H04N7/18 ,  H04N5/225 ,  G01C3/08 ,  G01C3/10

CPC分类号： H04N5/2254 ,  G01C3/08 ,  G01C3/10

摘要： According to an embodiment, a solid-state imaging device includes: an imaging device including an imaging area including a plurality of pixel blocks each of which includes a plurality of pixels; an image formation lens forming an image on an image formation plane by using light from a subject; an aperture unit including a plurality of aperture elements provided to associate with the plurality of pixel blocks, each of the aperture elements having an aperture portion and a shield portion, light from the image formation lens being filtered by each aperture element; a microlens array including a plurality of microlenses provided to associate with the plurality of aperture elements, each of the microlenses forming an image in the imaging area by using light filtered by an associated aperture element; and a signal processing circuit configured to process a signal of an image taken in the imaging area and estimates a distance to the subject.

摘要翻译： 根据实施例，固态成像装置包括：成像装置，其包括具有包括多个像素的多个像素块的成像区域; 图像形成透镜，通过使用来自被摄体的光在图像形成平面上形成图像; 一个光圈单元，包括多个孔眼元件，设置成与多个像素块相关联，每个孔元件具有孔部分和屏蔽部分，来自图像形成透镜的光被每个孔元件过滤; 微透镜阵列，包括设置成与所述多个孔元件相关联的多个微透镜，所述微透镜中的每一个通过使用由相关孔径元件过滤的光在所述成像区域中形成图像; 以及信号处理电路，被配置为处理在成像区域中拍摄的图像的信号，并估计到被摄体的距离。

公开(公告)号：US08937274B2

公开(公告)日：2015-01-20

申请号：US13713304

申请日：2012-12-13

申请人： Risako Ueno ,  Hiroto Honda ,  Mitsuyoshi Kobayashi ,  Kazuhiro Suzuki ,  Honam Kwon ,  Hideyuki Funaki

发明人： Risako Ueno ,  Hiroto Honda ,  Mitsuyoshi Kobayashi ,  Kazuhiro Suzuki ,  Honam Kwon ,  Hideyuki Funaki

IPC分类号： H01L27/00 ,  H01L27/146

CPC分类号： H01L27/146 ,  H01L27/14605 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14645

摘要： A solid-state imaging device according to an embodiment includes: an imaging element including a semiconductor substrate and a plurality of pixel blocks, each of the pixel blocks including at least two of R pixels, G pixels, B pixels, and W pixels; a first optical system configured to form an image of an object on an imaging plane; and a second optical system including a microlens array having a plurality of microlenses provided for the respective pixels blocks, the second optical system being located between the imaging element and the first optical system, the second optical system being configured to reduce and re-image the image formed on the imaging plane onto each of the pixel blocks. A proportion of the W pixels to be provided increases in a direction from a center of each pixel block toward an outer periphery thereof.

摘要翻译： 根据实施例的固态成像装置包括：成像元件，包括半导体衬底和多个像素块，每个像素块包括R像素，G像素，B像素和W像素中的至少两个; 第一光学系统，被配置为在成像平面上形成物体的图像; 以及第二光学系统，其包括具有为各个像素块设置的多个微透镜的微透镜阵列，所述第二光学系统位于所述成像元件和所述第一光学系统之间，所述第二光学系统被配置为减小并重新成像 在成像平面上形成的每个像素块上的图像。 要提供的W像素的比例在从每个像素块的中心朝向其外周的方向上增加。

公开(公告)号：US08711267B2

公开(公告)日：2014-04-29

申请号：US13039502

申请日：2011-03-03

申请人： Risako Ueno ,  Yoshinori Iida ,  Hideyuki Funaki

发明人： Risako Ueno ,  Yoshinori Iida ,  Hideyuki Funaki

IPC分类号： H04N5/225 ,  G02B13/16

CPC分类号： H04N9/045

摘要： According to an embodiment, a solid-state imaging device includes: an imaging element formed on a semiconductor substrate; a first optical system configured to focus an image of a subject on an imaging plane; a second optical system including a microlens array including a plurality of microlenses corresponding to the pixel blocks, and re-focusing the image of the imaging plane onto the pixel blocks corresponding to the respective microlenses; a first filter placed on the second optical system, and including a plurality of first color filters corresponding to the microlenses; and a second filter placed on the imaging element, and including a plurality of second color filters corresponding to the first color filters of the first filter. The first and second filters are designed so that the first and second color filters deviate to a periphery of the imaging area, the deviation becoming larger toward the periphery of the imaging area.

摘要翻译： 根据实施例，固态成像装置包括：形成在半导体衬底上的成像元件; 配置成将被摄体的图像聚焦在成像平面上的第一光学系统; 包括微透镜阵列的第二光学系统，所述微透镜阵列包括对应于所述像素块的多个微透镜，以及将所述成像平面的图像重新聚焦到与所述各个微透镜相对应的像素块上; 放置在第二光学系统上的第一滤光器，并且包括对应于微透镜的多个第一滤色器; 以及放置在成像元件上的第二滤光器，并且包括与第一滤光器的第一滤色器相对应的多个第二滤色器。 第一滤波器和第二滤波器被设计成使得第一和第二滤色器偏离成像区域的周边，偏离朝向成像区域的周围变大。