MULTI-GATE LATERAL OVERFLOW INTEGRATION CAPACITOR SENSOR

    公开(公告)号:US20210183926A1

    公开(公告)日:2021-06-17

    申请号:US16717768

    申请日:2019-12-17

    Abstract: A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.

    Pixel array with embedded split pixels for high dynamic range imaging

    公开(公告)号:US10334191B1

    公开(公告)日:2019-06-25

    申请号:US15910883

    申请日:2018-03-02

    Abstract: A pixel cell includes a second photodiode laterally surrounding a first photodiode in semiconductor material. The first and second photodiodes are adapted to photogenerate image charge in response to incident light. A floating diffusion is disposed in the semiconductor material proximate to an outer perimeter of the second photodiode. A first transfer gate is disposed proximate to the semiconductor material over a first channel region between the first and second photodiodes. The first transfer gate is coupled to transfer the image charge from the first photodiode to the second photodiode. A second transfer gate is disposed proximate to the semiconductor material over a second channel region between the second photodiode and the floating diffusion. The second transfer gate is coupled to transfer the image charge from the second photodiode to the floating diffusion.

    Low noise CMOS image sensor by stack architecture

    公开(公告)号:US10218924B2

    公开(公告)日:2019-02-26

    申请号:US15485534

    申请日:2017-04-12

    Abstract: A pixel circuit for use in a high dynamic range (HDR) image sensor includes a photodiode and a floating diffusion is disposed in the first semiconductor wafer. A transfer transistor is disposed in the first semiconductor wafer and is adapted to be switched on to transfer the charge carriers photogenerated in the photodiode to the floating diffusion. An in-pixel capacitor is disposed in a second semiconductor wafer. The first semiconductor wafer is stacked with and coupled to the second semiconductor wafer. A dual floating diffusion (DFD) transistor is disposed in the first semiconductor wafer. The in-pixel capacitor is selectively coupled to the floating diffusion through the DFD transistor. The floating diffusion is set to low conversion gain in response to the in-pixel capacitor being coupled to the floating diffusion, and high conversion gain in response to the in-pixel capacitor being decoupled from the floating diffusion.

    Apparatus and method for low dark current floating diffusion

    公开(公告)号:US10103193B1

    公开(公告)日:2018-10-16

    申请号:US15668207

    申请日:2017-08-03

    Abstract: An apparatus and method for a low dark current floating diffusion is discussed. An example method includes coupling a photodiode to a floating diffusion through a transfer gate where a gate terminal of the transfer gate is provided a first voltage, resetting the floating diffusion, repetitively sampling image charge on the photodiode a plurality of times, where the sampled image charge is coupled to the floating diffusion, and where the gate terminal of the transfer gate is provided a second voltage less than the first voltage during each sampling of the image charge, while repetitively sampling the image charge, coupling an additional capacitance to the floating diffusion, where a first capacitance voltage is applied to the additional capacitance during the sampling, and performing correlated double sampling of the sampled image charge.

    Storage gate protection
    47.
    发明授权

    公开(公告)号:US09859311B1

    公开(公告)日:2018-01-02

    申请号:US15362391

    申请日:2016-11-28

    Abstract: A backside illuminated image sensor includes a semiconductor material with a plurality of photodiodes disposed in the semiconductor material, and a transfer gate electrically coupled to a photodiode in the plurality of photodiodes to extract image charge from the photodiode. The image sensor also includes a storage gate electrically coupled to the transfer gate to receive the image charge from the transfer gate. The storage gate has a gate electrode disposed proximate to a frontside of the semiconductor material, an optical shield disposed in the semiconductor material, and a storage node disposed between the gate electrode and the optical shield. The optical shield is optically aligned with the storage node to prevent the image light incident on the backside illuminated image sensor from reaching the storage node.

    High speed rolling image sensor with ADM architecture and method of implementing thereof

    公开(公告)号:US09749569B2

    公开(公告)日:2017-08-29

    申请号:US14979058

    申请日:2015-12-22

    Abstract: High speed rolling image sensor includes pixel array disposed in first semiconductor die, readout circuits disposed in second semiconductor die and conductors. Pixel array is partitioned into pixel sub-arrays (PSAs). Each of the PSAs includes a plurality of pixels. Pixel groups include pixels that are non-contiguous, non-overlapping and distinct. Each pixel group includes pixels from different PSAs. Each pixel group is coupled to a corresponding analog-to-digital converter and memory unit tiles (ADMs) respectively included in readout circuits. ADMs respectively include (i) analog-to-digital (ADC) circuits that convert the image data from pixel groups from analog to digital to obtain ADC outputs, and (ii) memory units to store ADC outputs. Conductors are coupling pixel array to ADMs. Conductors include number of conductors per column of pixel array. Number of conductors per column of pixel array may be equal to number of pixels in PSA arranged in same column. Other embodiments are described.

    Image sensor including peak hold circuit

    公开(公告)号:US12281937B1

    公开(公告)日:2025-04-22

    申请号:US18542439

    申请日:2023-12-15

    Abstract: A pixel circuit includes: a photodiode configured to operate in a photovoltaic mode and to accumulate charges corresponding to an incident light amount; a reset transistor configured to reset the accumulated charges of the photodiode; and a peak hold circuit configured to hold an output corresponding to the accumulated charges of the photodiode, the peak hold circuit including a peak hold transistor connected to an output end of the photodiode, a switching transistor configured to turn on/off an output of the peak hold transistor, and a holding capacitor configured to hold an output of the switching transistor. The peak hold transistor operates in a state where no carrier charge or only one carrier charge is present on a channel.

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