公开(公告)号：US09704732B2

公开(公告)日：2017-07-11

申请号：US13599548

申请日：2012-08-30

申请人： Yisung Hwang ,  Jungchul Lee ,  Jaehong Kim ,  Taegyeong Chung

发明人： Yisung Hwang ,  Jungchul Lee ,  Jaehong Kim ,  Taegyeong Chung

IPC分类号： H01L21/46 ,  H01L21/58 ,  B65H29/00 ,  H01L21/67

CPC分类号： H01L21/67144 ,  H01L2924/0002 ,  Y10T156/1744 ,  Y10T156/1746 ,  Y10T156/1761 ,  Y10T156/1776 ,  H01L2924/00

摘要： An apparatus for bonding semiconductor chips may comprise transfer rails configured to transfer substrates, loading members configured to load the substrates onto the transfer rails, unloading members configured to unload the substrates from the transfer rails, a first wafer supply unit configured to supply a first wafer including semiconductor chips, and/or a bonding unit configured to bond the semiconductor chips to the substrates. An apparatus for bonding semiconductor chips may comprise a transfer rail configured to transfer substrates, loading members configured to load the substrates onto the transfer rail, unloading members configured to unload the substrates from the transfer rail, a buffer member at a side of the transfer rail configured to temporarily receive the substrates loaded by the loading members, a first wafer supply unit configured to supply a first wafer including semiconductor chips, and/or a bonding unit configured to bond the semiconductor chips to the substrates.

公开(公告)号：US09368414B2

公开(公告)日：2016-06-14

申请号：US14602284

申请日：2015-01-22

申请人： Seung Hyeon Baek ,  Jaehong Kim

发明人： Seung Hyeon Baek ,  Jaehong Kim

IPC分类号： H01L21/66 ,  H01L21/56 ,  H01L25/00 ,  G01N21/95 ,  H01L23/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L22/12 ,  G01N21/9501 ,  H01L21/563 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/131 ,  H01L2224/14131 ,  H01L2224/14133 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83104 ,  H01L2224/92125 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/00014

摘要： A method of manufacturing a semiconductor device includes: preparing a semiconductor device comprising a first substrate, a second substrate disposed on the first substrate, inner terminals disposed between the first and second substrates, and a filling material disposed between the first and second substrates and between the inner terminals; loading the semiconductor device on a stage; irradiating an electromagnetic wave to the filling material in a direction parallel to a top surface of the first substrate by an electromagnetic wave generating unit; and scanning the filling material as the electromagnetic wave generating unit is moved in relation to the stage in a direction along a first side of the semiconductor device while maintaining the irradiating direction of the electromagnetic wave.

摘要翻译： 一种制造半导体器件的方法包括：制备半导体器件，其包括第一衬底，设置在第一衬底上的第二衬底，设置在第一和第二衬底之间的内部端子以及设置在第一和第二衬底之间以及介于 内部终端; 将半导体器件装载在台上; 通过电磁波产生单元在与第一基板的顶表面平行的方向上向填充材料照射电磁波; 并且当电磁波产生单元沿着半导体器件的第一侧的方向相对于载物台移动同时保持电磁波的照射方向时扫描填充材料。

公开(公告)号：US09100627B2

公开(公告)日：2015-08-04

申请号：US13046495

申请日：2011-03-11

申请人： Jaehong Kim ,  Haesoo Lee ,  Woohyun Paik

发明人： Jaehong Kim ,  Haesoo Lee ,  Woohyun Paik

IPC分类号： H04N7/18 ,  H04N5/63 ,  H04N5/445 ,  H04N21/433 ,  H04N21/442 ,  H04N21/458 ,  H04N21/478

CPC分类号： H04N5/63 ,  H04N5/44543 ,  H04N21/4334 ,  H04N21/44209 ,  H04N21/458 ,  H04N21/478

摘要： An electronic device and a method of controlling the electronic device are provided. The electronic device includes a broadcast receiving unit that receives a broadcast content, a communication unit that receives power information associated with a mart grid, the power information including at least one of per-time slot electricity rate information and power demand information, and a controller that selectively performs one of an operation of outputting the broadcast content received through the broadcast receiving unit and an operation of storing the received broadcast content in an internal memory or an external memory considering the received power information.

摘要翻译： 提供了电子设备和控制电子设备的方法。 电子设备包括：广播接收单元，其接收广播内容;通信单元，其接收与市场网格相关联的功率信息;所述功率信息包括每时隙电费信息和功率需求信息中的至少一个;以及控制器 选择性地执行输出通过广播接收单元接收的广播内容的操作中的一种，以及考虑所接收的功率信息将接收的广播内容存储在内部存储器或外部存储器中的操作。

公开(公告)号：US08773922B2

公开(公告)日：2014-07-08

申请号：US12614545

申请日：2009-11-09

申请人： Seung-Hwan Song ,  Jaehong Kim ,  Kyoung Lae Cho ,  Yong June Kim ,  Jun Jin Kong ,  Jong Han Kim

发明人： Seung-Hwan Song ,  Jaehong Kim ,  Kyoung Lae Cho ,  Yong June Kim ,  Jun Jin Kong ,  Jong Han Kim

IPC分类号： G11C7/06

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C29/00 ,  G11C2211/5634

摘要： A non-volatile semiconductor memory device and related method of determining a read voltage are disclosed. The non-volatile semiconductor memory device includes; a memory cell array including a plurality of memory cells, a read voltage determination unit configured to determine an optimal read voltage by comparing reference data obtained during a program operation with comparative data obtained during a subsequent read operation and changing a current read voltage to a new read voltage based on a result of the comparison, and a read voltage generation unit configured to generate the new read voltage in response to a read voltage control signal provided by the read voltage determination unit.

摘要翻译： 公开了一种非易失性半导体存储器件及确定读取电压的相关方法。 非易失性半导体存储器件包括： 包括多个存储单元的存储单元阵列，读电压确定单元，被配置为通过将在编程操作期间获得的参考数据与在随后的读取操作期间获得的比较数据进行比较来确定最佳读取电压，并将当前读取电压改变为新的 基于比较结果的读取电压和读取电压生成单元，被配置为响应于由读取电压确定单元提供的读取电压控制信号而产生新的读取电压。

公开(公告)号：US08711624B2

公开(公告)日：2014-04-29

申请号：US13236249

申请日：2011-09-19

申请人： Seonghyeog Choi ,  Hong Rak Son ,  Junjin Kong ,  Jaehong Kim ,  KyoungLae Cho ,  Yong June Kim

发明人： Seonghyeog Choi ,  Hong Rak Son ,  Junjin Kong ,  Jaehong Kim ,  KyoungLae Cho ,  Yong June Kim

IPC分类号： G11C11/34

CPC分类号： G11C11/5621 ,  G11C16/10 ,  G11C16/3404

摘要： A memory device includes a memory cell array, a self interleaver configured to interleave and load data on the fly into a buffer circuit using an interleaving scheme, and a control logic configured to control programming of the interleaved data in the memory cell array.

摘要翻译： 存储器装置包括存储单元阵列，配置成使用交织方案将数据进行交错和加载到缓冲电路中的自交织器以及被配置为控制对存储单元阵列中的交错数据的编程的控制逻辑。

公开(公告)号：US08706953B2

公开(公告)日：2014-04-22

申请号：US13096036

申请日：2011-04-28

申请人： Kyoung Lae Cho ,  Kwang Ho Kim ,  Jun Jin Kong ,  Jaehong Kim ,  Hong Rak Son

发明人： Kyoung Lae Cho ,  Kwang Ho Kim ,  Jun Jin Kong ,  Jaehong Kim ,  Hong Rak Son

IPC分类号： G06F12/02

CPC分类号： H03M7/30

摘要： A method of storing data in a storage medium of a data storage device comprises storing input data in the storage medium, and reading the input data from the storage medium and compressing the read data during a background operation of the data storage device.

摘要翻译： 一种在数据存储装置的存储介质中存储数据的方法包括将输入数据存储在存储介质中，并从存储介质读取输入数据，并在数据存储装置的后台操作期间压缩读取的数据。

公开(公告)号：US08583982B2

公开(公告)日：2013-11-12

申请号：US12073883

申请日：2008-03-11

申请人： Jaehong Kim ,  Jun Jin Kong

发明人： Jaehong Kim ,  Jun Jin Kong

IPC分类号： G06F11/00

CPC分类号： H03M13/29 ,  H03M13/2951 ,  H04L1/0051 ,  H04L1/0065

摘要： A concatenated decoder and concatenated decoding method are provided. The concatenated decoder, including: an inner decoder to receive an input bit stream, inner-decode the received input bit stream, and generate a first bit stream; and an outer decoder to generate error information about the received first bit stream, according to the generated error information, transmit an iterative decoding continuation request to the inner decoder or outer-decode the first bit stream to generate a second bit stream.

公开(公告)号：US08485000B2

公开(公告)日：2013-07-16

申请号：US12845596

申请日：2010-07-28

申请人： Minkyu Lim ,  Myoungjong Kim ,  Deokjoon Jeong ,  Yeonsik Choi ,  Sunhwa Yu ,  Jaehong Kim ,  Bohyoung Lee

发明人： Minkyu Lim ,  Myoungjong Kim ,  Deokjoon Jeong ,  Yeonsik Choi ,  Sunhwa Yu ,  Jaehong Kim ,  Bohyoung Lee

IPC分类号： D06F29/00 ,  D06F35/00

CPC分类号： D06F58/203 ,  D06F25/00 ,  D06F39/022

摘要： A clothes treating apparatus having a liquid reservoir comprises a body having a drum therein, a liquid spraying means configured to spray liquid into the drum, a reservoir installation portion disposed at an inner upper portion of the body, a coupling means slidably installed in the reservoir installation portion, and a liquid reservoir detachably fixed into the coupling means and having an outlet on a side surface thereof, wherein a cut-out portion communicated with the reservoir installation portion and through which the liquid reservoir passes is formed on an upper surface of the body, and the liquid reservoir is connected to the liquid spraying means by sliding movement of the coupling means.

摘要翻译： 具有液体储存器的衣物处理装置包括其中具有鼓的主体，配置成将液体喷射到滚筒中的液体喷射装置，设置在主体的内部上部的储存器安装部分，可滑动地安装在储存器中的联接装置 安装部分和可拆卸地固定到联接装置中并且在其侧表面上具有出口的液体储存器，其中与储存器安装部分连通并且液体储存器通过的切口部分形成在 并且液体储存器通过联接装置的滑动运动连接到液体喷射装置。

公开(公告)号：US08370710B2

公开(公告)日：2013-02-05

申请号：US12507096

申请日：2009-07-22

申请人： Yong June Kim ,  Jaehong Kim ,  Junjin Kong

发明人： Yong June Kim ,  Jaehong Kim ,  Junjin Kong

IPC分类号： G11C29/00

CPC分类号： H03M13/373 ,  G06F11/1068 ,  H03M13/13 ,  H03M13/455

摘要： Provided are data processing methods for a non-volatile memory. The data processing methods include obtaining read data and erasure information from the non-volatile memory and correcting an error in the read data by referencing the erasure information obtained from the non-volatile memory. Memory systems may be provided. Such memory systems may include a non-volatile memory and a memory controller that is operable to perform an error correction operation according to the methods described herein.

摘要翻译： 提供了用于非易失性存储器的数据处理方法。 数据处理方法包括从非易失性存储器获取读取数据和擦除信息，并通过参考从非易失性存储器获取的擦除信息来校正读取数据中的错误。 可以提供存储器系统。 这样的存储器系统可以包括非易失性存储器和可操作以根据本文所述的方法执行纠错操作的存储器控​​制器。

公开(公告)号：US08316279B2

公开(公告)日：2012-11-20

申请号：US12607768

申请日：2009-10-28

申请人： Jaehong Kim ,  Yong June Kim ,  Seung Hwan Song

发明人： Jaehong Kim ,  Yong June Kim ,  Seung Hwan Song

IPC分类号： G11C29/00

CPC分类号： H03M13/1108 ,  G06F11/1072

摘要： A method, implemented by at least an error correction code (ECC) decoder and a controller, estimates and corrects errors in memory cells. The method includes identifying a first candidate group of memory cells having an error-generation possibility using a first method for error estimation; identifying a second candidate group of memory cells having an error-generation possibility using a second method for error estimation; and correcting errors in at least one cell commonly included in the first and second candidate groups.

摘要翻译： 至少由纠错码（ECC）解码器和控制器实施的方法估计并校正存储器单元中的错误。 该方法包括使用第一种误差估计方法来识别具有错误产生可能性的存储器单元的第一候选组; 使用用于错误估计的第二方法识别具有错误生成可能性的第二候选组存储器单元; 以及校正通常包括在第一和第二候选组中的至少一个单元中的错误。