公开(公告)号：US10163626B2

公开(公告)日：2018-12-25

申请号：US15375266

申请日：2016-12-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ming-Huei Lin ,  Yen-Yu Chen ,  Chih-Pin Tsao ,  Shih-Hsun Chang

IPC: H01L21/8234 ,  H01L21/02 ,  H01L29/06 ,  H01L29/78 ,  H01L29/66 ,  H01L21/768

Abstract: An NMOS transistor gate structure includes at least one spacer defining a gate region over a semiconductor substrate, a gate dielectric layer disposed on the gate region and lining an inner sidewall of the spacer, a bottom barrier layer conformally disposed on the gate dielectric layer, a work function metal layer disposed on the bottom barrier layer, and a filling metal partially wrapped by the work function metal layer. The bottom barrier layer has an oxygen concentration higher than a nitrogen concentration. The bottom barrier layer is in direct contact with the gate dielectric layer. The bottom barrier layer includes a material selected from Ta, TaN, TaTi, TaTiN and a combination thereof.

公开(公告)号：US20180083001A1

公开(公告)日：2018-03-22

申请号：US15272500

申请日：2016-09-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Yu Chen ,  Ming-Huei Lin ,  Chih-Pin Tsao ,  Shih-Hsun Chang

IPC: H01L27/088 ,  H01L29/49 ,  H01L29/423 ,  H01L21/28 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/28088 ,  H01L21/823431 ,  H01L21/82345 ,  H01L27/088 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a first semiconductor channel, a second semiconductor channel, a first gate stack and a second gate stack. The first gate stack is present on the first semiconductor channel. The second gate stack is present on the second semiconductor channel. The first gate stack and the second gate stack are different at least in tantalum nitride amount.

公开(公告)号：US09922976B1

公开(公告)日：2018-03-20

申请号：US15272500

申请日：2016-09-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Yu Chen ,  Ming-Huei Lin ,  Chih-Pin Tsao ,  Shih-Hsun Chang

IPC: H01L27/10 ,  H01L27/088 ,  H01L29/49 ,  H01L29/423 ,  H01L21/28 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/28088 ,  H01L21/823431 ,  H01L21/82345 ,  H01L27/088 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device includes a first semiconductor channel, a second semiconductor channel, a first gate stack and a second gate stack. The first gate stack is present on the first semiconductor channel. The second gate stack is present on the second semiconductor channel. The first gate stack and the second gate stack are different at least in tantalum nitride amount.

公开(公告)号：US12176253B2

公开(公告)日：2024-12-24

申请号：US18341506

申请日：2023-06-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Hao Cheng ,  Hsuan-Chih Chu ,  Yen-Yu Chen ,  Yi-Ming Dai

IPC: H01L21/66 ,  C23C14/35 ,  C23C14/54 ,  H01J37/32 ,  H01J37/34

Abstract: A deposition system provides a feature that may reduce costs of the sputtering process by increasing a target change interval. The deposition system provides an array of magnet members which generate a magnetic field and redirect the magnetic field based on target thickness measurement data. To adjust or redirect the magnetic field, at least one of the magnet members in the array tilts to focus on an area of the target where more target material remains than other areas. As a result, more ion, e.g., argon ion bombardment occurs on the area, creating more uniform erosion on the target surface.

公开(公告)号：US12131949B2

公开(公告)日：2024-10-29

申请号：US18362676

申请日：2023-07-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Yu Chen ,  Chung-Liang Cheng

IPC: H01L21/768 ,  H01L21/225 ,  H01L21/311 ,  H01L29/40 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L21/76879 ,  H01L21/2254 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76865 ,  H01L21/76876 ,  H01L21/76882 ,  H01L29/401 ,  H01L29/41791 ,  H01L21/31122 ,  H01L21/76831 ,  H01L29/456

Abstract: A method includes etching a dielectric layer to form a trench in the dielectric layer, depositing a metal layer extending into the trench, performing a nitridation process on the metal layer to convert a portion of the metal layer into a metal nitride layer, performing an oxidation process on the metal nitride layer to form a metal oxynitride layer, removing the metal oxynitride layer, and filling a metallic material into the trench using a bottom-up deposition process to form a contact plug.

公开(公告)号：US12104268B2

公开(公告)日：2024-10-01

申请号：US18340299

申请日：2023-06-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Zong-Kun Lin ,  Hsuan-Chih Chu ,  Chien-Hsun Pan ,  Yen-Yu Chen ,  Yi-Ming Dai

IPC: C25D21/06 ,  B01D61/18 ,  B01D63/16

CPC classification number: C25D21/06 ,  B01D61/18 ,  B01D63/16 ,  B01D2311/2642 ,  B01D2313/18 ,  B01D2313/44

Abstract: The treatment system provides a feature that may reduce cost of the electrochemical plating process by reusing the virgin makeup solution in the spent electrochemical plating bath. The treatment system provides a rotating filter shaft which receives the spent electrochemical plating bath and captures the additives and by-products created by the additives during the electrochemical plating process. To capture the additives and the by-products, the rotating filter shaft includes one or more types of membranes. Materials such as semi-permeable membrane are used to capture the used additives and by-products in the spent electrochemical plating bath. The treatment system may be equipped with an electrochemical sensor to monitor a level of additives in the filtered electrochemical plating bath.

公开(公告)号：US12057478B2

公开(公告)日：2024-08-06

申请号：US17837859

申请日：2022-06-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Yu Chen ,  Chung-Liang Cheng

IPC: H01L29/06 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/08 ,  H01L29/10 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L29/0673 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L27/0886 ,  H01L29/0847 ,  H01L29/1037 ,  H01L29/4966 ,  H01L29/517

Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes first and second pair of source/drain regions disposed on a substrate, first and second nanostructured channel regions, and first and second gate structures with effective work function values different from each other. The first and second gate structures include first and second high-K gate dielectric layers, first and second barrier metal layers with thicknesses different from each, first and second work function metal (WFM) oxide layers with thicknesses substantially equal to each other disposed on the first and second barrier metal layers, respectively, a first dipole layer disposed between the first WFM oxide layer and the first barrier metal layer, and a second dipole layer disposed between the second WFM oxide layer and the second barrier metal layer.

公开(公告)号：US12033965B2

公开(公告)日：2024-07-09

申请号：US18312325

申请日：2023-05-04

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Wen-Hao Cheng ,  Yen-Yu Chen ,  Chih-Wei Lin ,  Yi-Ming Dai

IPC: H01L23/00 ,  H01L21/56 ,  H01L21/768 ,  H01L23/31 ,  H01L23/522

CPC classification number: H01L24/03 ,  H01L21/56 ,  H01L21/76802 ,  H01L21/76888 ,  H01L23/3171 ,  H01L23/5226 ,  H01L24/08

Abstract: A method is provided. The method includes forming an interconnect structure electrically connected to a semiconductor device; forming a tantalum-based barrier layer over the interconnect structure; oxidizing the tantalum-based barrier layer to form a tantalum oxide over the tantalum-based barrier layer; and forming a metal layer over the tantalum oxide.

公开(公告)号：US11978781B2

公开(公告)日：2024-05-07

申请号：US17459885

申请日：2021-08-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Anhao Cheng ,  Fang-Ting Kuo ,  Yen-Yu Chen

IPC: H01L29/49 ,  H01L21/28 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/40 ,  H01L29/423 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L29/495 ,  H01L21/28176 ,  H01L21/82345 ,  H01L21/823456 ,  H01L21/823462 ,  H01L29/401 ,  H01L29/4236 ,  H01L29/42364 ,  H01L29/4238 ,  H01L29/518 ,  H01L29/66545 ,  H01L27/088 ,  H01L29/4975

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate containing a first active region in a first region of the substrate and a second active region in a second region of the substrate, a plurality of first gate structures over the first active region each including a first gate stack having a first high-k gate dielectric and a first gate electrode and first gate spacers surrounding the first gate stack, and a plurality of second gate structures over the second active region each including a second gate stack having a second high-k gate dielectric and a second gate electrode and second gate spacers surrounding the second gate stack. At least a portion of the second gate electrode comprises dopants.

公开(公告)号：US11920237B2

公开(公告)日：2024-03-05

申请号：US17869174

申请日：2022-07-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wen-Hao Cheng ,  Yen-Yu Chen ,  Yi-Ming Dai

IPC: C23C16/02 ,  C23C14/02 ,  C23C14/34 ,  C23C16/34 ,  C23C16/458 ,  C23C16/46

CPC classification number: C23C16/0245 ,  C23C14/021 ,  C23C14/34 ,  C23C16/34 ,  C23C16/4583 ,  C23C16/463 ,  H01L2224/77185

Abstract: The present disclosure provides a multifunction chamber having a multifunctional shutter disk. The shutter disk includes a lamp device, a DC/RF power device, and a gas line on one surface of the shutter disk. With this configuration, simplifying the chamber type is possible as the various specific, dedicated chambers such as a degas chamber, a pre-clean chamber, a CVD/PVD chamber are not required. By using the multifunctional shutter disk, the degassing function and the pre-cleaning function are provided within a single chamber. Accordingly, a separate degas chamber and a pre-clean chamber are no longer required and the overall transfer time between chambers is reduced or eliminated.