公开(公告)号：US06358838B2

公开(公告)日：2002-03-19

申请号：US09760777

申请日：2001-01-17

申请人： Takeshi Furusawa ,  Daisuke Ryuzaki ,  Noriyuki Sakuma ,  Shuntaro Machida ,  Kenji Hinode ,  Ryou Yoneyama

发明人： Takeshi Furusawa ,  Daisuke Ryuzaki ,  Noriyuki Sakuma ,  Shuntaro Machida ,  Kenji Hinode ,  Ryou Yoneyama

IPC分类号： H01L21311

CPC分类号： H01L21/76808 ,  H01L21/02126 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/31633 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76807 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： An intermetal insulating film containing at least silicon atoms, oxygen atoms and carbon atoms with the number ratio of oxygen atom to silicon atom being 1.5 or more and the number ratio of carbon atom to silicon atom being 1 to 2, and having a film thickness shrinkage at a time of oxidation of 14% or less is very low in dielectric constant, high in selectivity against resist etching and can be used without using a silicon oxide protective film in a semiconductor device.

摘要翻译： 至少含有硅原子，氧原子和碳原子的氧原子与硅原子的数量比为1.5以上，碳原子数与硅原子数之比为1〜2的金属间绝缘膜，具有膜厚收缩率 在14％以下的氧化时，介电常数非常低，抗蚀剂蚀刻的选择性高，可以在半导体器件中不使用氧化硅保护膜的情况下使用。

公开(公告)号：US08754489B2

公开(公告)日：2014-06-17

申请号：US13605340

申请日：2012-09-06

申请人： Shuntaro Machida ,  Hiroyuki Enomoto ,  Yoshitaka Tadaki

发明人： Shuntaro Machida ,  Hiroyuki Enomoto ,  Yoshitaka Tadaki

IPC分类号： H01L27/14

CPC分类号： B06B1/0292 ,  Y10T29/49005

摘要： An ultrasonic transducer includes a first electrode, a first insulation film covering the first electrode, a hollow part overlapping the first electrode on the first insulation film, a second insulation film covering the hollow part, a second electrode overlapping the hollow part on the second insulation film, and an interconnection joined to the second electrode. An edge of the first electrode is formed so as to moderate a step of the first electrode.

摘要翻译： 超声波换能器包括第一电极，覆盖第一电极的第一绝缘膜，与第一绝缘膜上的第一电极重叠的中空部分，覆盖中空部分的第二绝缘膜，与第二绝缘体上的中空部分重叠的第二电极 膜，以及与第二电极接合的互连。 形成第一电极的边缘以调节第一电极的台阶。

公开(公告)号：US07778113B2

公开(公告)日：2010-08-17

申请号：US11867681

申请日：2007-10-04

申请人： Shuntaro Machida ,  Hiroyuki Enomoto

发明人： Shuntaro Machida ,  Hiroyuki Enomoto

IPC分类号： H04R17/00

CPC分类号： B06B1/0292

摘要： A technology capable of improving receiver sensitivity and improving insulation withstand voltage in an ultrasonic transducer is provided. An ultrasonic transducer comprises: a lower electrode; an insulator covering the lower electrode; a cavity portion disposed on the insulator so as to overlap with the lower electrode; and an upper electrode disposed so as to overlap with the cavity portion. In this ultrasonic transducer, an insulator is inserted between the upper and lower electrodes in a part not having the cavity portion. By this means, sum total of thickness of insulators between the upper and lower electrodes in a part not having the cavity portion is larger than sum total of thickness of insulators between the upper and lower electrodes in a part having the cavity portion.

摘要翻译： 提供了一种能够提高接收机灵敏度并提高超声波换能器中绝缘耐压的技术。 超声换能器包括：下电极; 覆盖下电极的绝缘体; 空腔部分，设置在所述绝缘体上以与所述下电极重叠; 以及设置成与空腔部分重叠的上电极。 在该超声波换能器中，在不具有空腔部的部分中，在上下电极之间插入绝缘体。 通过这种方式，在不具有空腔部分的部分中的上部和下部电极之间的绝缘体的厚度的总和大于具有空腔部分的部分中的上部和下部电极之间的绝缘体的厚度的总和。

公开(公告)号：US07736985B2

公开(公告)日：2010-06-15

申请号：US11767602

申请日：2007-06-25

申请人： Hiroyuki Enomoto ,  Katsuya Hayano ,  Shuntaro Machida

发明人： Hiroyuki Enomoto ,  Katsuya Hayano ,  Shuntaro Machida

IPC分类号： H01L21/20 ,  H01L41/00

CPC分类号： G01S7/52079 ,  G01S7/5208 ,  H01L28/40

摘要： The performance of a sensor in a semiconductor device can be improved. A plurality of oscillators forming an ultrasonic sensor are arranged on a main surface of a semiconductor chip. A negative-type photosensitive insulating film which protects the oscillators is deposited on an uppermost layer of the semiconductor chip. At the time of exposure for forming an opening in the photosensitive insulating film, the semiconductor chip is divided into a plurality of exposure areas and exposed, and then, the exposure areas are jointed so that the entire area is exposed. At this time, a stitching exposure area is arranged so that a center of the stitching exposure area in a width direction in the joint portion of the adjacent exposure areas is positioned at a center of a line which connects centers of oscillators located above and below the stitching exposure area.

摘要翻译： 可以提高半导体器件中的传感器的性能。 形成超声波传感器的多个振荡器设置在半导体芯片的主表面上。 保护振荡器的负型感光绝缘膜沉积在半导体芯片的最上层。 在曝光用于在感光绝缘膜中形成开口的时刻，将半导体芯片分割为多个曝光区域并曝光，然后将曝光区域接合，使得整个区域被曝光。 此时，布置缝合曝光区域，使得相邻曝光区域的接合部分中的宽度方向上的缝合曝光区域的中心位于连接位于上方和下方的振荡器的中心的线的中心 拼接曝光区域。

公开(公告)号：US20090011592A1

公开(公告)日：2009-01-08

申请号：US12194044

申请日：2008-08-19

申请人： Shouichi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

发明人： Shouichi Uno ,  Atsushi Maekawa ,  Takashi Yunogami ,  Kazutami Tago ,  Kazuo Nojiri ,  Shuntaro Machida ,  Takafumi Tokunaga

IPC分类号： H01L21/768

CPC分类号： H01L21/02126 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76829 ,  H01L21/76835

摘要： In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.

摘要翻译： 在制造具有嵌入式互连结构的半导体集成电路器件的方法中，通过将导体膜嵌入形成在构成层间电介质膜的有机绝缘膜中的凹槽（例如沟槽或孔）中并且包括有机硅氧烷作为 通过在CF基气体/ N 2 / Ar气体中对有机绝缘膜进行等离子体干蚀刻来形成主要部件，凹槽，例如沟槽或孔，以抑制底部形成异常形状 在有机绝缘膜上形成光致抗蚀剂膜之后，随后用光致抗蚀剂膜作为蚀刻掩模形成凹部。

公开(公告)号：US20080079099A1

公开(公告)日：2008-04-03

申请号：US11774004

申请日：2007-07-06

申请人： Hiroyuki Enomoto ,  Taro Asai ,  Shuntaro Machida

发明人： Hiroyuki Enomoto ,  Taro Asai ,  Shuntaro Machida

IPC分类号： H01L29/84

CPC分类号： H01L29/84 ,  G01S15/8925

摘要： A method for improving productivity when manufacturing a semiconductor device. A lower electrode, insulating films, an upper electrode and insulating films are formed on a semiconductor substrate in a sensor region. A cavity is formed between the insulator films above the lower electrode. The lower electrode, insulating film, the cavity and insulating film, and an upper electrode form a variable capacity sensor. The cavity is formed by etching a sacrificial pattern between the insulation films by way of a hole formed in a pair of insulation films. Other than in the above sensor region, a dummy lower electrode and four insulating films are formed on the TEG region on the semiconductor substrate; and a dummy cavity is formed between a pair of insulation films above the lower electrode however no conductive layer on the same layer as the upper electrode is formed on the dummy cavity.

公开(公告)号：US20080042225A1

公开(公告)日：2008-02-21

申请号：US11671040

申请日：2007-02-05

申请人： Shuntaro Machida ,  Hiroyuki Enomoto ,  Yoshitaka Tadaki

发明人： Shuntaro Machida ,  Hiroyuki Enomoto ,  Yoshitaka Tadaki

IPC分类号： H01L29/84 ,  H01L21/62

CPC分类号： B06B1/0292 ,  Y10T29/49005

摘要： This invention provides a technique whereby, even if a step is produced by splitting a lower electrode into component elements, resistance increase of an upper electrode, damage to a membrane and decrease of dielectric strength between an upper electrode and the lower electrode, are reduced. In an ultrasonic transducer comprising plural lower electrodes, an insulation film covering the lower electrodes, plural hollow parts formed to overlap the lower electrodes on the insulation film, an insulation film filling the gaps among the hollow parts, an insulation film covering the hollow parts and insulation film, plural upper electrodes formed to overlap the hollow parts on the insulation film and plural interconnections joining them, the surfaces of the hollow parts and insulation film are flattened to the same height.

摘要翻译： 本发明提供一种技术，即使通过将下部电极分割成成分元件而产生台阶，也能够降低上部电极的电阻增加，膜的损伤以及上部电极与下部电极之间的介电强度的降低。 在包括多个下电极的超声波换能器中，覆盖下电极的绝缘膜，形成为与绝缘膜上的下电极重叠的多个中空部，填充中空部之间的间隙的绝缘膜，覆盖中空部的绝缘膜， 绝缘膜，形成为与绝缘膜上的中空部分重叠的多个上电极和连接它们的多个互连，中空部分和绝缘膜的表面被平坦化到相同的高度。

公开(公告)号：US20050067621A1

公开(公告)日：2005-03-31

申请号：US10788369

申请日：2004-03-01

申请人： Yasushi Goto ,  Shuntaro Machida ,  Natsuki Yokoyama

发明人： Yasushi Goto ,  Shuntaro Machida ,  Natsuki Yokoyama

IPC分类号： H01L21/82 ,  H01H59/00 ,  H01L21/00

CPC分类号： H01H59/0009 ,  H01H2001/0042 ,  H01H2001/0063

摘要： Disclosed herein is a latchable MEMS switch device capable of retaining its ON or OFF state even after the external power source is turned off. It is unnecessary not only to introduce novel materials such as magnetic material but also to form complicated structures. At least one of the cantilever and pull-down electrode of a cold switch is connected to a second MEMS switch. A capacitor between the cantilever and pull-down electrode of the cold switch is charged by the second MEMS switch. Thereafter since the cold switch is isolated in the device, the charge remains stored. Therefore, the cold switch can remain in the ON state since the charge continues to create electrostatic attraction between the cantilever and the pull-down electrode.

摘要翻译： 这里公开了即使在外部电源关闭之后也能够保持其接通或关断状态的可闭锁的MEMS开关装置。 不仅不需要引入诸如磁性材料的新型材料，而且形成复杂的结构。 冷开关的悬臂和下拉电极中的至少一个连接到第二MEMS开关。 冷开关的悬臂和下拉电极之间的电容器由第二MEMS开关充电。 此后，由于冷开关在器件中隔离，所以电荷保持存储。 因此，由于电荷继续在悬臂与下拉电极之间产生静电引力，所以冷开关可以保持在导通状态。

公开(公告)号：US06479380B2

公开(公告)日：2002-11-12

申请号：US09863348

申请日：2001-05-24

申请人： Takeshi Furusawa ,  Takao Kumihashi ,  Shuntaro Machida

发明人： Takeshi Furusawa ,  Takao Kumihashi ,  Shuntaro Machida

IPC分类号： H01L214763

CPC分类号： H01L21/76832 ,  H01L21/02126 ,  H01L21/02282 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76807 ,  H01L21/7681 ,  H01L21/76811 ,  H01L21/76813 ,  H01L23/5222 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/12044 ,  H01L2924/00

摘要： To provide a method for manufacturing a semiconductor device, by which it is possible to form a trench or a hole with high aspect ratio on a methylsiloxane type film with low dielectric constant with causing neither via-connection failure nor short-circuit failure even when lower level interconnect is covered with etching stopper. The method comprises the processes of forming a layered film with a silicon oxide film on upper layer of a methylsiloxane type film and forming the layered film using a hard mask. When the etching stopper is etched, the silicon oxide film acts as a hard mask for the methylsiloxane type film, and transfer of faceting to the methylsiloxane type film is prevented. Thus, parasitic capacitance of multi-level interconnect can be reduced without causing via-connection failure and short failure.

摘要翻译： 为了提供一种制造半导体器件的方法，通过该方法可以在具有低介电常数的甲基硅氧烷型膜上形成具有高纵横比的沟槽或孔，即使在较低的情况下也不会导致通孔连接故障或短路故障 层间互连覆盖有蚀刻阻挡层。 该方法包括在甲基硅氧烷型膜的上层上形成具有氧化硅膜的层状膜并使用硬掩模形成层叠膜的工序。 当蚀刻阻挡层被蚀刻时，氧化硅膜用作甲基硅氧烷型膜的硬掩模，并且防止了向甲基硅氧烷型膜的转印。 因此，可以减少多级互连的寄生电容，而不会导致通路连接故障和短路故障。

公开(公告)号：US09636707B2

公开(公告)日：2017-05-02

申请号：US12597765

申请日：2008-01-23

申请人： Teiichiro Ikeda ,  Hiroki Tanaka ,  Shuntaro Machida

发明人： Teiichiro Ikeda ,  Hiroki Tanaka ,  Shuntaro Machida

IPC分类号： A61B8/00 ,  B06B1/02

CPC分类号： B06B1/0292 ,  A61B8/00 ,  A61B8/4483 ,  A61B2562/028

摘要： The invention aims to give uniform and stable characteristics to a cMUT-cell array and to improve acoustic characteristics. To this end, a signal blocking section is additionally provided for cells 102 located in the outermost peripheral portion or at the end positions of a two-dimensional array 101 of cMUT cells that are designed and manufactured as ones usable as an ordinary transducer capable of transmission and reception of signals. The signal blocking section is provided to prevent the displacement and the vibration of the cells, and to block the transmission and the reception of signals.