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公开(公告)号：US09627036B2
公开(公告)日：2017-04-18
申请号：US14822911
申请日：2015-08-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Tan-Ya Yin , Ming-Jui Chen , Chia-Wei Huang , Yu-Cheng Tung , Chin-Sheng Yang
IPC: H01L21/28 , H01L23/535 , H01L27/11 , H01L29/66 , G11C11/412 , H01L27/02
CPC classification number: G11C11/417 , G11C11/412 , H01L23/5226 , H01L23/528 , H01L27/0207 , H01L27/1104
Abstract: A static random access memory unit structure and layout structure includes two pull-up transistors, two pull-down transistors, two slot contact plugs, and two metal-zero interconnects. Each metal-zero interconnect is disposed on each slot contact plug and a gate of each pull-up transistor, in which, each slot contact plug crosses a drain of each pull-down transistor and a drain of each pull-up transistor and extends to cross an end of each metal-zero interconnect. A gap between the slot contact plugs is smaller than a gap between the metal-zero interconnects.
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公开(公告)号：US20150347657A1
公开(公告)日：2015-12-03
申请号：US14822907
申请日：2015-08-11
Applicant: United Microelectronics Corp.
Inventor： Po-Chao Tsao , Shih-Fang Hong , Chia-Wei Huang , Ming-Jui Chen , Shih-Fang Tzou , Ming-Te Wei
CPC classification number: G06F17/5068 , G03F1/144 , G03F1/36
Abstract: A method of generating a layout pattern including a FinFET structure layout includes the following processes. First, a layout pattern, which includes a sub-pattern having pitches in simple integer ratios, is provided to a computer system. The sub-pattern is then classified into a first sub-pattern and a second sub-pattern. Afterwards, first stripe patterns and at least one second stripe pattern are generated. The longitudinal edges of the first stripe patterns are aligned with the longitudinal edges of the first sub-pattern and the first stripe patterns have equal spacings and widths. The positions of the second stripe patterns correspond to the positions of the blank pattern, and spacings or widths of the second stripe patterns are different from the spacings or widths of the first stripe patterns. Finally, the first stripe patterns and the second stripe pattern are outputted to a photomask.
Abstract translation: 生成包括FinFET结构布局的布局图案的方法包括以下处理。 首先，将包括具有简单整数比例的间距的子图案的布局图案提供给计算机系统。 然后将子图案分类为第一子图案和第二子图案。 之后，产生第一条纹图案和至少一个第二条纹图案。 第一条形图案的纵向边缘与第一子图案的纵向边缘对准，并且第一条纹图案具有相等的间距和宽度。 第二条纹图案的位置对应于空白图案的位置，第二条纹图案的间距或宽度不同于第一条纹图案的间距或宽度。 最后，将第一条纹图案和第二条纹图案输出到光掩模。
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公开(公告)号：US20150072272A1
公开(公告)日：2015-03-12
申请号：US14023476
申请日：2013-09-11
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chun-Hsien Huang , Ming-Jui Chen , Chia-Wei Huang , Hsin-Yu Chen , Kai-Lin Chuang
Abstract: A method for forming a photo-mask is provided. A first photo-mask pattern relating to a first line, an original second photo-mask pattern relating to a first via plug, and a third photo-mask pattern relating to a second line are provided. A first optical proximity correction (OPC) process is performed. A second OPC process is performed, comprising enlarging a width of the second photo-mask pattern along the first direction to form a revised second photo-resist pattern. A contour simulation process is performed to make sure the revised second photo-mask pattern is larger or equal to the original second-mask pattern. The first photo-mask pattern, the revised second photo-mask pattern, and the third photo-mask pattern are output. The present invention further provides an OPC method.
Abstract translation: 提供一种形成光掩模的方法。 提供与第一行相关的第一照片掩模图案，与第一通孔插头相关的原始第二照片掩模图案和与第二行相关的第三照片掩模图案。 执行第一光学邻近校正（OPC）处理。 执行第二OPC处理，包括沿着第一方向放大第二光掩模图案的宽度以形成修改的第二光刻胶图案。 执行轮廓模拟处理以确保修改的第二光掩模图案大于或等于原始第二掩模图案。 输出第一光掩模图案，修改的第二光掩模图案和第三光掩模图案。 本发明还提供一种OPC方法。
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Patent Agency Ranking
公开(公告)号：US20140256132A1
公开(公告)日：2014-09-11
申请号：US13787912
申请日：2013-03-07
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Chia-Wei Huang , Ming-Jui Chen , Ting-Cheng Tseng , Ping-I Hsieh
IPC: H01L21/308
CPC classification number: H01L21/308 , H01L27/1116
Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.
Abstract translation: 提供了一种图案化半导体结构的方法。 该方法包括以下步骤。 提供了在第一区域中限定第一图案的第一掩模和与第一区域相邻的第二区域中的第二图案。 由第一掩模限定的第一图案被转移到第一区域中的第一膜结构，并且由第一掩模限定的第二图案被转移到第二区域中的第一膜结构。 在第一膜结构上形成第二膜结构。 提供了在第一区域中限定第三图案的第二掩模。 由第一掩模限定的第一图案占据的第一区域的一部分的至少50％与由第二掩模限定的第三图案占据的第一区域的一部分相同。
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公开(公告)号：US08822328B1
公开(公告)日：2014-09-02
申请号：US13787912
申请日：2013-03-07
Applicant: United Microelectronics Corp.
Inventor： Chia-Wei Huang , Ming-Jui Chen , Ting-Cheng Tseng , Ping-I Hsieh
IPC: H01L21/4763 , H01L21/302 , H01L21/308
CPC classification number: H01L21/308 , H01L27/1116
Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.
Abstract translation: 提供了一种图案化半导体结构的方法。 该方法包括以下步骤。 提供了在第一区域中限定第一图案的第一掩模和与第一区域相邻的第二区域中的第二图案。 由第一掩模限定的第一图案被转移到第一区域中的第一膜结构，并且由第一掩模限定的第二图案被转移到第二区域中的第一膜结构。 在第一膜结构上形成第二膜结构。 提供了在第一区域中限定第三图案的第二掩模。 由第一掩模限定的第一图案占据的第一区域的一部分的至少50％与由第二掩模限定的第三图案占据的第一区域的一部分相同。
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公开(公告)号：US20140220482A1
公开(公告)日：2014-08-07
申请号：US14259173
申请日：2014-04-23
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hsin-Yu Chen , Chia-Wei Huang , Chun-Hsien Huang , Shih-Chun Tsai , Kai-Lin Chuang
IPC: G03F1/36
Abstract: A method for forming patterns includes the following steps. A first layout including a first target pattern and a first unprintable dummy pattern is provided. A second layout including a second target pattern and a second printable dummy pattern are provided, wherein at least part of the second printable dummy pattern overlaps the first unprintable dummy pattern exposure limit, such that the second printable dummy pattern cannot be formed in a wafer.
Abstract translation: 形成图案的方法包括以下步骤。 提供了包括第一目标图案和第一不可打印虚设图案的第一布局。 提供包括第二目标图案和第二可打印虚拟图案的第二布局，其中第二可打印虚拟图案的至少一部分与第一不可打印虚设图案曝光极限重叠，使得第二可打印虚设图案不能形成在晶片中。
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公开(公告)号：US08748066B2
公开(公告)日：2014-06-10
申请号：US13633876
申请日：2012-10-03
Applicant: United Microelectronics Corp.
Inventor： Hsin-Yu Chen , Chia-Wei Huang , Chun-Hsien Huang , Shih-Chun Tsai , Kai-Lin Chuang
IPC: G03F9/00
Abstract: A method for forming photomasks includes the following steps. A first photomask including a first target pattern and a first unprintable dummy pattern is provided. A second photomask including a second target pattern and a second printable dummy pattern are provided, wherein at least part of the second printable dummy pattern overlapping the first unprintable dummy pattern exposure limit, such that the second printable dummy pattern can not be printed in a wafer.
Abstract translation: 一种形成光掩模的方法包括以下步骤。 提供了包括第一目标图案和第一不可打印虚设图案的第一光掩模。 提供了包括第二目标图案和第二可打印虚设图案的第二光掩模，其中第二可打印虚拟图案的至少一部分与第一不可打印虚设图案曝光极限重叠，使得第二可打印虚拟图案不能被印刷在晶片 。
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公开(公告)号：US20140093814A1
公开(公告)日：2014-04-03
申请号：US13633876
申请日：2012-10-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Hsin-Yu Chen , Chia-Wei Huang , Chun-Hsien Huang , Shih-Chun Tsai , Kai-Lin Chuang
IPC: G03F1/68
Abstract: A method for forming photomasks includes the following steps. A first photomask including a first target pattern and a first unprintable dummy pattern is provided. A second photomask including a second target pattern and a second printable dummy pattern are provided, wherein at least part of the second printable dummy pattern overlapping the first unprintable dummy pattern exposure limit, such that the second printable dummy pattern can not be printed in a wafer.
Abstract translation: 一种形成光掩模的方法包括以下步骤。 提供了包括第一目标图案和第一不可打印虚设图案的第一光掩模。 提供了包括第二目标图案和第二可打印虚设图案的第二光掩模，其中第二可打印虚拟图案的至少一部分与第一不可打印虚设图案曝光极限重叠，使得第二可打印虚拟图案不能被印刷在晶片 。
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