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    Method for decomposing a layout of an integrated circuit
    3.
    发明授权
    Method for decomposing a layout of an integrated circuit 有权
    分解集成电路布局的方法

    公开(公告)号：US09524361B2

    公开(公告)日：2016-12-20

    申请号：US14690491

    申请日：2015-04-20

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Ting-Cheng Tseng ,  Ming-Jui Chen ,  Chia-Wei Huang

    IPC: G06F17/50

    CPC classification number: G06F17/5068 ,  G06F17/5081

    Abstract: A method for decomposing a layout of an integrated circuit is provided. First, a layout of the integrated circuit is imported, wherein the layout comprises a plurality of sub patterns in a cell region, and a first direction and a second direction are defined thereon. Next, one sub pattern positioned at a corner of the cell region is assigned to an anchor pattern. Then, the sub patterns in the row same as the anchor pattern along the second direction is assigned to the first group. Finally, the rest of the sub patterns are decomposed into the first group and the second group according to a design rule, wherein the sub patterns in the same line are decomposed into the first group and the second group alternatively.

    Abstract translation: 提供一种用于分解集成电路的布局的方法。 首先，导入集成电路的布局，其中布局包括单元区域中的多个子图案，并且在其上限定第一方向和第二方向。 接下来，将位于单元格区域的角落的一个子图案分配给锚图案。 然后，将与沿着第二方向的锚定图案相同的行中的子图案分配给第一组。 最后，根据设计规则，剩余的子图案被分解为第一组和第二组，其中同一行中的子图案被分解成第一组和第二组。

    Method for generating layout pattern
    4.
    发明授权
    Method for generating layout pattern 有权
    生成布局模式的方法

    公开(公告)号：US09141744B2

    公开(公告)日：2015-09-22

    申请号：US13968391

    申请日：2013-08-15

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Po-Chao Tsao ,  Shih-Fang Hong ,  Chia-Wei Huang ,  Ming-Jui Chen ,  Shih-Fang Tzou ,  Ming-Te Wei

    IPC: G06F17/50 ,  G03F1/00

    CPC classification number: G06F17/5068 ,  G03F1/144 ,  G03F1/36

    Abstract: A method for generating a layout pattern is provided. First, a layout pattern is provided to a computer system and is classified into two sub-patterns and a blank pattern. Each of the sub-patterns has pitches in simple integer ratios and the blank pattern is between the two sub-patterns. Then, a plurality of first stripe patterns and at least two second stripe patterns are generated. The edges of the first stripe patterns are aligned with the edges of the sub-patterns and the first stripe patterns have equal spacings and widths. The spacings or widths of the second stripe patterns are different from that of the first stripe patterns.

    Abstract translation: 提供了一种用于生成布局图案的方法。 首先，将布局图案提供给计算机系统，并将其分为两个子图案和空白图案。 每个子图案具有简单整数比例的间距，并且空白图案在两个子图案之间。 然后，生成多个第一条纹图案和至少两个第二条纹图案。 第一条形图案的边缘与子图案的边缘对齐，并且第一条纹图案具有相等的间隔和宽度。 第二条纹图案的间距或宽度与第一条纹图案的间距或宽度不同。

    Method for Forming Photo-masks and OPC Method
    5.
    发明申请
    Method for Forming Photo-masks and OPC Method 审中-公开
    形成光罩和OPC方法的方法

    公开(公告)号：US20140282295A1

    公开(公告)日：2014-09-18

    申请号：US13802833

    申请日：2013-03-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Chun-Hsien Huang ,  Ming-Jui Chen ,  Ching-Chun Huang ,  Chia-Wei Huang ,  Yu-Feng Chao ,  Yu-Chuan Chang

    IPC: G06F17/50

    CPC classification number: H01L21/76816 ,  G03F1/36 ,  H01L21/76807

    Abstract: The present invention provides a method for forming at least a photo mask. A first photo-mask pattern relating to a first structure is provides. A second photo-mask pattern relating to a second structure is provides. A third photo-mask pattern relating to a third structure is provides. The first structure, the second structure and the third structure are disposed in a semiconductor structure in sequence. An optical proximity process including a comparison step is provided, wherein the comparison step includes comparing the first photo-mask pattern and the third photo-mask pattern. Last, the first photo-mask pattern is import to form a first mask, the second photo-mask pattern is import to form a second mask, and the third photo-mask pattern is import to form a third mask. The present invention further provides an OPC method.

    Abstract translation: 本发明提供一种至少形成光掩模的方法。 提供与第一结构相关的第一光掩模图案。 提供与第二结构相关的第二光掩模图案。 提供了与第三结构相关的第三光掩模图案。 第一结构，第二结构和第三结构依次设置在半导体结构中。 提供了包括比较步骤的光学邻近处理，其中比较步骤包括比较第一光掩模图案和第三光掩模图案。 最后，导入第一光掩模图案以形成第一掩模，第二光掩模图案被导入以形成第二掩模，并且导入第三光掩模图案以形成第三掩模。 本发明还提供一种OPC方法。

    Method for forming a semiconductor structure
    7.
    发明授权
    Method for forming a semiconductor structure 有权
    半导体结构的形成方法

    公开(公告)号：US09368365B1

    公开(公告)日：2016-06-14

    申请号：US14709488

    申请日：2015-05-12

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shih-Hsun Kuo ,  Ting-Cheng Tseng ,  Tan-Ya Yin ,  Chia-Wei Huang ,  Ming-Jui Chen

    IPC: H01L21/30 ,  H01L21/308

    CPC classification number: H01L21/3086 ,  H01L21/0337 ,  H01L21/3085 ,  H01L21/823431 ,  H01L21/845 ,  H01L29/66795

    Abstract: A manufacturing method for forming a semiconductor structure includes: first, a plurality of fin structures are formed on a substrate and arranged along a first direction, next, a first fin cut process is performed, so as to remove parts of the fin structures which are disposed within at least one first fin cut region, and a second fin cut process is then performed, so as to remove parts of the fin structures which are disposed within at least one second fin cut region, where the second fin cut region is disposed along at least one edge of the first fin cut region.

    Abstract translation: 一种用于形成半导体结构的制造方法，其特征在于：首先，在基板上形成多个翅片结构，沿第一方向配置，接着，进行第一翅片切割加工， 设置在至少一个第一翅片切割区域内，然后执行第二翅片切割过程，以便去除设置在至少一个第二翅片切割区域内的翅片结构的部分，其中第二翅片切割区域沿着 第一鳍片切割区域的至少一个边缘。

    Method of optical proximity correction
    8.
    发明授权
    Method of optical proximity correction 有权
    光学邻近校正方法

    公开(公告)号：US09047658B2

    公开(公告)日：2015-06-02

    申请号：US14071667

    申请日：2013-11-05

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Te-Hsien Hsieh ,  Ming-Jui Chen ,  Cheng-Te Wang ,  Ping-I Hsieh ,  Jing-Yi Lee

    IPC: G06K9/00 ,  G06T7/00

    CPC classification number: G06T7/0004 ,  G03F1/36 ,  G06K9/00 ,  G06T7/001 ,  G06T2207/30148

    Abstract: A calculation method of optical proximity correction includes providing at least a feature pattern to a computer system. At least a first template and a second template are defined so that portions of the feature pattern are located in the first template and the rest of the feature pattern is located in the second template. The first template and the second template have a common boundary. Afterwards, a first calculation zone is defined to overlap an entire first template and portions of the feature pattern out of the first template. Edges of the feature pattern within the first calculation zone are then fragmented from the common boundary towards two ends of the feature pattern so as to generate at least two first beginning segments respectively at two sides of the common boundary. Finally, positions of the first beginning segments are adjusted so as to generate first adjusted segments.

    Abstract translation: 光学邻近校正的计算方法包括至少向计算机系统提供特征图案。 定义至少第一模板和第二模板，使得特征图案的部分位于第一模板中，并且特征图案的其余部分位于第二模板中。 第一个模板和第二个模板有一个共同的边界。 之后，定义第一计算区域以将整个第一模板和第一模板中的特征模式的部分重叠。 然后将第一计算区域内的特征图案的边缘从公共边界分割成特征图案的两端，以便分别在公共边界的两侧产生至少两个第一开始段。 最后，调整第一起始段的位置，以产生第一调整段。

    Method for inspecting photo-mask
    10.
    发明授权
    Method for inspecting photo-mask 有权
    检查光罩的方法

    公开(公告)号：US08782569B1

    公开(公告)日：2014-07-15

    申请号：US13802868

    申请日：2013-03-14

    Applicant: United Microelectronics Corp.

    Inventor： Chain-Ting Huang ,  Yung-Feng Cheng ,  Ming-Jui Chen

    IPC: G06F17/50

    CPC classification number: G03F1/84

    Abstract: An inspection method for a photo-mask in a semiconductor process is provided. First, a first photo-mask with a first wafer anchor point (1st wafer FAM) is provided. Then, Dmax and Dmin are calculated according to the 1st wafer FAM. A second photo-mask and a second mask anchor point (2nd mask FAM) of the second photo-mask are provided. A CD average, and a CD range of the second photo-mask are measured. Finally, the second photo-mask is inspected by using equation A and/or equation B: CD average−2nd mask FAM

    Abstract translation: 提供了半导体工艺中的光掩模检查方法。 首先，提供具有第一晶片固定点（第一晶片FAM）的第一光掩模。 然后，根据第一晶片FAM计算Dmax和Dmin。 提供第二光掩模的第二光掩模和第二掩模锚定点（第二掩模FAM）。 测量CD平均值和第二光掩模的CD范围。 最后，使用等式A和/或等式B检查第二光掩模：CD平均第二掩模FAM

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