公开(公告)号：US20080090336A1

公开(公告)日：2008-04-17

申请号：US11954355

申请日：2007-12-12

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/56

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; an encapsulant formed on the chip carrier and for encapsulating the chip, with a non-active surface of the chip being exposed from the encapsulant; and a heat spreader having a hollow portion and attached to the encapsulant, wherein the chip is received in the hollow portion and the non-active surface of the chip is completely exposed to the hollow portion, such that heat generated by the chip can be directly dissipated out of the package structure. The present invention also provides a method for fabricating the heat dissipating package structure.

摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 形成在所述芯片载体上并用于封装所述芯片的密封剂，所述芯片的非活性表面从所述密封剂暴露出来; 以及具有中空部分并附着到密封剂的散热器，其中芯片被容纳在中空部分中，并且芯片的非活动表面完全暴露于中空部分，使得芯片产生的热量可以直接 从包装结构中消散掉。 本发明还提供一种制造散热封装结构的方法。

公开(公告)号：US20080079105A1

公开(公告)日：2008-04-03

申请号：US11904648

申请日：2007-09-27

申请人： Tse-Wen Chang ,  Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

发明人： Tse-Wen Chang ,  Chang-Yueh Chan ,  Chien-Ping Huang ,  Chih-Ming Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L31/0203 ,  H01L21/02

CPC分类号： H01L27/14618 ,  H01L24/97 ,  H01L27/14683 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2224/85 ,  H01L2924/00014

摘要： A sensor-type package and a fabrication method thereof are provided. A sensor-type chip is mounted on a substrate and is electrically connected to the substrate via bonding wires. A light-pervious body is attached to the sensor-type chip, and has one surface covered with a covering layer and another surface formed with an adhesive layer. An encapsulant encapsulates the light-pervious body. As an adhesive force between the covering layer and the encapsulant is greater than that between the covering layer and the light-pervious body, the covering layer and a portion of the encapsulant located on the covering layer can be concurrently removed, such that the light-pervious body is exposed and light can pass through the light-pervious body to be captured by the sensor-type chip. The above arrangement eliminates the need of using a dam structure as in the prior art and provides a compact sensor-type package with improved fabrication reliability.

摘要翻译： 提供了传感器型封装及其制造方法。 传感器型芯片安装在基板上，并通过接合线与基板电连接。 透光体附着在传感器型芯片上，其一个表面被覆盖层和形成有粘合剂层的另一表面覆盖。 密封剂封装透光体。 由于覆盖层和密封剂之间的粘合力大于覆盖层和透光体之间的粘合力，所以可以同时去除位于覆盖层上的覆盖层和密封剂的一部分， 透光体被曝光，光可以通过透光体，由传感器型芯片捕获。 上述布置消除了如现有技术中使用坝结构的需要，并且提供了具有改进的制造可靠性的紧凑型传感器型封装。

公开(公告)号：US20070034998A1

公开(公告)日：2007-02-15

申请号：US11580560

申请日：2006-10-12

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L23/02

CPC分类号： H01L21/6835 ,  H01L21/568 ,  H01L24/19 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/19 ,  H01L2224/20 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/82 ,  H01L2924/00

摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.

摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。

公开(公告)号：US20060103014A1

公开(公告)日：2006-05-18

申请号：US11232612

申请日：2005-09-21

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/34

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/97 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A heat dissipating package structure includes a chip carrier; a semiconductor chip mounted and electrically connected to the chip carrier; an encapsulant formed on the chip carrier and for encapsulating the chip, with a non-active surface of the chip being exposed from the encapsulant; and a heat spreader having a hollow portion and attached to the encapsulant, wherein the chip is received in the hollow portion and the non-active surface of the chip is completely exposed to the hollow portion, such that heat generated by the chip can be directly dissipated out of the package structure. The present invention also provides a method for fabricating the heat dissipating package structure.

摘要翻译： 散热封装结构包括芯片载体; 安装并电连接到芯片载体的半导体芯片; 形成在所述芯片载体上并用于封装所述芯片的密封剂，所述芯片的非活性表面从所述密封剂暴露出来; 以及具有中空部分并附着到密封剂的散热器，其中芯片被容纳在中空部分中，并且芯片的非活动表面完全暴露于中空部分，使得芯片产生的热量可以直接 从包装结构中消散掉。 本发明还提供一种制造散热封装结构的方法。

公开(公告)号：US07019406B2

公开(公告)日：2006-03-28

申请号：US10635168

申请日：2003-08-05

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/97 ,  H01L23/3128 ,  H01L23/36 ,  H01L23/4334 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/211 ,  H01L2224/32245 ,  H01L2224/73267 ,  H01L2224/83385 ,  H01L2224/92224 ,  H01L2224/92244 ,  H01L2224/97 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2224/82 ,  H01L2224/83 ,  H01L2924/00

摘要： A thermally enhanced semiconductor package and a fabrication method thereof are provided. A plurality of conductive bumps are formed on bond pads on an active surface of a chip. A heat sink is attached to an inactive surface of the chip and has a surface area larger than that of the chip. An encapsulation body encapsulates the heat sink, chip and conductive bumps, while exposing a bottom or surfaces, not for attaching the chip, of the heat sink and ends of the conductive bumps outside. A plurality of conductive traces are formed on the encapsulation body and electrically connected to the ends of the conductive bumps. A solder mask layer is applied over the conductive traces and formed with a plurality of openings for exposing predetermined portions of the conductive traces. A solder ball is implanted on each exposed portion of the conductive traces.

摘要翻译： 提供一种热增强型半导体封装及其制造方法。 在芯片的有源表面上的接合焊盘上形成多个导电凸块。 散热器附着在芯片的非活性表面上，其表面积大于芯片的表面积。 封装体封装散热器，芯片和导电凸块，同时暴露散热片的底部或表面，而不是将散热片和导电凸块的端部外露。 多个导电迹线形成在封装主体上并电连接到导电凸块的端部。 焊接掩模层施加在导电迹线上并形成有多个用于暴露导电迹线的预定部分的开口。 在导电迹线的每个暴露部分上注入焊球。

公开(公告)号：US06989296B2

公开(公告)日：2006-01-24

申请号：US10844877

申请日：2004-05-12

申请人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

发明人： Chien-Ping Huang ,  Cheng-Hsu Hsiao ,  Chih-Ming Huang

IPC分类号： H01L21/44

CPC分类号： H01L23/055 ,  H01L21/50 ,  H01L23/10 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/16 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/05599 ,  H01L2924/00

摘要： A fabrication method of a semiconductor package with a photosensitive chip is provided. A substrate having a core is prepared. An interposer is mounted on the substrate, with a peripheral portion of the substrate exposed from the interposer. A molding process is performed and the substrate is clamped between an upper mold and a lower mold, with the interposer received in an upwardly-recessed cavity of the upper mold. A molding compound is injected into the upwardly-recessed cavity to form a dam on the peripheral portion of the substrate. Then the upper and lower molds and the interposer are removed from the substrate to expose area covered by the interposer on the substrate. At least one photosensitive chip is mounted on the exposed area of the substrate. A lid seals the dam such that the chip is received in a space defined by the substrate, the dam and the lid.

摘要翻译： 提供了具有感光芯片的半导体封装的制造方法。 制备具有芯的衬底。 插入器安装在衬底上，衬底的周边部分从插入件露出。 进行成型工艺，并且将基板夹在上模具和下模具之间，其中插入件容纳在上模具的向上凹入的空腔中。 将模塑料注入到上凹腔中以在基材的周边部分上形成坝。 然后将上模和下模和插入件从基板上移除以露出基板上由插入件覆盖的区域。 至少一个感光芯片安装在基板的暴露区域上。 盖子密封大坝，使得芯片被容纳在由基板，坝和盖子限定的空间中。

公开(公告)号：US20050253284A1

公开(公告)日：2005-11-17

申请号：US10972200

申请日：2004-10-22

申请人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

发明人： Yu-Po Wang ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/56 ,  H01L21/60 ,  H01L23/13 ,  H01L23/28 ,  H01L23/31 ,  H01L23/498

CPC分类号： H01L23/49822 ,  H01L21/561 ,  H01L23/13 ,  H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/484 ,  H01L2224/48599 ,  H01L2224/73215 ,  H01L2224/97 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor package and a method for fabricating the same are proposed. A substrate having a first circuit layer, a second circuit layer, and a core layer formed between the first and second circuit layers is provided. At least one second opening is formed on the second circuit layer. At least one first opening is formed on the first circuit layer corresponding to the second opening. A plurality of finger holes corresponding to bond fingers on the first circuit layer are formed in the core layer. A through opening is formed in the core layer and communicates with the first and second openings. At least one chip is mounted on the first circuit layer and covers the first opening, with its active surface being exposed to the first opening. An encapsulant is formed to fill the first and second openings and the through opening and encapsulate the chip.

摘要翻译： 提出了一种半导体封装及其制造方法。 提供了具有形成在第一和第二电路层之间的第一电路层，第二电路层和芯层的衬底。 在第二电路层上形成至少一个第二开口。 在对应于第二开口的第一电路层上形成至少一个第一开口。 在芯层中形成与第一电路层上的接合指状对应的多个指孔。 在芯层中形成通孔，并与第一和第二开口连通。 至少一个芯片安装在第一电路层上并且覆盖第一开口，其有源表面暴露于第一开口。 形成密封剂以填充第一和第二开口和通孔并封装芯片。

公开(公告)号：USD492314S1

公开(公告)日：2004-06-29

申请号：US29192300

申请日：2003-10-21

申请人： Chih-Ming Huang ,  Chien-Ping Huang ,  Jui-Yu Chuang ,  Lien-Chi Chan ,  Cheng-Hsu Hsiao

设计人： Chih-Ming Huang ,  Chien-Ping Huang ,  Jui-Yu Chuang ,  Lien-Chi Chan ,  Cheng-Hsu Hsiao

公开(公告)号：US06444498B1

公开(公告)日：2002-09-03

申请号：US09990752

申请日：2001-11-15

申请人： Chien Ping Huang ,  Tzong-Da Ho ,  Cheng-Hsu Hsiao

发明人： Chien Ping Huang ,  Tzong-Da Ho ,  Cheng-Hsu Hsiao

IPC分类号： H01L2144

CPC分类号： H01L23/49816 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/4334 ,  H01L24/32 ,  H01L24/33 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73215 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92147 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0401

摘要： A method is provided of making a semiconductor package with a heat spreader in which a chip carrier module plate consisting of a plurality of array-arranged chip carriers is mounted with at least one chip on each of the chip carriers. A heat spreader module plate is attached to the chips, with an interface layer formed on a top surface of the heat spreader module plate. The chip carrier module plate, the chips and the heat spreader module plate are encapsulated. Adhesion force between the interface layer and the encapsulant is larger than that between the interface layer and the heat spreader module plate, and adhesion force between the interface layer and the heat spreader module plate is smaller than that between the heat spreader module plate and the encapsulant.

摘要翻译： 提供了一种制造具有散热器的半导体封装的方法，其中由多个阵列布置的芯片载体组成的芯片载体模块板在每个芯片载体上安装有至少一个芯片。 散热器模块板附接到芯片，其中界面层形成在散热器模块板的顶表面上。 芯片载体模块板，芯片和散热器模块板被封装。 界面层与密封剂之间的粘附力大于界面层与散热器模块板之间的粘合力，界面层与散热器模块板之间的粘合力小于散热器模块板与密封剂之间的粘附力 。

公开(公告)号：US08183092B2

公开(公告)日：2012-05-22

申请号：US12829704

申请日：2010-07-02

申请人： Chien-Ping Huang ,  Chih-Ming Huang ,  Han-Ping Pu ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

发明人： Chien-Ping Huang ,  Chih-Ming Huang ,  Han-Ping Pu ,  Yu-Po Wang ,  Cheng-Hsu Hsiao

IPC分类号： H01L21/00 ,  H01L21/46

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L21/565 ,  H01L23/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19107 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.

摘要翻译： 提供了堆叠半导体结构及其制造方法。 该方法包括将半导体芯片电连接到第一基板上，在第一基板上安装多个对应于半导体芯片的周边的支撑部件，安装第二基板，该第二基板具有部分被带覆盖的第一表面， 经由第二表面与支撑构件上的第一表面相对的第二表面，通过接合线电连接第一和第二基板，在第一基板上形成用于封装半导体芯片的密封剂，支撑构件，第二基板， 接合线和具有暴露的顶表面的带，并且移除带以露出第二基板的第一表面并允许电子部件安装在其上。 本发明防止回流引起的污染，备有特殊的模具，并消除闪光。