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111 条记录 (耗时 0.014 秒)

    Method of singulating electronic devices
    41.
    发明授权
    Method of singulating electronic devices 有权
    单片电子设备的方法

    公开(公告)号：US07422962B2

    公开(公告)日：2008-09-09

    申请号：US10975797

    申请日：2004-10-27

    申请人： Chien-Hua Chen ,  Zhizhang Chen ,  Steven R Geissler

    发明人： Chien-Hua Chen ,  Zhizhang Chen ,  Steven R Geissler

    IPC分类号： H01L21/30

    CPC分类号： B81C1/00888 ,  H01L21/78 ,  H01L23/10 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of singulating electronic devices, including aligning a saw blade over a lid street disposed on a lid substrate that is disposed over a device substrate. An electronic device that includes a bond pad is disposed on the device substrate, wherein the lid street is disposed over the bond pad. In addition, the method also includes sawing partially through the lid street to form a trench in the lid street. The trench includes a trench bottom in the lid substrate.

    摘要翻译： 一种单片电子设备的方法，包括将设置在设置在设备基板上的盖基板上的盖街道上的锯片对准。 包括接合焊盘的电子设备设置在设备基板上，其中盖路设置在接合焊盘上方。 此外，该方法还包括部分地通过盖街道锯切以在盖街道中形成沟槽。 沟槽包括在盖基板中的沟槽底部。

    Dicing tape and die ejection method
    44.
    发明授权
    Dicing tape and die ejection method 有权
    切割胶带和模具喷射方法

    公开(公告)号：US06930387B2

    公开(公告)日：2005-08-16

    申请号：US10348638

    申请日：2003-01-22

    申请人： Dustin W. Carr ,  Flavio Pardo

    发明人： Dustin W. Carr ,  Flavio Pardo

    IPC分类号： B81C1/00 ,  H01L21/68 ,  H01L23/12 ,  H01L23/544

    CPC分类号： H01L21/6836 ,  B81C1/00888 ,  H01L2221/68327

    摘要： A tape assembly for use in wafer dicing includes a layer of adhesive dicing tape having a size at least as large as a footprint of a die, and a screening portion which is adhered to the tape. The screening portion is interposed between the layer of tape and the die when the die is adhered to the layer of tape. The screening portion covers an interior portion of the layer of tape. The screening portion is sized and shaped to leave a sufficient portion of the layer of tape underlying a perimeter of the die exposed to adhere the die to the layer of tape.

    摘要翻译： 用于晶片切割的带组件包括具有至少与模具的覆盖层一样大的尺寸的粘合剂切割带层和粘附到带上的屏蔽部分。 当模具粘附到胶带层上时，屏蔽部分插入在胶带层和模具之间。 遮蔽部分覆盖胶带层的内部。 筛分部分的尺寸和形状设置成留下在模具的周边下方的足够部分的胶带，该胶片层暴露以使模具粘附到胶带层上。

    Semiconductor component in a wafer assembly
    46.
    发明授权
    Semiconductor component in a wafer assembly 有权
    晶片组件中的半导体元件

    公开(公告)号：US06780767B2

    公开(公告)日：2004-08-24

    申请号：US10178636

    申请日：2002-06-21

    申请人： Stefan Lutter

    发明人： Stefan Lutter

    IPC分类号： H01L2100

    CPC分类号： B81C1/00888 ,  Y10T29/49121 ,  Y10T29/49124

    摘要： Semiconductor components in a wafer assembly, in which the components are connected to a frame by means of in each case one holder and are formed from the same silicon wafer. The holder connects the respective component to the frame on one side and has a desired breaking point. The desired breaking point is designed as a V-shaped groove, the surfaces of which form crystal planes. According to the method, the patterning for production of the holder takes place on the wafer back surface, with subsequent wet chemical anisotropic etching of the V-groove. In this way, the holder is produced independently of the processing of the wafer front surface, and when the semiconductor component is removed a defined broken edge is formed without there being any risk of the semiconductor component being damaged.

    摘要翻译： 晶片组件中的半导体部件，其中部件通过每个壳体连接到框架，并且由相同的硅晶片形成。 保持器将相应的部件连接到一侧的框架并且具有期望的断裂点。 所需的断裂点被设计为V形槽，其表面形成晶面。 根据该方法，用于制造保持器的图案化发生在晶片背面上，随后对V形槽进行湿化学各向异性蚀刻。 以这种方式，保持器独立于晶片前表面的处理而被制造，并且当去除半导体部件时，形成限定的断裂边缘，而不会有半导体部件损坏的风险。

    Method and device for protecting micro electromechanical systems structures during dicing of a wafer
    47.
    发明授权
    Method and device for protecting micro electromechanical systems structures during dicing of a wafer 有权
    用于在晶片切割期间保护微机电系统结构的方法和装置

    公开(公告)号：US06759273B2

    公开(公告)日：2004-07-06

    申请号：US10006967

    申请日：2001-12-05

    申请人： Lawrence E. Felton ,  Jing Luo

    发明人： Lawrence E. Felton ,  Jing Luo

    IPC分类号： H01L2144

    CPC分类号： H01L21/6836 ,  B81C1/00888 ,  B81C1/00896 ,  H01L2221/68327

    摘要： A wafer cap protects micro electromechanical system (“MEMS”) structures during a dicing of a MEMS wafer to produce individual MEMS dies. A MEMS wafer is prepared having a plurality of MEMS structure sites thereon. Upon the MEMS wafer, the wafer cap is mounted to produce a laminated MEMS wafer. The wafer cap is recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer. The capped MEMS wafer can be diced into a plurality of MEMS dies without causing damage to or contaminating the MEMS die.

    摘要翻译： 在MEMS晶片的切割期间，晶片盖保护微机电系统（“MEMS”）结构以产生单独的MEMS管芯。 制备具有多个MEMS结构位置的MEMS晶片。 在MEMS晶片上，安装晶片盖以产生层压的MEMS晶片。 晶片盖凹入与MEMS晶片上的MEMS结构位置的位置对应的区域中。 封装的MEMS晶片可以切割成多个MEMS管芯，而不会损坏或污染MEMS管芯。

    Wafer level packaging of micro electromechanical device
    48.
    发明授权
    Wafer level packaging of micro electromechanical device 失效
    微机电器件的晶圆级封装

    公开(公告)号：US06710461B2

    公开(公告)日：2004-03-23

    申请号：US10162905

    申请日：2002-06-06

    申请人： Bruce C. S. Chou ,  Hsien-Ming Wu ,  Ping-Chin Sun

    发明人： Bruce C. S. Chou ,  Hsien-Ming Wu ,  Ping-Chin Sun

    IPC分类号： H01L2348

    CPC分类号： B81B7/007 ,  B81C1/00888 ,  H01L23/147 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/09701

    摘要： The present invention provides a wafer level package of micro electromechanical devices. The wafer level package of the present invention comprises a wafer having a plurality of micro electromechanical devices and a package wafer of the same size. A plurality of conductor plugs penetrate through the upper and lower surfaces of the package wafer. Solder bumps are formed on the conductor plugs to be adhered to predetermined solder bumps on the micro electromechanical device wafer so as to form a package device. The wafer level package of the present invention can prevent micro electromechanical devices from damage during the packaging procedure.

    摘要翻译： 本发明提供一种微机电装置的晶片级封装。 本发明的晶片级封装包括具有多个微机电器件和相同尺寸的封装晶片的晶片。 多个导体插塞穿过封装晶片的上表面和下表面。 焊接凸块形成在要粘附到微机电装置晶片上的预定焊料凸块的导体插头上，以形成封装装置。 本发明的晶片级封装可以防止微机电装置在封装过程中损坏。

    Method and device for protecting micro electromechanical system structures during dicing of a wafer
    49.
    发明授权
    Method and device for protecting micro electromechanical system structures during dicing of a wafer 有权
    用于在晶片切割期间保护微机电系统结构的方法和装置

    公开(公告)号：US06555417B2

    公开(公告)日：2003-04-29

    申请号：US10007579

    申请日：2001-12-05

    申请人： Timothy R. Spooner ,  Kieran P. Harney

    发明人： Timothy R. Spooner ,  Kieran P. Harney

    IPC分类号： H01L2144

    CPC分类号： H01L21/6836 ,  B81C1/00888 ,  B81C1/00896 ,  H01L2221/68327

    摘要： A wafer cap protects micro electromechanical system (“MEMS”) structures during a dicing of a MEMS wafer to produce individual MEMS dies. A MEMS wafer is prepared having a plurality of MEMS structure sites thereon. Upon the MEMS wafer, the wafer cap is mounted to produce a laminated MEMS wafer. The wafer cap is recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer. The capped MEMS wafer can be diced into a plurality of MEMS dies without causing damage to or contaminating the MEMS die.

    摘要翻译： 在MEMS晶片的切割期间，晶片盖保护微机电系统（“MEMS”）结构以产生单独的MEMS管芯。 制备具有多个MEMS结构位置的MEMS晶片。 在MEMS晶片上，安装晶片盖以产生层压的MEMS晶片。 晶片盖凹入与MEMS晶片上的MEMS结构位置的位置对应的区域中。 封装的MEMS晶片可以切割成多个MEMS管芯，而不会损坏或污染MEMS管芯。

    Semiconductor component in a wafer assembly
    50.
    发明申请
    Semiconductor component in a wafer assembly 有权
    晶片组件中的半导体元件

    公开(公告)号：US20020197862A1

    公开(公告)日：2002-12-26

    申请号：US10178636

    申请日：2002-06-21

    发明人： Stefan Lutter

    IPC分类号： H01L021/44

    CPC分类号： B81C1/00888 ,  Y10T29/49121 ,  Y10T29/49124

    摘要： Semiconductor components in a wafer assembly, in which the components are connected to a frame by means of in each case one holder and are formed from the same silicon wafer. The holder connects the respective component to the frame on one side and has a desired breaking point. The desired breaking point is designed as-a V-shaped groove, the surfaces of which form crystal planes. According to the method, the patterning for production of the holder takes place on the wafer back surface, with subsequent wet chemical anisotropic etching of the V-groove. In this way, the holder is produced independently of the processing of the wafer front surface, and when the semiconductor component is removed a defined broken edge is formed without there being any risk of the semiconductor component being damaged.

    摘要翻译： 晶片组件中的半导体部件，其中部件通过每个壳体连接到框架，并且由相同的硅晶片形成。 保持器将相应的部件连接到一侧的框架并且具有期望的断裂点。 所需的断裂点被设计为V形槽，其表面形成晶面。 根据该方法，用于制造保持器的图案化发生在晶片背面上，随后对V形槽进行湿化学各向异性蚀刻。 以这种方式，保持器独立于晶片前表面的处理而被制造，并且当去除半导体部件时，形成限定的断裂边缘，而不会有半导体部件损坏的风险。