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公开(公告)号:US20210280676A1
公开(公告)日:2021-09-09
申请号:US17321046
申请日:2021-05-14
摘要: Quantum dot devices, and related systems and methods, are disclosed herein. In some embodiments, a quantum dot device may include a quantum well stack; a plurality of first gate lines above the quantum well stack; a plurality of second gate lines above the quantum well stack, wherein the second gate lines are perpendicular to the first gate lines; and an array of regularly spaced magnet lines.
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公开(公告)号:US11107926B2
公开(公告)日:2021-08-31
申请号:US16313239
申请日:2017-06-30
申请人: FLOSFIA INC.
发明人: Tomochika Tanikawa , Toshimi Hitora
IPC分类号: H01L29/786 , H01L29/12 , H01L29/78 , H01L21/02
摘要: A new and useful oxide semiconductor film with enhanced p-type semiconductor property and the method of manufacturing the oxide semiconductor film are provided. A method of manufacturing an oxide semiconductor film including: generating atomized droplets by atomizing a raw material solution containing a metal of Group 9 of the periodic table and/or a metal of Group 13 of the periodic table and a p-type dopant; carrying the atomized droplets onto a surface of a base by using a carrier gas; causing a thermal reaction of the atomized droplets adjacent to the surface of the base under oxygen atmosphere to form the oxide semiconductor film on the base.
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公开(公告)号:US11094790B2
公开(公告)日:2021-08-17
申请号:US16331992
申请日:2016-09-23
发明人: Yasunori Oritsuki , Yoichiro Tarui
IPC分类号: H01L29/417 , H01L29/06 , H01L29/16 , H01L29/40 , H01L29/423 , H01L29/739 , H01L29/78 , H01L27/04 , H01L29/12
摘要: A present invention includes the following: a third impurity region having a second conductivity type and disposed in an outer peripheral region that is the outer periphery of a cell arrangement region in which a unit cell is disposed; a field insulating film disposed in the outer peripheral region; an interlayer insulating film; a first main electrode disposed on the interlayer insulating film. The third impurity region includes a fourth impurity region having the second conductivity type, having a higher impurity concentration than the third impurity region. A gate wire and a gate pad are disposed in the outer peripheral region. The fourth impurity region is adjacent to the cell arrangement region, surrounds at least a region below the gate pad, and is electrically connected to the first main electrode.
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公开(公告)号:US11092856B2
公开(公告)日:2021-08-17
申请号:US17061870
申请日:2020-10-02
发明人: Hiroyuki Miyake , Makoto Kaneyasu
IPC分类号: H01L29/10 , H01L29/12 , G02F1/1343 , G09F9/30 , G09G3/36 , H01L29/786 , H01L27/12 , G02F1/1362 , G02F1/136 , G02F1/13357
摘要: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided.
The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film. The signal line intersects with the scan line, the first electrode is electrically connected to the signal line, the first electrode has a region overlapping with the scan line, the second electrode faces the first electrode, the third electrode faces the first electrode, the first pixel electrode is electrically connected to the second electrode, the second pixel electrode is electrically connected to the third electrode, the semiconductor film is in contact with the first electrode, the second electrode, and the third electrode, and the semiconductor film is provided between the scan line and the first electrode to the third electrode.-
公开(公告)号:US11088268B2
公开(公告)日:2021-08-10
申请号:US16448988
申请日:2019-06-21
发明人: Ralph G. Nuzzo , John A. Rogers , Etienne Menard , Keon Jae Lee , Dahl-Young Khang , Yugang Sun , Matthew Meitl , Zhengtao Zhu
IPC分类号: H01L29/76 , H01L21/322 , H01L23/02 , H01L31/0392 , H01L31/18 , H01L23/00 , H01L21/683 , H01L27/12 , H01L21/02 , B82Y10/00 , H01L29/06 , H01L29/786 , H01L33/00 , H01L21/308 , H01L29/12 , H01L29/04 , H01L25/075 , H01L33/32
摘要: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
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公开(公告)号:US11087977B2
公开(公告)日:2021-08-10
申请号:US16326569
申请日:2017-08-29
申请人: FLOSFIA INC. , KYOTO UNIVERSITY
发明人: Shizuo Fujita , Kentaro Kaneko , Masaya Oda , Toshimi Hitora
IPC分类号: H01L21/02 , C23C16/40 , H01L29/872 , H01L33/26 , H01L29/24 , C23C16/448 , H01L29/78 , H01L29/808 , H01L29/778 , H01L29/737 , H01L29/739 , H01L29/812 , H01L29/12 , H01L29/04 , H01L29/66 , H01L29/423
摘要: A new and useful p-type oxide semiconductor with a wide band gap and an enhanced electrical conductivity and the method of manufacturing the p-type oxide semiconductor are provided. A method of manufacturing a p-type oxide semiconductor including: generating atomized droplets by atomizing a raw material solution including iridium and a metal that is different from iridium and optionally contained; carrying the atomized droplets onto a surface of a base by using a carrier gas; causing a thermal reaction of the atomized droplets adjacent to the surface of the base to form a crystal or a mixed crystal of a metal oxide including iridium.
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47.
公开(公告)号:US20210234066A1
公开(公告)日:2021-07-29
申请号:US17232287
申请日:2021-04-16
发明人: Eric POURQUIER , Hubert BONO
IPC分类号: H01L33/06 , H01L33/18 , H01L33/00 , H01L33/48 , H01L33/42 , H01L27/15 , H01L33/08 , H01L33/24 , H01L29/06 , B82Y10/00 , B82Y40/00 , H01L29/12 , H01L33/16 , H01L33/02 , H01L29/66 , H01L21/02
摘要: A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.
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公开(公告)号:US11075300B2
公开(公告)日:2021-07-27
申请号:US16133814
申请日:2018-09-18
发明人: Shunpei Yamazaki , Shinpei Matsuda
IPC分类号: H01L29/12 , H01L29/786 , H01L29/04 , H01L29/24 , H01L29/66
摘要: The semiconductor device includes a first insulating layer; a first oxide semiconductor; a first insulator containing indium, an element M (M is gallium, aluminum, titanium, yttrium, or tin), and zinc; a second oxide semiconductor; a source electrode layer; a drain electrode layer; a second insulator containing indium, the element M, and zinc; a gate insulating layer; and a gate electrode layer. The first and second oxide semiconductors each include a region with c-axis alignment. In the first and second oxide semiconductors, the number of indium atoms divided by sum of numbers of the indium atoms, element M atoms, and zinc atoms is ⅓ or more. In the first insulator, the number of zinc atoms divided by sum of the numbers of indium atoms, element M atoms, and zinc atoms is ⅓ or less.
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49.
公开(公告)号:US11063177B2
公开(公告)日:2021-07-13
申请号:US14652435
申请日:2013-12-20
发明人: Eric Pourquier , Hubert Bono
IPC分类号: H01L33/06 , H01L33/18 , H01L33/00 , H01L33/48 , H01L33/42 , H01L27/115 , H01L33/08 , H01L33/24 , H01L29/06 , B82Y10/00 , B82Y40/00 , H01L29/12 , H01L33/16 , H01L33/02 , H01L29/66 , H01L21/02
摘要: A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.
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公开(公告)号:US11049966B2
公开(公告)日:2021-06-29
申请号:US16997210
申请日:2020-08-19
发明人: Akira Amano , Takayuki Satomura , Yuichi Takeuchi , Katsumi Suzuki , Sachiko Aoi
摘要: When a film thickness of a second epitaxial film is measured, an infrared light is irradiated from a surface side of the second epitaxial film onto a base layer on which a first epitaxial film and the second epitaxial film are formed. A reflected light from an interface between the first epitaxial film and the base layer and a reflected light from a surface of the second epitaxial film are measured to obtain a two-layer film thickness, which is a total film thickness of the first epitaxial film and the second epitaxial film. The film thickness of the second epitaxial film is calculated by subtracting a one-layer film thickness, which is a film thickness of the first epitaxial film, from the two-layer film thickness.
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