公开(公告)号：US20130016418A1

公开(公告)日：2013-01-17

申请号：US13637026

申请日：2010-08-16

申请人： Jianhua Chen ,  Hong Yi

发明人： Jianhua Chen ,  Hong Yi

IPC分类号： G02F1/01

CPC分类号： G02F1/0123 ,  G02F1/225 ,  G02F2001/212 ,  H04B10/50575

摘要： The disclosure discloses a method and an apparatus for determining a bias point of a modulator, wherein the method includes: adding pilot signals to the bias voltages of the modulator; adjusting the bias point of the modulator at a predetermined step and acquiring a first harmonic amplitude value corresponding to each bias point in a backlight detection current signal output by the modulator; and determining a bias point corresponding to the maximum value of the first harmonic amplitude values associated with multiple bias points as the bias point of the modulator. By virtue of the disclosure, the detection of a difference frequency signal can be eliminated, thereby reducing the complexity and cost of a periphery control circuit while ensuring the control accuracy, effectively improving the stability and reliability of the control process, and improving the modulation and transmission performance of optical signals in the whole system.

摘要翻译： 本公开公开了一种用于确定调制器的偏置点的方法和装置，其中该方法包括：将导频信号添加到调制器的偏置电压; 在预定步骤调整调制器的偏置点，并获取由调制器输出的背光检测电流信号中对应于每个偏置点的一次谐波振幅值; 并且确定对应于与多个偏置点相关联的一次谐波振幅值的最大值的偏置点作为调制器的偏置点。 凭借本公开，可以消除差分频率信号的检测，从而降低外围控制电路的复杂性和成本，同时确保控制精度，有效提高控制过程的稳定性和可靠性，并改进调制和 光信号在整个系统中的传输性能。

公开(公告)号：US08269536B2

公开(公告)日：2012-09-18

申请号：US12871920

申请日：2010-08-31

申请人： Hong-Yi Huang ,  Chih-Yuan Hsu ,  Wei-Sheng Tseng ,  Kuo-Hsing Cheng ,  Yuan-Hua Chu

发明人： Hong-Yi Huang ,  Chih-Yuan Hsu ,  Wei-Sheng Tseng ,  Kuo-Hsing Cheng ,  Yuan-Hua Chu

IPC分类号： H03L7/06

CPC分类号： H04B1/69 ,  G06F1/022 ,  H03L7/197

摘要： An onion waveform generator and a spread spectrum clock generator (SSCG) using the same are provided. The onion waveform generator includes a value generation unit and an accumulating unit. The value generation unit outputs a counting value. The accumulating unit accumulates the counting value to output a waveform value. The accumulating unit switches from an increasing mode to a decreasing mode if the waveform value is a third boundary value, and the accumulating unit switches from the decreasing mode to the increasing mode if the waveform value is a fourth boundary value.

摘要翻译： 提供了洋葱波形发生器和使用它的扩频时钟发生器（SSCG）。 洋葱波形发生器包括值生成单元和累积单元。 值产生单元输出计数值。 累加单元积累计数值，输出波形值。 如果波形值是第三边界值，则累加单元从增加模式切换到减小模式，并且如果波形值是第四边界值，则累加单元从递减模式切换到增加模式。

公开(公告)号：US08125286B2

公开(公告)日：2012-02-28

申请号：US12923435

申请日：2010-09-21

申请人： Hong-Yi Huang ,  Jen-Chieh Liu ,  Yuan-Hua Chu

发明人： Hong-Yi Huang ,  Jen-Chieh Liu ,  Yuan-Hua Chu

IPC分类号： H03B5/12

CPC分类号： H03L7/0991 ,  H03K3/0315 ,  H03K5/133 ,  H03K5/1534 ,  H03K2005/00071 ,  H03K2005/00293 ,  H03L2207/50

摘要： A digitally controlled oscillator (DCO) includes a pulse generator for generating a pulse signal upon an edge of a trigger signal, and at least one delay circuit coupled to delay the pulse signal generated by the pulse generator. The pulse generator is coupled to receive one of the delayed pulse signal from the at least one delay circuit and an enable signal as the trigger signal. A digitally controlled varactor (DCV) includes a transistor having a gate, a source, a drain, and a substrate, wherein at least one of the gate, the source, the drain, and the substrate is coupled to receive one of two or more voltages, wherein at least one of the two or more voltages is not a power supply voltage or ground.

摘要翻译： 数字控制振荡器（DCO）包括脉冲发生器，用于在触发信号的边沿产生脉冲信号，以及至少一个延迟电路，其被连接以延迟由脉冲发生器产生的脉冲信号。 脉冲发生器被耦合以接收来自至少一个延迟电路的延迟脉冲信号中的一个和使能信号作为触发信号。 数字控制变容二极管（DCV）包括具有栅极，源极，漏极和衬底的晶体管，其中栅极，源极，漏极和衬底中的至少一个被耦合以接收两个或更多个中的一个 电压，其中所述两个或更多个电压中的至少一个不是电源电压或接地。

公开(公告)号：US20110274315A1

公开(公告)日：2011-11-10

申请号：US13095128

申请日：2011-04-27

申请人： Shengyin FAN ,  Hong Yi ,  Yu Deng ,  Xin Wang

发明人： Shengyin FAN ,  Hong Yi ,  Yu Deng ,  Xin Wang

IPC分类号： G06K9/00

CPC分类号： G06K9/00771 ,  G06T7/215 ,  G06T7/277 ,  G06T2207/10016 ,  G06T2207/20076 ,  G06T2207/30196

摘要： Disclosed are an object detection method and an object detection device. The object detection method comprises a step of obtaining plural detection results of a current frame according to plural object detection methods; a step of setting initial probabilities of the plural detection results of the current frame; a step of calculating a movement frequency distribution diagram representing movement frequencies of respective pixels in the current frame; a step of obtaining detection results of a previous frame; a step of updating the probabilities of the plural detection results of the current frame; and a step of determining a final list of detected objects based on the updated probabilities of the plural detection results of the current frame.

摘要翻译： 公开了一种物体检测方法和物体检测装置。 物体检测方法包括根据多个物体检测方法获得当前帧的多个检测结果的步骤; 设定当前帧的多个检测结果的初始概率的步骤; 计算表示当前帧中的各个像素的移动频率的移动频率分布图的步骤; 获取前一帧的检测结果的步骤; 更新当前帧的多个检测结果的概率的步骤; 以及基于当前帧的多个检测结果的更新概率来确定检测对象的最终列表的步骤。

公开(公告)号：US07827423B2

公开(公告)日：2010-11-02

申请号：US12151526

申请日：2008-05-07

申请人： Sehat Sutardja ,  Hong-Yi Chen

发明人： Sehat Sutardja ,  Hong-Yi Chen

IPC分类号： G06F1/32

CPC分类号： G06F1/3293 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3275 ,  G06F12/08 ,  G06F12/0866 ,  G06F12/0897 ,  G06F13/28 ,  G06F2212/222 ,  Y02D10/122 ,  Y02D10/126 ,  Y02D10/13 ,  Y02D10/14 ,  Y02D50/20

摘要： A processing device comprises a processor, low power nonvolatile memory that communicates with the processor, high power nonvolatile memory that communicates with the processor. The processing device manages data using a cache hierarchy comprising a high power (HP) nonvolatile memory level for data in the high power nonvolatile memory and a low power (LP) nonvolatile memory level for data in the low power nonvolatile memory. The LP nonvolatile memory level has a higher level in the cache hierarchy than the HP nonvolatile memory level.

摘要翻译： 处理装置包括处理器，与处理器通信的低功率非易失性存储器，与处理器通信的高功率非易失性存储器。 处理装置使用包括用于高功率非易失性存储器中的数据的高功率（HP）非易失性存储器级别和用于低功率非易失性存储器中的数据的低功率（LP）非易失性存储器级别）的高速缓存层级来管理数据。 LP非易失性存储器级别在高速缓存层级中具有比HP非易失性存储器级别更高的级别。

公开(公告)号：US20090151373A1

公开(公告)日：2009-06-18

申请号：US11954978

申请日：2007-12-12

申请人： Hong-Yi LEE ,  Chia-Hsin HSU

发明人： Hong-Yi LEE ,  Chia-Hsin HSU

IPC分类号： F25C1/00

CPC分类号： F25D29/005 ,  F25B2500/06 ,  F25C5/18 ,  F25C2400/10 ,  F25C2600/04

摘要： A power control structure for ice makers includes a control box to control an ice making process and a transmission means located in the control box. The transmission means has a movement range within which an ON/OFF switch is located. A retrievable ice collection tray is provided which has an actuation wall. The transmission means is coupled with an actuation arm extended to a loading/unloading displacement of the actuation wall. When the ice collection tray is unloaded the actuation wall pushes the actuation arm to drive the transmission means to trigger the ON/OFF switch to suspend the ice making process. When the ice collection tray is reloaded the actuation wall pushes the actuation arm again to drive the transmission means to trigger the ON/OFF switch a second time to trigger the ON/OFF switch to start the ice making process of the ice maker.

摘要翻译： 用于制冰机的功率控制结构包括控制制冰过程的控制箱和位于控制箱内的传动装置。 传动装置具有其中定位有ON / OFF开关的移动范围。 提供了一种具有致动壁的可收回的冰块收集托盘。 传动装置与延伸到致动壁的装载/卸载位移的致动臂联接。 当收集托盘卸载时，致动壁推动致动臂以驱动传动装置以触发ON / OFF开关暂停制冰过程。 当重新加载集冰托盘时，致动壁再次推动致动臂以驱动传动装置以第二次触发ON / OFF开关以触发ON / OFF开关来开始制冰机的制冰过程。

公开(公告)号：US20090146625A1

公开(公告)日：2009-06-11

申请号：US12111210

申请日：2008-04-29

申请人： Hong-Yi Huang ,  Ru-Jie Wang ,  Yuan-Hua Chu

发明人： Hong-Yi Huang ,  Ru-Jie Wang ,  Yuan-Hua Chu

IPC分类号： G05F1/567

CPC分类号： G05F3/30

摘要： A voltage generating apparatus including a voltage generator and a current splitter is provided. The voltage generator has an output node, and generates a first output voltage from the output node. The first output voltage rises when the temperature rises and the current flowing from the output end of the voltage generator is fixed. And the first output voltage drops when the temperature is fixed and the current flowing from the output node of the voltage generator rises. The current splitter is used for increasing the current flowing through the current splitter when the temperature rises. Therefore, the rise of the first output voltage of the voltage generator will be restrained, and the temperature compensation can be achieved.

摘要翻译： 提供一种包括电压发生器和电流分配器的电压产生装置。 电压发生器具有输出节点，并从输出节点产生第一输出电压。 当温度升高时，第一输出电压升高，并且从电压发生器的输出端流出的电流是固定的。 并且当温度固定并且从电压发生器的输出节点流出的电流升高时，第一输出电压下降。 当温度升高时，电流分流器用于增加流过电流分流器的电流。 因此，电压发生器的第一输出电压的上升将被抑制，并且可以实现温度补偿。

公开(公告)号：US20090141595A1

公开(公告)日：2009-06-04

申请号：US12113955

申请日：2008-05-02

申请人： Hong-Yi Huang ,  Yi-Jui Tsai ,  Yuan-Hua Chu

发明人： Hong-Yi Huang ,  Yi-Jui Tsai ,  Yuan-Hua Chu

IPC分类号： H03K5/135 ,  G04F10/00

CPC分类号： G04F10/005 ,  H03K5/135

摘要： A time-to-digital converter apparatus including a delay phase-locked loop, a subtracter, a multi-phase detector and a Vernier detector is disclosed. The delay phase-locked loop herein includes digital delay components for producing counting signals. The multi-phase detector includes digital delay components for producing delay outputs according to the counting signals and thereby detecting a pulse input signal. The Vernier detector includes digital delay components for detecting the remainder of the pulse input signal according to the difference between the delay outputs produced by the subtracter.

摘要翻译： 公开了一种包括延迟锁相环，减法器，多相检测器和游标检测器的时间 - 数字转换器装置。 这里的延迟锁相环包括用于产生计数信号的数字延迟部件。 多相检测器包括用于根据计数信号产生延迟输出并由此检测脉冲输入信号的数字延迟分量。 游标检测器包括用于根据由减法器产生的延迟输出之间的差来检测脉冲输入信号的剩余部分的数字延迟分量。

公开(公告)号：US07450418B2

公开(公告)日：2008-11-11

申请号：US11403437

申请日：2006-04-12

申请人： Hong-Yi Liao ,  Wu-Chang Chang ,  Ching-Yuan Lin

发明人： Hong-Yi Liao ,  Wu-Chang Chang ,  Ching-Yuan Lin

IPC分类号： G11C11/34

CPC分类号： G11C16/0416 ,  G11C16/0433 ,  H01L27/115 ,  H01L27/11568

摘要： An operating method of a non-volatile memory is provided. The non-volatile memory includes plural memory cells. Each memory cell includes a charge storage structure, a gate, and a source and a drain disposed in the well on the both sides of the gate. During an erasing operation, a first voltage is applied to the source of the selected memory cell, a second voltage is applied to the gate of each selected memory cell, and a third voltage is applied to the well; and the drain of the selected memory cell is floated, so that the selected memory cell is erased. In the meantime, the fourth voltage is applied to the drain of each unselected memory cell, the fifth voltage is applied to the gate of the unselected memory cell, and the source of the unselected memory cell is floated to prevent the unselected memory cell from being erased.

摘要翻译： 提供了一种非易失性存储器的操作方法。 非易失性存储器包括多个存储单元。 每个存储单元包括电荷存储结构，栅极以及设置在栅极两侧的阱中的源极和漏极。 在擦除操作期间，将第一电压施加到所选择的存储单元的源极，将第二电压施加到每个选择的存储单元的栅极，并将第三电压施加到阱; 并且所选择的存储单元的漏极浮动，使得所选存储单元被擦除。 同时，将第四电压施加到每个未选择的存储单元的漏极，第五电压被施加到未选择的存储单元的栅极，并且未选择的存储单元的源被浮置以防止未选择的存储单元 擦除

公开(公告)号：US07438495B2

公开(公告)日：2008-10-21

申请号：US11245161

申请日：2005-10-07

申请人： Chin-Wen Chou ,  Hong-Yi Lee

发明人： Chin-Wen Chou ,  Hong-Yi Lee

IPC分类号： B25G3/18 ,  F16B21/00 ,  F16D1/00

CPC分类号： B25G3/18 ,  Y10T403/591 ,  Y10T403/595

摘要： A sideward clipping apparatus aims to clip and release an article through double-depressing actions in cyclic operations. It has a sliding member which includes an upper clipping portion and a lower clipping portion that are coupled through a first base and a second base. The lower clipping portion synchronously drives the upper clipping portion through the first base at an initial force receiving state to form a first fan moving track. The lower clipping portion is in contact with the sliding member and moved vertically to a second position under the force to drive the upper clipping portion through the second base to form a second fan moving track. Thereby the upper clipping portion and the lower clipping portion form a clipping space when the sliding member is moved to the second position to accurately clip the article.

摘要翻译： 侧向裁剪装置旨在通过循环操作中的双击动作剪辑和释放物品。 其具有滑动构件，其包括通过第一基座和第二基座联接的上夹持部分和下夹持部分。 下夹具部分在初始力接收状态下同步地驱动上夹持部分穿过第一基座以形成第一扇形移动轨迹。 下夹紧部分与滑动构件接触并且在力作用下垂直移动到第二位置，以通过第二底座驱动上夹持部分以形成第二扇形移动轨道。 因此，当滑动构件移动到第二位置时，上夹持部分和下夹持部分形成夹紧空间，以精确地夹住制品。