公开(公告)号：US20090284702A1

公开(公告)日：2009-11-19

申请号：US12357155

申请日：2009-01-21

Applicant: Bong-Sung SEO ,  Jun-Woo Lee ,  Young-Gu Kim ,  Min-Sik Jung ,  Byoung-Hun Sung

Inventor： Bong-Sung SEO ,  Jun-Woo Lee ,  Young-Gu Kim ,  Min-Sik Jung ,  Byoung-Hun Sung

IPC: G02F1/1337

CPC classification number: G02F1/133753 ,  G02F2001/133757

Abstract: The present invention provides a liquid crystal display including a first substrate including a first alignment layer, gate lines, and data lines, a second substrate facing the first substrate and including a second alignment layer, and a liquid crystal layer disposed between the first substrate and the second substrate. A plurality of pixels are arranged in a matrix defined by the gate lines and the data lines, and alignment directions of the first alignment layer and the second alignment layer in a first pixel are different than alignment directions in a neighboring pixel.

Abstract translation: 本发明提供一种液晶显示装置，其具备包括第一取向膜，栅线，数据线的第一基板，与第一基板相对的第二基板，具有第二取向膜，以及液晶层， 第二基板。 多个像素被布置在由栅极线和数据线限定的矩阵中，并且第一像素中的第一取向层和第二取向层的取向方向与相邻像素中的取向方向不同。

公开(公告)号：US20090191782A1

公开(公告)日：2009-07-30

申请号：US12357753

申请日：2009-01-22

Applicant: YONG-HWAN SHIN ,  Jun-Woo Lee

Inventor： YONG-HWAN SHIN ,  Jun-Woo Lee

IPC: H01J9/26

CPC classification number: G02F1/133788 ,  G02F2001/133757

Abstract: In a method of manufacturing a display panel, a first alignment member is formed on a first substrate. Liquid crystal is sealed between the first substrate and a second substrate opposite to the first substrate. Then, an electric field is applied to the liquid crystal to align the liquid crystal. Ultraviolet light is irradiated onto the first alignment member to form a second alignment member while applying the electric field to the liquid crystal.

Abstract translation: 在制造显示面板的方法中，第一对准部件形成在第一基板上。 液晶被密封在第一基板和与第一基板相对的第二基板之间。 然后，向液晶施加电场以使液晶对准。 紫外光照射到第一对准构件上，以形成第二对准构件，同时向液晶施加电场。

公开(公告)号：US20090088527A1

公开(公告)日：2009-04-02

申请号：US12238634

申请日：2008-09-26

Applicant: Joon-Mo Seo ,  Byoung-Un Kang ,  Jae-Hoon Kim ,  Ji-Eun Kim ,  Jun-Woo Lee

Inventor： Joon-Mo Seo ,  Byoung-Un Kang ,  Jae-Hoon Kim ,  Ji-Eun Kim ,  Jun-Woo Lee

IPC: C08L63/00

CPC classification number: C08L21/00 ,  C08L15/00 ,  C08L63/00 ,  C08L2666/04 ,  C09J163/00 ,  H01L2924/0002 ,  C08L2666/14 ,  H01L2924/00

Abstract: The present invention relates to an attach paste composition for a semiconductor package. The attach paste composition for a semiconductor package includes a mixed resin, or a blend of an elastic resin and an epoxy resin as a basic resin. At this time, preferably the basic resin includes 50 to 95 weight % of the elastic resin and 5 to 50 weight % of the epoxy resin. The present invention enables a conventional semiconductor packaging method using a die adhesive to eliminate a pre-drying process performed after application of a die adhesive through screen printing and a thermal hardening process performed after an encapsulation process, maintains the properties of the die adhesive, ensures reliability of semiconductor products, and realizes a simple process.

Abstract translation: 本发明涉及一种半导体封装用贴剂组合物。 用于半导体封装的附着膏组合物包括混合树脂或作为基础树脂的弹性树脂和环氧树脂的共混物。 此时，碱性树脂优选包含50〜95重量％的弹性树脂和5〜50重量％的环氧树脂。 本发明能够实现使用模具粘合剂的常规半导体封装方法来消除在通过丝网印刷施加模具粘合剂之后执行的预干燥处理和在封装工艺之后进行的热硬化处理，保持模具粘合剂的性质确保 半导体产品的可靠性，实现了一个简单的过程。

公开(公告)号：US20090058481A1

公开(公告)日：2009-03-05

申请号：US12005879

申请日：2007-12-28

Applicant: Kyung-Hoon Kim ,  Jun-Woo Lee ,  Taek-Sang Song

Inventor： Kyung-Hoon Kim ,  Jun-Woo Lee ,  Taek-Sang Song

IPC: H03K3/017

CPC classification number: H03K5/1565 ,  H03K5/1534

Abstract: A semiconductor memory device has a duty cycle correction circuit capable of outputting a duty cycle corrected clock and its inverted clock having substantially exactly 180° phase difference therebetween. The semiconductor memory device includes a duty cycle corrector configured to receive a first clock and a second clock to generate a first output clock and a second output clock whose duty cycle ratios are corrected in response to correction signals, and a clock edge detector configured to generate the correction signals corresponding to an interval between a reference transition timing of the first output clock and a reference transition timing of the second output clock.

Abstract translation: 半导体存储器件具有占空比校正电路，该电路能够输出占空比校正时钟及其倒相时钟，它们之间具有基本精确的180°相位差。 半导体存储器件包括占空比校正器，其被配置为接收第一时钟和第二时钟以产生第一输出时钟和响应校正信号校正其占空比的第二输出时钟;以及时钟沿检测器，被配置为产生 所述校正信号对应于所述第一输出时钟的参考转换定时与所述第二输出时钟的参考转换定时之间的间隔。

公开(公告)号：US20080111475A1

公开(公告)日：2008-05-15

申请号：US11728628

申请日：2007-03-26

Applicant: Ji-Yeon Baek ,  Jun-Woo Lee

Inventor： Ji-Yeon Baek ,  Jun-Woo Lee

IPC: H01J1/62

CPC classification number: H01L27/3276 ,  H01L27/12 ,  H01L27/124 ,  H01L27/326 ,  H01L27/3272 ,  H01L29/78633 ,  H01L51/5206

Abstract: An organic light emitting display device is disclosed. One embodiment of the organic light emitting display device includes a substrate member in which a plurality of pixel regions are arranged, and a plurality of thin film transistors which are formed on the pixels regions, respectively. The device also includes a data line which is arranged along one side edge of each of the pixel region and a common power source line which is arranged along the other side edge of each of the plurality of pixel regions and is substantially parallel to the data line. The device further includes a first pixel electrode which is electrically connected to one of the plurality of thin film transistors and is formed in each region of the pixel regions. The device also includes an organic film which is formed on the first pixel electrode, and a second pixel electrode which is formed on the organic film. One side edge of the first pixel electrode which is close to the data line is overlapped with the data line.

Abstract translation: 公开了一种有机发光显示装置。 有机发光显示装置的一个实施例包括其中布置有多个像素区域的基板构件和分别形成在像素区域上的多个薄膜晶体管。 该装置还包括沿着每个像素区域的一个侧边缘布置的数据线和沿着多个像素区域中的每一个的另一侧边缘布置并且基本上平行于数据线的公共电源线 。 该器件还包括电连接到多个薄膜晶体管之一并形成在像素区域的每个区域中的第一像素电极。 该器件还包括形成在第一像素电极上的有机膜和形成在有机膜上的第二像素电极。 靠近数据线的第一像素电极的一侧边缘与数据线重叠。

公开(公告)号：US20070159586A1

公开(公告)日：2007-07-12

申请号：US11543173

申请日：2006-10-04

Applicant: Hee-seop Kim ,  JianGang Lu ,  Eun-hee Han ,  Chang-hun Lee ,  Jun-woo Lee

Inventor： Hee-seop Kim ,  JianGang Lu ,  Eun-hee Han ,  Chang-hun Lee ,  Jun-woo Lee

IPC: G02F1/1343

CPC classification number: G02F1/133707 ,  G02F1/133784 ,  G02F2001/133738 ,  G02F2001/134381 ,  G02F2201/124 ,  G02F2201/128

Abstract: A liquid crystal display includes a first plate including first and second field-generating electrodes disposed in a pixel area of an insulating substrate and electrically separated from each other in a cross-finger structure, and a first alignment film covering the first and second field-generating electrodes and rubbed in a first direction; a second plate formed of an insulating substrate and including a third field-generating electrode, a plurality of field-generating portions and openings, and a second alignment film covering the third field-generating electrode and rubbed in a second direction; and a liquid crystal layer interposed between the first plate and the second plate.

Abstract translation: 液晶显示器包括：第一板，包括设置在绝缘基板的像素区域中的第一和第二场发生电极，并且以交叉指状结构彼此电分离，第一取向膜覆盖第一和第二场致发射电极， 产生电极并沿第一方向摩擦; 由绝缘基板形成的第二板，包括第三场产生电极，多个场产生部分和开口，以及覆盖第三场产生电极并沿第二方向摩擦的第二取向膜; 以及插入在第一板和第二板之间的液晶层。

公开(公告)号：US20140306357A1

公开(公告)日：2014-10-16

申请号：US14315495

申请日：2014-06-26

Applicant: Baek Soung PARK ,  Jae Won CHOI ,  Sung Min KIM ,  In Hwan KIM ,  Jun Woo LEE ,  Su MI IM

Inventor： Baek Soung PARK ,  Jae Won CHOI ,  Sung Min KIM ,  In Hwan KIM ,  Jun Woo LEE ,  Su MI IM

IPC: H01L23/544 ,  H01L21/70

CPC classification number: H01L23/544 ,  C09J7/20 ,  C09J2201/28 ,  C09J2201/36 ,  C09J2203/326 ,  H01L21/6836 ,  H01L21/70 ,  H01L24/27 ,  H01L2221/68327 ,  H01L2224/83191

Abstract: A dicing die-bonding film and a method of forming a groove in a dicing die-bonding film, the film including a base film; a pressure-sensitive adhesive layer stacked on the base film; and a bonding layer stacked on the pressure-sensitive adhesive layer, wherein the pressure-sensitive adhesive layer includes a first region overlapping with the bonding layer, and a second region not overlapping with the bonding layer, the second region including a third region adjacent to the first region, and a fourth region adjacent to the third region and having a groove formed therein.

Abstract translation: 一种切割芯片接合薄膜和一种在切割芯片接合薄膜中形成凹槽的方法，该薄膜包括一个基膜; 叠层在基膜上的压敏粘合剂层; 以及层叠在所述粘合剂层上的接合层，其中，所述压敏粘合剂层包括与所述接合层重叠的第一区域和与所述接合层不重叠的第二区域，所述第二区域包括与所述接合层相邻的第三区域 所述第一区域和与所述第三区域相邻并且在其中形成有凹槽的第四区域。

公开(公告)号：US08786809B2

公开(公告)日：2014-07-22

申请号：US13277348

申请日：2011-10-20

Applicant: Kyoung Tae Kim ,  Kyoung Ju Shin ,  Jun Woo Lee ,  Suk Hoon Kang ,  Baek Kyun Jeon ,  Young-Gu Kim

Inventor： Kyoung Tae Kim ,  Kyoung Ju Shin ,  Jun Woo Lee ,  Suk Hoon Kang ,  Baek Kyun Jeon ,  Young-Gu Kim

IPC: G02F1/1337

CPC classification number: G02F1/133788 ,  G02F1/133753 ,  G02F2001/133757 ,  G02F2001/133761 ,  G02F2001/133773

Abstract: In a liquid crystal display, a pretilt value provided by an upper alignment layer or a lower alignment layer is gradually changed in one domain, such that liquid crystal molecules have various arrangements in which azimuth angles of aligned liquid crystal molecules are gradually changed.

Abstract translation: 在液晶显示器中，由上取向层或下配向层提供的预倾斜值在一个区域中逐渐变化，使得液晶分子具有排列的液晶分子的方位角逐渐改变的各种布置。

公开(公告)号：US20140194555A1

公开(公告)日：2014-07-10

申请号：US14204128

申请日：2014-03-11

Applicant: Jun Woo LEE ,  Sung Min KIM ,  In Hwan KIM ,  Baek Soung PARK ,  Su Mi LIM ,  Jae Won CHOI

Inventor： Jun Woo LEE ,  Sung Min KIM ,  In Hwan KIM ,  Baek Soung PARK ,  Su Mi LIM ,  Jae Won CHOI

IPC: C09J163/00

CPC classification number: C09J163/00 ,  C08K5/0025 ,  C08K5/3445 ,  C08L63/00 ,  C09J7/00 ,  C09J7/10 ,  C09J2201/622 ,  C09J2203/326 ,  C09J2205/102 ,  C09J2463/00 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/27003 ,  H01L2224/27436 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29387 ,  H01L2224/32145 ,  H01L2224/83191 ,  H01L2224/83885 ,  H01L2224/85 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2224/48 ,  H01L2924/05442 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

Abstract: An adhesive composition for semiconductors, an adhesive film, and a semiconductor device, wherein, in a curing process including a first stage at a temperature ranging from 120° C. to 130° C. for 1 to 20 minutes, a second stage at a temperature ranging from 140° C. to 150° C. for 1 to 10 minutes, a third stage at a temperature ranging from 160° C. to 180° C. for 30 seconds to 10 minutes, and a fourth stage at a temperature ranging from 160° C. to 180° C. for 10 minutes to 2 hours, the adhesive film has a DSC curing rate in the first stage that is 40% or less of a total curing rate, a DSC curing rate in the fourth stage that is 30% to 60% higher than a DSC curing rate in the third stage, and DSC curing rates in each of the second and third stages that are 5% or more higher than a DSC curing rate of a preceding stage thereof.

Abstract translation: 一种用于半导体的粘合剂组合物，粘合剂膜和半导体器件，其中在包括在120℃至130℃的温度下进行1至20分钟的第一阶段的固化过程中，第二阶段在 温度范围为140℃至150℃，持续1至10分钟，第三阶段在160℃至180℃的温度下进行30秒至10分钟，第四阶段在温度范围 从160℃至180℃进行10分钟〜2小时，粘合膜的第一阶段的DSC固化速度为总固化速度的40％以下，第四阶段的DSC固化速度为 比第三阶段的DSC固化速度高30〜60％，第二阶段和第三阶段的DSC固化速度比前一阶段的DSC固化速度高5％以上。

公开(公告)号：US08767154B2

公开(公告)日：2014-07-01

申请号：US13169438

申请日：2011-06-27

Applicant: Suk-Hoon Kang ,  Baek-Kyun Jeon ,  Jun-Woo Lee ,  Tae-Ho Kim ,  Sung-Yi Kim ,  Soo-Ryun Cho

Inventor： Suk-Hoon Kang ,  Baek-Kyun Jeon ,  Jun-Woo Lee ,  Tae-Ho Kim ,  Sung-Yi Kim ,  Soo-Ryun Cho

IPC: G02F1/1337

CPC classification number: G02F1/1337 ,  G02F1/133753 ,  G02F2001/133761 ,  G02F2001/133765

Abstract: A photoalignment method includes irradiating light in a first direction to a first alignment layer, and irradiating light in a second direction opposite the first direction, after disposing a first mask on the first alignment layer.

Abstract translation: 光对准方法包括：在第一取向层上设置第一掩模之后，向第一取向层照射第一方向的光，并且在与第一方向相反的第二方向上照射光。