Disk device
    52.
    发明申请
    Disk device 失效
    磁盘设备

    公开(公告)号:US20050264924A1

    公开(公告)日:2005-12-01

    申请号:US11138395

    申请日:2005-05-27

    摘要: A control circuit board is opposed to an outer surface of a case in the form of a rectangular box, and an connector cable, which has connector terminals connectable with an external device, extends from the circuit board. The control circuit board has a plurality of first connector pads with a first property and a plurality of second connector pads with a second property different from the first property, the first and second connector pads being arranged side by side on the control circuit board. The connector cable has a proximal end portion connected to at least one type, among the first and second connector pads, and the connector terminals including a plurality of connector terminals connecting with the at least one type of connector pads to which the proximal end portion is connected.

    摘要翻译: 控制电路板与矩形盒形式的外壳的外表面相对,并且具有可与外部装置连接的连接器端子的连接器电缆从电路板延伸。 控制电路板具有多个具有第一特性的第一连接器焊盘和具有与第一特性不同的第二特性的多个第二连接器焊盘,第一和第二连接器焊盘并排布置在控制电路板上。 所述连接器电缆具有连接到所述第一和第二连接器焊盘中的至少一种类型的近端部分,并且所述连接器端子包括多个连接器端子,所述连接器端子与所述至少一种类型的连接器焊盘相连,所述连接器端子的近端部分 连接的。

    Silicon wafer
    54.
    发明授权
    Silicon wafer 有权
    硅晶片

    公开(公告)号:US06599603B1

    公开(公告)日:2003-07-29

    申请号:US09673955

    申请日:2000-10-24

    IPC分类号: C30B2906

    摘要: The present invention provides a CZ silicon wafer, wherein the wafer includes rod-like void defects and/or plate-like void defects inside thereof, and a CZ silicon wafer, wherein the silicon wafer includes void defects inside the wafer, a maximum value of a ratio between long side length L1 and short side length L2 (L1/L2) in an optional rectangle circumscribed the void defect image projected on an optional {110} plane is 2.5 or more, and the silicon wafer including rod-like void defects and/or plate-like void defects inside the wafer, wherein a void defect density of the silicon wafer at a depth of from the wafer surface to at least 0.5 &mgr;m after the heat treatment is ½ or less than that of inside the wafer. According to this, the silicon wafer, which is suitable for expanding reducing effect of void defects by heat treatment up to a deeper region, can be obtained.

    摘要翻译: 本发明提供了一种CZ硅晶片,其中晶片在其内部包括棒状空隙缺陷和/或板状空隙缺陷,以及CZ硅晶片,其中硅晶片包括晶片内的空隙,其最大值 在可选择的{110}平面上投影的空隙缺陷图像的任意矩形中的长边长L1和短边长L2之间的比率(L1 / L2)为2.5以上,硅晶片包括棒状空隙, /或晶片内的板状空隙缺陷,其中在晶片表面的深度处的硅晶片的空隙缺陷密度在热处理之后至少为0.5微米的半孔缺陷密度为晶片内部的1/2以下。 据此,可以获得适合于通过热处理直到更深的区域来减少空隙缺陷的效果的硅晶片。

    Silicon single crystal wafer for epitaxial wafer, epitaxial wafer, and methods for producing the same and evaluating the same
    55.
    发明授权
    Silicon single crystal wafer for epitaxial wafer, epitaxial wafer, and methods for producing the same and evaluating the same 有权
    用于外延晶片的硅单晶晶片,外延晶片及其制造方法及其评估

    公开(公告)号:US06548035B1

    公开(公告)日:2003-04-15

    申请号:US09868058

    申请日:2001-06-14

    IPC分类号: A01N4340

    摘要: A silicon single crystal wafer for epitaxial growth grown by the CZ method, which is doped with nitrogen and has a V-rich region over its entire plane, or doped with nitrogen, has an OSF region in its plane, and shows an LEP density of 20/cm2 or less or an OSF density of 1×104/cm2 or less in the OSF region, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer. There are provided a substrate for an epitaxial wafer that suppresses crystal defects to be generated in an epitaxial layer when epitaxial growth is performed on a CZ silicon single crystal wafer doped with nitrogen and also has superior IG ability, epitaxial wafer utilizing the substrate, as well as methods for producing them and method for evaluating a substrate suitable for an epitaxial wafer.

    摘要翻译: 通过CZ法生长的用于外延生长的硅单晶晶片,其掺杂有氮并在其整个平面上具有富V区或掺杂氮,在其平面中具有OSF区,并且显示出LEP密度 在OSF区域中使用20 / cm 2以下的OSF密度或1×10 4 / cm 2以下的OSF密度,利用该基板的外延晶片及其制造方法以及评价适用于外延晶片的基板的方法。 提供了一种用于外延晶片的衬底,其抑制在掺杂氮的CZ硅单晶晶片上进行外延生长时外延层中产生的晶体缺陷,并且还具有优异的IG能力,以及利用衬底的外延晶片 作为其制造方法和评价适用于外延晶片的基板的方法。

    Silicon single crystal wafer and method for producing silicon single crystal wafer
    56.
    发明授权
    Silicon single crystal wafer and method for producing silicon single crystal wafer 有权
    硅单晶晶片和硅单晶晶片的制造方法

    公开(公告)号:US06299982B1

    公开(公告)日:2001-10-09

    申请号:US09313856

    申请日:1999-05-18

    IPC分类号: C03B1529

    摘要: There is disclosed a silicon single crystal wafer produced by processing a silicon single crystal ingot grown by Czochralski method with doping nitrogen, wherein a size of grown-in defects in the silicon single crystal wafer is 70 nm or less, a silicon single crystal wafer produced by processing a silicon single crystal ingot grown by Czochralski method with doping nitrogen, the silicon single crystal ingot is grown with controlling a rate of cooling from 1150 to 1080° C. to be 2.3° C./min or more, and a method for producing a silicon single crystal wafer wherein a silicon single crystal ingot is grown with doping nitrogen and controlling a rate of cooling from 1150 to 1080° C. to be 2.3° C./min or more, and is then processed to provide a silicon single crystal wafer. The silicon single crystal wafer for device wherein growth of the crystal defects is suppressed can be produced by CZ method in high productivity.

    摘要翻译: 公开了通过用掺杂氮处理通过Czochralski法生长的硅单晶锭制造的硅单晶晶片,其中硅单晶晶片中的长期缺陷的尺寸为70nm以下,制造的硅单晶晶片 通过处理通过掺杂氮气的切克劳斯基法生长的硅单晶锭,生长硅单晶锭,控制冷却速率为1150℃至1080℃,为2.3℃/分钟以上, 制造硅单晶晶片,其中使用掺杂氮气生长硅单晶锭,并将冷却速率控制在1150至1080℃至2.3℃/分钟以上,然后进行处理以提供硅单晶 晶圆。 可以通过CZ法以高生产率制造晶体缺陷生长被抑制的器件用硅单晶晶片。

    Light-triggered switching circuit
    57.
    发明授权
    Light-triggered switching circuit 失效
    轻型触发开关电路

    公开(公告)号:US5148253A

    公开(公告)日:1992-09-15

    申请号:US742583

    申请日:1991-08-07

    申请人: Akihiro Kimura

    发明人: Akihiro Kimura

    CPC分类号: H03K17/79

    摘要: A light-triggered switching circuit which comprises a PNPN element, a resistor, and control means. The PNPN element is made of a P-type emitter layer, an N-type base layer, a P-type base layer, and an N-type emitter layer. The resistor is connected between the P-type base layer and the N-type emitter layer. The control means is connected between the P-type emitter layer and the N-type emitter layer. It controls the PNPN element such that the PNPN element performs a switching operation only when a voltage applied between the P-type emitter layer and the N-type emitter layer is lower than a predetermined value while a first amount of light is being applied to the PNPN element, and is also performs a switching operation, regardless of the value of the voltage applied between the P-type emitter layer and the N-type emitter layer, while a second amount of light, different from the first amount of light, is being applied to the PNPN element.

    Magnetic medium for horizontal magnetization recording and method for
making same
    58.
    发明授权
    Magnetic medium for horizontal magnetization recording and method for making same 失效
    用于水平磁化记录的磁介质及其制造方法

    公开(公告)号:US4743348A

    公开(公告)日:1988-05-10

    申请号:US087700

    申请日:1987-08-18

    摘要: A magnetic medium for horizontal magnetization recording which comprises a non-magnetic substrate and a magnetic recording film formed on at least one side of the substrate, is described. The magnetic recording film consists essentially of an amorphous Co-Cr alloy containing from 5 to 15 atomic percent of oxygen atom. A method for making the above type of medium is also described in which the magnetic film is vapor deposited under conditions of a partial pressure of oxygen gas of 1.times.10.sup.-3 to 3.times.10.sup.-3 Torr., and a sputtering rate of from 0.05 to 0.15 .mu.m/minute.

    摘要翻译: 描述了用于水平磁化记录的磁介质,其包括形成在基板的至少一侧上的非磁性基板和磁记录膜。 该磁记录膜基本上由含有5至15原子%氧原子的无定形Co-Cr合金组成。 还描述了制造上述类型的介质的方法,其中在氧气分压为1×10-3至3×10-3乇的条件下将磁性膜气相沉积,并且溅射速率为0.05至0.15μm 米/分钟。