公开(公告)号：US20090051972A1

公开(公告)日：2009-02-26

申请号：US11918077

申请日：2006-03-31

Applicant: Zhihong Liu ,  Feng Chen ,  Bin Yang

Inventor： Zhihong Liu ,  Feng Chen ,  Bin Yang

IPC: H04N1/40

CPC classification number: H04N1/4052

Abstract: The present invention relates to a method and apparatus capable of generating frequency-modulation halftone dots in high speed and belongs to the field of the digital image halftone. In the prior art, read-write operation is usually carried out many times in error rows during processing each pixel so that halftone dots are generated in low speed. In the method according to the present invention, the error generated by the current pixel is buffered in a register file and the final accumulated error values are written in the error rows only after all of the relative pixels are processed. Thus, read-write operation is carried out only once in the error rows for processing each pixel. The present invention also provides an apparatus to implement the method. The apparatus comprises an error row memory, an error buffer register file, a gray generation circuit, a threshold comparison circuit, an error generation circuit, an error buffer register file control circuit, and an error row control circuit. The method and apparatus according to the present invention decrease the steps in operation and improve the speed for generating the frequency-modulation halftone dots.

Abstract translation: 本发明涉及能够高速产生调频半色调点的属于数字图像半色调的领域的方法和装置。 在现有技术中，在处理每个像素期间，读写操作通常在错误行中进行多次，使得半色调点以低速生成。 在根据本发明的方法中，由当前像素产生的误差被缓存在寄存器文件中，并且只有在处理了所有相对像素之后才将最终的累积误差值写入误差行。 因此，在用于处理每个像素的错误行中仅执行一次读写操作。 本发明还提供了一种实现该方法的装置。 该装置包括错误行存储器，错误缓冲寄存器文件，灰色生成电路，阈值比较电路，错误产生电路，错误缓冲寄存器文件控制电路和错误行控制电路。 根据本发明的方法和装置降低了操作步骤，提高了生成调频半色调点的速度。

公开(公告)号：US20080286921A1

公开(公告)日：2008-11-20

申请号：US11748743

申请日：2007-05-15

Applicant: Wen Yu ,  Paul Besser ,  Bin Yang ,  Haijiang Yu ,  Simon S. Chan

Inventor： Wen Yu ,  Paul Besser ,  Bin Yang ,  Haijiang Yu ,  Simon S. Chan

IPC: H01L21/8234

CPC classification number: H01L21/324 ,  H01L21/28052 ,  H01L29/66507 ,  H01L29/78

Abstract: The gate and active regions of a device are formed and alternating steps of applying and removing nitride and oxide layers allows exposing silicon in different areas while keeping silicon or polysilicon in other area covered with nitride. Metal layers are deposited over the exposed silicon or polysilicon and annealing forms a silicide layer in the selected exposed areas. The oxide and/or nitride layers are removed from the covered areas and another metal layer is deposited. The anneal process is repeated with silicide of one thickness formed over the second exposed areas with additional thickness of silicide formed over the previous silicide thickness.

Abstract translation: 形成器件的栅极和有源区，并且施加和去除氮化物和氧化物层的交替步骤允许在不同区域暴露硅，同时保持覆盖有氮化物的其它区域中的硅或多晶硅。 金属层沉积在暴露的硅或多晶硅上，退火在所选择的暴露区域中形成硅化物层。 氧化物层和/或氮化物层从被覆盖区域移除，另一个金属层被沉积​​。 在第二暴露区域上形成一层厚度的硅化物，并在先前的硅化物厚度上形成附加的硅化物厚度来重复退火工艺。

公开(公告)号：US20080003609A1

公开(公告)日：2008-01-03

申请号：US11801676

申请日：2007-05-10

Applicant: Bin Yang

Inventor： Bin Yang

IPC: C12Q1/68

CPC classification number: C12Q1/6886 ,  C12Q2600/112 ,  C12Q2600/154 ,  C12Q2600/16

Abstract: A diagnostic method for bladder urethelial carcinoma includes obtaining an isolated nucleotide sample from a subject and detecting the promoter methylation of at least three tumor suppressor genes selected form group consisting of DAPK, RAR-beta, p14, p73, MGMT, APC, SOCS-1, BRCA-1, and FHIT.

Abstract translation: 膀胱尿道上皮癌的诊断方法包括从受试者获得分离的核苷酸样品，并检测至少三种选自DAPK，RAR-β，p14，p73，MGMT，APC，SOCS-1的肿瘤抑制基因的启动子甲基化 ，BRCA-1和FHIT。

公开(公告)号：US10131889B1

公开(公告)日：2018-11-20

申请号：US15810007

申请日：2017-11-11

Applicant: Liming Liu ,  Bin Yang

Inventor： Liming Liu ,  Bin Yang

IPC: C12N9/20 ,  C12N15/74 ,  C12N15/00 ,  C12P9/00

Abstract: The present invention relates to the field of bioengineering. It provides a Candida antarctica lipase B mutant and its application. The mutant enzyme overcomes the limit of the parent enzyme that can exhibit high enantioselectivity towards (R)-3-TBDMSO glutaric acid methyl monoester only at temperatures below 5° C. The mutant enzyme successfully increased R-ee value at 5-70° C. The mutant D223V/A281S exhibits high R-ee value (>99%), high conversion rate (80%), and high space-time yield (107.54 g L−1 d−1). The present invention lays a foundation for industrial production of (R)-3-TBDMSO glutaric acid methyl monoester using a biosynthesis approach and provide insights into conformational dynamics-based enzyme design.

公开(公告)号：US09134079B2

公开(公告)日：2015-09-15

申请号：US12652027

申请日：2010-01-04

Applicant: Anna Lee Tonkovich ,  Bin Yang ,  Steven T. Perry ,  Sean P. Fitzgerald ,  Ravi Arora ,  Robert Luzenski ,  Thomas D. Yuschak

Inventor： Anna Lee Tonkovich ,  Bin Yang ,  Steven T. Perry ,  Sean P. Fitzgerald ,  Ravi Arora ,  Robert Luzenski ,  Thomas D. Yuschak

IPC: B01J10/00 ,  F28F13/06 ,  B01J19/00 ,  B01L3/00

CPC classification number: F28F13/06 ,  B01J19/0093 ,  B01J2219/00783 ,  B01J2219/00822 ,  B01J2219/00824 ,  B01J2219/00833 ,  B01J2219/00835 ,  B01J2219/0086 ,  B01J2219/00889 ,  B01J2219/00891 ,  B01J2219/00995 ,  B01L3/502746 ,  B01L2200/027 ,  B01L2300/0864 ,  B01L2300/0887 ,  B01L2400/0487 ,  B01L2400/086 ,  F28F2260/02 ,  Y10T137/0396

Abstract: The invention provides apparatuses and techniques for controlling flow between a manifold and two or more connecting microchannels. Flow between plural connecting microchannels, that share a common manifold, can be made more uniform by the use of flow straighteners and distributors that equalize flow in connecting channels. Alternatively, flow can be made more uniform by sections of narrowed diameter within the channels. Methods of making apparatus and methods of conducting unit operations in connecting channels are also described.

Abstract translation: 本发明提供用于控制歧管和两个或更多个连接微通道之间的流动的装置和技术。 通过使用均衡连接通道中的流动的流平衡器和分配器，可以使共享共同歧管的多个连接微通道之间的流动更均匀。 或者，可以通过通道内的变窄直径的部分使流动更均匀。 还描述了在连接通道中进行单元操作的装置和方法的方法。

公开(公告)号：US09099327B2

公开(公告)日：2015-08-04

申请号：US13568839

申请日：2012-08-07

Applicant: Wilfried Haensch ,  Christian Lavoie ,  Christine Qiqing Ouyang ,  Xiaoyan Shao ,  Paul M. Solomon ,  Zhen Zhang ,  Bin Yang

Inventor： Wilfried Haensch ,  Christian Lavoie ,  Christine Qiqing Ouyang ,  Xiaoyan Shao ,  Paul M. Solomon ,  Zhen Zhang ,  Bin Yang

IPC: H01L29/06 ,  H01L21/8238 ,  H01L29/417

CPC classification number: H01L29/0673 ,  H01L21/823814 ,  H01L29/41791

Abstract: A multigate structure which comprises a semiconductor substrate; an ultra-thin silicon or carbon bodies of less than 20 nanometers thick located on the substrate; an electrolessly deposited metallic layer selectively located on the side surfaces and top surfaces of the ultra-thin silicon or carbon bodies and selectively located on top of the multigate structures to make electrical contact with the ultra-thin silicon or carbon bodies and to minimize parasitic resistance, and wherein the ultra-thin silicon or carbon bodies and metallic layer located thereon form source and drain regions is provided along with a process to fabricate the structure.

Abstract translation: 一种多栅格结构，包括半导体衬底; 位于基板上的小于20纳米厚的超薄硅或碳体; 选择性地位于超薄硅或碳体的侧表面和顶表面上的无电沉积金属层，并且选择性地位于多结构结构的顶部上以与超薄硅或碳体电接触并最小化寄生电阻 并且其中位于其上的超薄硅或碳体和金属层形成源区和漏区以及制造该结构的工艺。

公开(公告)号：US08987110B2

公开(公告)日：2015-03-24

申请号：US13467730

申请日：2012-05-09

Applicant: Man Fai Ng ,  Bin Yang

Inventor： Man Fai Ng ,  Bin Yang

IPC: H01L21/762 ,  H01L21/84 ,  H01L21/8238

CPC classification number: H01L21/76224 ,  H01L21/76283 ,  H01L21/823807 ,  H01L21/823878 ,  H01L21/84

Abstract: A fabrication method for a semiconductor device structure is provided. The device structure has a layer of silicon and a layer of silicon dioxide overlying the layer of silicon, and the method begins by forming an isolation recess by removing a portion of the silicon dioxide and a portion of the silicon. The isolation recess is filled with stress-inducing silicon nitride and, thereafter, the silicon dioxide is removed such that the stress-inducing silicon nitride protrudes above the silicon. Next, the exposed silicon is thermally oxidized to form silicon dioxide hardmask material overlying the silicon. Thereafter, a first portion of the silicon dioxide hardmask material is removed to reveal an accessible surface of the silicon, while leaving a second portion of the silicon dioxide hardmask material intact. Next, silicon germanium is epitaxially grown from the accessible surface of the silicon.

Abstract translation: 提供了半导体器件结构的制造方法。 器件结构具有硅层和覆盖硅层的二氧化硅层，并且该方法开始于通过去除一部分二氧化硅和一部分硅来形成隔离凹槽。 隔离凹部填充有应力诱导性氮化硅，然后去除二氧化硅，使得应力诱导性氮化硅突出于硅上方。 接下来，暴露的硅被热氧化以形成覆盖在硅上的二氧化硅硬掩模材料。 此后，去除二氧化硅硬掩模材料的第一部分以露出硅的可接近表面，同时留下二氧化硅硬掩模材料的第二部分完好无损。 接下来，从硅的可接近表面外延生长硅锗。

公开(公告)号：US08976383B2

公开(公告)日：2015-03-10

申请号：US13976335

申请日：2011-12-27

Applicant: Wenfa Qi ,  Shuchang Han ,  Gaoyang Wang ,  Lidong Wang ,  Bin Yang

Inventor： Wenfa Qi ,  Shuchang Han ,  Gaoyang Wang ,  Lidong Wang ,  Bin Yang

IPC: G06F3/12 ,  G06K15/02 ,  H04L9/32 ,  H04N1/44 ,  H04L29/06 ,  H04L29/08 ,  G06K15/00

CPC classification number: G06F3/1238 ,  G06F3/1222 ,  G06F3/1288 ,  G06F3/1289 ,  G06K15/4095 ,  H04L63/102 ,  H04L63/20 ,  H04L67/125 ,  H04L67/34

Abstract: Disclosed is a method and system for document printing management and control and source tracking. A printing management service program runs at a server end. A printing monitoring service program runs at a client end. The printing management service program saves client end information, monitors and manages a client end computer, sets a printing management policy, and delivers operation instructions to the client end. The printing monitoring service program collects the client end information, sends the client end information to the server end, and executes the operation instruction.

Abstract translation: 公开了一种用于文件打印管理和控制和源跟踪的方法和系统。 打印管理服务程序在服务器端运行。 打印监控服务程序在客户端运行。 打印管理服务程序保存客户端信息，监控和管理客户端计算机，设置打印管理策略，并向客户端传送操作指令。 打印监控服务程序收集客户端信息，将客户端信息发送到服务器端，并执行操作指令。

公开(公告)号：US08847315B2

公开(公告)日：2014-09-30

申请号：US13465064

申请日：2012-05-07

Applicant: Bin Yang ,  Xia Li ,  Jun Yuan

Inventor： Bin Yang ,  Xia Li ,  Jun Yuan

IPC: H01L27/12 ,  H01L29/47 ,  H01L29/10 ,  H01L29/66 ,  H01L21/8238 ,  H01L21/84

CPC classification number: H01L21/823814 ,  H01L21/28026 ,  H01L21/823828 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/42376 ,  H01L29/47 ,  H01L29/66545 ,  H01L29/66621 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7834

Abstract: A complementary metal-oxide-semiconductor (CMOS) device and methods of formation thereof are disclosed. In a particular embodiment, a CMOS device includes a silicon substrate, a dielectric insulator material on the silicon substrate, and an extension layer on the dielectric insulator material. The CMOS device further includes a gate in contact with a channel and in contact with an extension region. The CMOS device also includes a source in contact with the extension region and a drain in contact with the extension region. The extension region includes a first region in contact with the source and the gate and includes a second region in contact with the drain and the gate.

Abstract translation: 公开了一种互补金属氧化物半导体（CMOS）器件及其形成方法。 在特定实施例中，CMOS器件包括硅衬底，硅衬底上的介电绝缘体材料以及介电绝缘体材料上的延伸层。 CMOS器件还包括与沟道接触并与延伸区域接触的栅极。 CMOS器件还包括与延伸区域接触的源极和与延伸区域接触的漏极。 延伸区域包括与源极和栅极接触的第一区域，并且包括与漏极和栅极接触的第二区域。

公开(公告)号：US20140186229A1

公开(公告)日：2014-07-03

申请号：US13948967

申请日：2013-07-23

Applicant: Anna Lee Y. Tonkovich ,  Robert D. Litt ,  Timothy M. Werner ,  Bin Yang

Inventor： Anna Lee Y. Tonkovich ,  Robert D. Litt ,  Timothy M. Werner ,  Bin Yang

IPC: B01J19/18

CPC classification number: B01J19/0093 ,  B01J19/1831 ,  B01J2219/00783 ,  B01J2219/00835 ,  B01J2219/00873 ,  B01J2219/00984 ,  C07C29/152 ,  C10G2/341 ,  C07C31/04

Abstract: An integrated microchannel reactor and heat exchanger comprising: (a) a waveform sandwiched between opposing shim sheets and mounted to the shim sheets to form a series of microchannels, where each microchannel includes a pair of substantially straight side walls, and a top wall formed by at least one of the opposing shim sheets, and (b) a first set of microchannels in thermal communication with the waveform, where the waveform has an aspect ratio greater than two.

Abstract translation: 一种集成微通道反应器和热交换器，包括：（a）夹在相对的垫片之间的波形并安装到垫片以形成一系列微通道，其中每个微通道包括一对基本上直的侧壁，以及由 至少一个相对的垫片，和（b）与波形热连通的第一组微通道，其中波形的纵横比大于2。