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51.发明申请公开(公告)号：US20180331126A1
公开(公告)日：2018-11-15
申请号：US15578534
申请日：2016-11-02
Inventor： Zhuo Xu , Yajie Bai , Xiaolin Wang , Rui Wang , Fei Shang , Haijun Qiu
IPC: H01L27/12 , H01L29/786
CPC classification number: H01L27/1225 , H01L21/707 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1248 , H01L27/1262 , H01L27/127 , H01L27/1288 , H01L27/3248 , H01L27/326 , H01L27/3262 , H01L27/3276 , H01L29/78633 , H01L29/7869
Abstract: The present a plication discloses an array substrate, a display panel a splay apparatus having the same, and a fabricating method thereof The array substrate includes a base substrate; a first electrode and a second electrode, the first electrode and the second electrode being two different electrodes selected from a pixel electrode and a common electrode; and a thin film transistor including an active layer, an etch stop layer on a side of the active layer distal to the base substrate, a first node, and a second node.
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公开(公告)号：US09966444B2
公开(公告)日：2018-05-08
申请号：US14801445
申请日：2015-07-16
Inventor： Wu Wang , Haijun Qiu , Fei Shang , Guolei Wang
IPC: H01L29/417 , G02F1/1362 , H01L29/786 , G02F1/1368
CPC classification number: H01L29/41733 , G02F1/1362 , H01L29/786
Abstract: Disclosed is a thin film transistor, including a gate electrode, a source electrode and a drain electrode. The source electrode includes a loop structure with an opening, and a width of the opening is less than a maximum width of an inner ring of the loop structure of the source electrode in a direction identical to a direction of the width of the opening. The drain electrode is surrounded by the loop structure, and is not in contact with the source electrode. The drain electrode is distant from the inner ring of the loop structure of the source electrode at a same interval.
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公开(公告)号：US09880433B2
公开(公告)日：2018-01-30
申请号：US14742081
申请日：2015-06-17
Inventor： Zhe Li , Fei Shang , Haijun Qiu
IPC: G02B5/22 , G02F1/1333 , G02F1/1362 , G02F1/1335
CPC classification number: G02F1/136204 , G02F1/133512 , G02F1/133514
Abstract: A color filter substrate is provided. The color filter substrate includes an underlying substrate, a first light-shielding structure, a second light-shielding structure and an electrical conductive transparent layer configured for transferring electrostatic charge An outer edge of the first light-shielding structure is spaced apart by a first distance from an outer edge of the non-displaying portion of the underlying substrate. A vertical projection of a non-displaying portion of the underlying substrate on a first plane is entirely covered by a combination of a vertical projection of the first light-shielding structure on the first plane and a vertical projection of the second light-shielding structure on the first plane, the first plane being a plane perpendicular to a propagation direction of light emitted toward the non-displaying region of the color filter substrate.
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公开(公告)号：US09721978B2
公开(公告)日：2017-08-01
申请号：US15030576
申请日：2015-08-14
Inventor： Wu Wang , Haijun Qiu , Fei Shang , Guolei Wang
IPC: H01L27/12 , H01L21/441 , H01L29/417 , H01L29/786 , H01L21/027 , H01L21/4757 , H01L21/4763 , H01L29/45 , H01L29/66
CPC classification number: H01L27/1288 , H01L21/0274 , H01L21/441 , H01L21/47573 , H01L21/47635 , H01L27/1225 , H01L29/41725 , H01L29/41733 , H01L29/45 , H01L29/66969 , H01L29/78615 , H01L29/78618 , H01L29/7869
Abstract: Various embodiments provide a thin film transistor (TFT) device, a manufacturing method of the TFT device, and a display apparatus including the TFT device. An etch stop layer (ESL) material is formed on an active layer on a substrate. An electrical conductive layer material is formed on the ESL material for forming a source electrode and a drain electrode. The electrical conductive layer material is patterned to form a first portion of the source electrode containing a first via-hole through the source electrode, and to form a first portion of the drain electrode containing a second via-hole through the drain electrode. The ESL material is patterned to form an etch stop layer (ESL) pattern including a first ESL via-hole connecting to the first via-hole through the source electrode and including a second ESL via-hole connecting to the second via-hole through the drain electrode.
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公开(公告)号：US09490266B2
公开(公告)日：2016-11-08
申请号：US14740943
申请日：2015-06-16
Inventor： Wu Wang , Haijun Qiu , Fei Shang , Guolei Wang , Rui Wang
CPC classification number: H01L27/1222 , G02F1/136227 , G02F2001/134372 , H01L27/124 , H01L27/127 , H01L27/15 , H01L29/66742 , H01L29/78696
Abstract: Embodiments of the present invention relate to the display field and provide an array substrate, a method for producing the same and a display apparatus, for reducing a via hole space without adding a step for patterning the gate insulation layer and thereby reducing product costs. The array substrate includes a gate metal layer, a gate insulation layer, a source and drain metal layer and a passivation layer, wherein the array substrate is provided with a via hole, which passes through the passivation layer, the source and drain metal layer and the gate insulation layer and at which a transparent conductive material is deposited for connecting the source and drain metal layer with the gate metal layer.
Abstract translation: 本发明的实施例涉及显示领域，并且提供阵列基板，其制造方法和显示装置，用于减少通孔空间，而不增加用于图案化栅绝缘层的步骤，从而降低产品成本。 阵列基板包括栅极金属层，栅极绝缘层，源极和漏极金属层以及钝化层，其中阵列基板设置有穿过钝化层，源极和漏极金属层的通孔，以及 栅极绝缘层，并且沉积透明导电材料以将源极和漏极金属层与栅极金属层连接。
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Patent Agency Ranking
公开(公告)号：US20160118004A1
公开(公告)日：2016-04-28
申请号：US14800541
申请日：2015-07-15
Inventor： Yizhen Xu , Zhizhong Tu , Fei Shang , Haijun Qiu
IPC: G09G3/36
CPC classification number: G09G3/3648 , G09G3/3266 , G09G3/3291 , G09G2300/0426 , G09G2310/0289 , G09G2310/0291 , G09G2330/022
Abstract: A method for driving a display apparatus and a display apparatus are provided. With the method for driving a display apparatus according to the present disclosure, the gate driver circuit, the source driver circuit and the reference voltage generation circuit are controlled not to output any signal during an interval between display of two frames of pictures, so as to solve the problems that a gate driver circuit and a source driver circuit in the existing display apparatus have large power consumption, and operate at an excessive high temperature.
Abstract translation: 提供了一种用于驱动显示装置和显示装置的方法。 通过根据本公开的驱动显示装置的方法，控制栅极驱动器电路，源极驱动电路和参考电压产生电路，以在两帧图像的显示之间的间隔期间不输出任何信号，从而 解决现有显示装置中的栅极驱动电路和源极驱动电路具有大的功耗，并且在过高的温度下工作的问题。
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公开(公告)号：US12279504B2
公开(公告)日：2025-04-15
申请号：US17348882
申请日：2021-06-16
Inventor： Jibum Yang , Myoungsoo Lee , Euiku Lee , Meishan Xu , Chao Kong , Na Li , Haijun Qiu , Fei Chen
Abstract: A display panel and a fabricating method thereof, and a displaying device. The display panel includes: a driving backplane, a light-emitting-device layer provided on the driving backplane, and a packaging layer, a color-film layer and a light absorbing layer provided on one side of the light-emitting-device layer that is further away from the driving backplane; wherein the light absorbing layer is configured for absorbing light rays of a specific wavelength in external-environment light and in light rays emitted by the light-emitting-device layer; and the specific wavelength includes at least one of a wavelength between a red-light wave band and a green-light wave band, a wavelength between a green-light wave band and a blue-light wave band, a wavelength shorter than a blue-light wave band and a wavelength longer than a red-light wave band.
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公开(公告)号：US12243477B2
公开(公告)日：2025-03-04
申请号：US17788581
申请日：2021-09-17
Inventor： Rui Wang , Chao Zeng , Ming Hu , Haijun Qiu , Weiyun Huang , Tianyi Cheng
IPC: G09G3/3225 , H10K59/131
Abstract: A pixel driving circuit is provided. The pixel driving circuit includes a driving transistor; a storage capacitor; a first reset transistor having a gate electrode connected to a first gate line in a present stage of a plurality of first gate lines, a source electrode connected to a respective first reset signal line of a plurality of first reset signal lines, and a drain electrode connected to an anode of a light emitting element; and a second reset transistor having a gate electrode connected to a first gate line in a previous stage of the plurality of first gate lines, a source electrode connected to a respective second reset signal line of a plurality of second reset signal lines, and a drain electrode connected to a drain electrode of the driving transistor.
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59.发明授权公开(公告)号：US12089475B2
公开(公告)日：2024-09-10
申请号：US15733811
申请日：2020-03-09
Inventor： Haijun Qiu , Yuedi He , Guoqiang Tang , Zhenhua Zhang
IPC: H10K59/65 , H04N23/45 , H04N23/57 , H10K59/122 , H10K59/124 , H10K59/126 , H10K71/00 , H10K59/12
CPC classification number: H10K59/65 , H04N23/45 , H04N23/57 , H10K59/122 , H10K59/124 , H10K59/126 , H10K71/00 , H10K59/1201
Abstract: The present disclosure provides an array substrate and a preparation method thereof, a display device and an imaging method thereof. In one embodiment, an array substrate includes: a base substrate; and a plurality of imaging apertures and a plurality of sensor units on the base substrate, wherein the plurality of imaging apertures are respectively on the plurality of sensor units, so that each of the imaging apertures corresponds to each of the sensor units one by one.
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公开(公告)号：US12041720B2
公开(公告)日：2024-07-16
申请号：US18312708
申请日：2023-05-05
Inventor： Ren Xiong , Fan Li , Qiang Tang , Fei Shang , Haijun Qiu , Yuanyuan Chai , Huiqiang Song
IPC: H05K1/11 , G06F3/041 , G06F3/044 , H01R12/61 , H05K3/36 , H05K1/18 , H10K59/131 , H10K59/179
CPC classification number: H05K1/118 , G06F3/0412 , G06F3/0443 , G06F3/0446 , H01R12/61 , H05K3/363 , G06F3/04164 , H05K1/189 , H05K2201/041 , H05K2201/09227 , H05K2201/09236 , H05K2201/09381 , H05K2201/0939 , H05K2201/09481 , H05K2201/10128 , H10K59/131 , H10K59/179
Abstract: A display device and a manufacturing method thereof are provided. The display device includes a display panel (20) and a flexible circuit board electrically connected with the display panel (20). The flexible circuit board includes a first circuit board (11), a second circuit board (22) and a conductive portion; the first circuit board (11) includes a first substrate (100), and a main contact pad, a first wire (501) and a second wire (502) provided on the first substrate (100); the second circuit board (22) includes a second substrate (200), a relay contact pad and a third wire (210) provided on the second substrate (200); and the conductive portion is configured for electrically connecting the main contact pad and the relay contact pad.
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