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    Methods and apparatus for the processing of digital signals
    51.
    发明授权
    Methods and apparatus for the processing of digital signals 失效
    用于处理数字信号的方法和装置

    公开(公告)号：US5987487A

    公开(公告)日：1999-11-16

    申请号：US751967

    申请日：1996-11-19

    Applicant: David R. Welland

    Inventor： David R. Welland

    IPC: H03H17/00 ,  G06F7/72 ,  H03M7/18 ,  G06F7/38 ,  G06F17/10

    CPC classification number: H03M7/18 ,  G06F7/729

    Abstract: Methods and apparatus for the processing of digital signals having high speed and low power dissipation. The apparatus uses Residue Number Systems (RNSs) to represent the signals and/or parameters, with each digit within an RNS system being encoded in a "one-hot" encoding scheme wherein each possible value of a digit has an associated single line, one and only one of which will be high at any one time. The combination of an RNS system with the one-hot scheme results in low signal activity and low loading of signal lines which in turn result in low power. Methods and apparatus for addition, subtraction, multiplication and other operations, and conversion from and to natural numbers. The speed advantage offered by other RNS-based architectures is retained.

    Abstract translation: 用于处理具有高速度和低功耗的数字信号的方法和装置。 该装置使用残差编号系统（RNS）来表示信号和/或参数，其中RNS系统内的每个数字被编码为“一热”编码方案，其中每个可能的数字值具有相关联的单行，一 只有其中一个在任何时候都会很高。 RNS系统与单热方案的组合导致低信号活动和低负载的信号线，这又导致低功率。 用于加法，减法，乘法和其他操作的方法和装置，以及从自然数转换。 其他基于RNS架构的速度优势得到保留。

    Delta-sigma analog-to-digital converter with chopper stabilization at the sampling frequency
    52.
    发明授权
    Delta-sigma analog-to-digital converter with chopper stabilization at the sampling frequency 失效
    具有采样频率下斩波稳定的Delta-sigma模数转换器

    公开(公告)号：US5039989A

    公开(公告)日：1991-08-13

    申请号：US429211

    申请日：1989-10-27

    Applicant: David R. Welland ,  Bruce P. Del Signore ,  Donald A. Kerth

    Inventor： David R. Welland ,  Bruce P. Del Signore ,  Donald A. Kerth

    IPC: H03M3/02

    CPC classification number: H03M3/34 ,  H03M3/458

    Abstract: A chopper stabilized analog-to-digital converter includes an analog modulator (10) and a digital filter (12). The analog modulator (10) is comprised of four integrators, a first integrator (20) which is continuous time and the remaining stages of integration (22) which are either continuous or discrete. The first integrator (20) is a chopper stabilized integrator which is comprised of a chopper stabilized differential amplifier (32) which has a single ended output and operates in a continuous time mode. The modulator has a zero that is located at the harmonics of the sampling frequency of the modulator and the chopping clock for the chopper stabilized operation operates at the sampling frequency.

    Abstract translation: 斩波稳定的模拟 - 数字转换器包括模拟调制器（10）和数字滤波器（12）。 模拟调制器（10）由四个积分器组成，第一积分器（20）是连续时间，剩余的积分级（22）是连续的或离散的。 第一积分器（20）是斩波稳定积分器，其由具有单端输出并且以连续时间模式操作的斩波稳定差分放大器（32）组成。 调制器具有位于调制器采样频率谐波处的零点，斩波稳定运行的斩波时钟以采样频率工作。

    Differential amplifier stage having bias compensating means
    53.
    发明授权
    Differential amplifier stage having bias compensating means 失效
    差分放大器级具有偏置补偿装置

    公开(公告)号：US4425551A

    公开(公告)日：1984-01-10

    申请号：US247649

    申请日：1981-03-26

    Applicant: David E. Blackmer ,  David R. Welland

    Inventor： David E. Blackmer ,  David R. Welland

    IPC: H03F3/45

    CPC classification number: H03F3/45479

    Abstract: An improved amplifier of the type comprising bipolar transistor means coupled between the input terminal of the amplifier and a differential pair of transistors. Compensation means is provided for generating a compensating signal through the bipolar transistor means such that the bipolar transistor means and compensation means reduce the amount of bias current drawn from the input signal to the amplifier. Other aspects of the present invention include the provision of reducing DC offset voltages between each side of the differential amplifier due to the operation of the device with its input terminals at different voltage levels, and the provision of a zero in the transfer characteristics of the amplifier to mitigate the effects of poles provided in the transfer characteristics.

    Abstract translation: 一种改进的放大器，其类型包括耦合在放大器的输入端和差分对晶体管之间的双极晶体管装置。 提供补偿装置用于通过双极晶体管装置产生补偿信号，使得双极晶体管装置和补偿装置减少从输入信号汲取到放大器的偏置电流量。 本发明的其它方面包括由于器件的操作使其输入端子处于不同的电压电平而在差分放大器的每一侧之间提供减小的DC偏移电压，并且在放大器的传输特性中提供零值 以减轻传递特性中提供的极点的影响。

    Precision reference circuit and related method
    54.
    发明授权
    Precision reference circuit and related method 有权

    公开(公告)号：US09726696B2

    公开(公告)日：2017-08-08

    申请号：US13723417

    申请日：2012-12-21

    Applicant: Matthew Powell ,  David R. Welland

    Inventor： Matthew Powell ,  David R. Welland

    IPC: G01K7/00 ,  G01R19/00 ,  G05F3/02 ,  G01R35/00 ,  G01K7/01

    CPC classification number: G01R19/0069 ,  G01K7/01 ,  G01R35/00 ,  G05F3/02

    Abstract: In one form, a reference circuit includes a measurement circuit and a determination circuit. The measurement circuit has an output for providing a ratio of a difference in base-to-emitter voltage (VBE) of a bipolar device at different current densities to a VBE of the bipolar device at a first current density. The determination circuit has an input coupled to the measurement circuit, and an output for providing a digital value of a parameter in response to the ratio. In another form, the reference circuit further includes a voltage generation circuit having an input coupled to the determination circuit, and an output, for modulating an analog voltage using the digital value to provide a reference voltage to the output, wherein the reference voltage is temperature compensated over a temperature range.

    Temperature Measurement Circuitry and System
    55.
    发明申请
    Temperature Measurement Circuitry and System 有权
    温度测量电路与系统

    公开(公告)号：US20140086278A1

    公开(公告)日：2014-03-27

    申请号：US13624619

    申请日：2012-09-21

    Applicant: David R. Welland

    Inventor： David R. Welland

    IPC: G01K7/00

    CPC classification number: G01K7/01 ,  G01K7/34 ,  G01K2219/00

    Abstract: A method includes alternately coupling a selected one of a plurality of current sources and two or more of the plurality of current sources to a first terminal of a bipolar device during first and second phases of a modulator cycle of a plurality of modulator cycles. The method further includes providing sampled voltages from the first terminal of the bipolar device to a modulator to produce a modulator output signal, filtering the modulator output signal to produce a filtered output signal using a back-end filter having an impulse response, and determining a temperature in response to the filtered output signal.

    Abstract translation: 一种方法包括在多个调制器周期的调制器周期的第一和第二阶段期间交替地将多个电流源中的一个电流源和两个或更多个多个电流源交替耦合到双极器件的第一端子。 该方法还包括将采样的电压从双极器件的第一端子提供给调制器以产生调制器输出信号，使用具有脉冲响应的后端滤波器对调制器输出信号进行滤波以产生滤波后的输出信号，并且确定 响应于滤波的输出信号的温度。

    Direct digital access arrangement circuitry and method for connecting to phone lines
    56.
    发明授权
    Direct digital access arrangement circuitry and method for connecting to phone lines 失效
    用于连接到电话线的直接数字接入安排电路和方法

    公开(公告)号：US07463675B2

    公开(公告)日：2008-12-09

    申请号：US11398090

    申请日：2006-04-05

    Applicant: Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    Inventor： Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    IPC: H04B1/38 ,  H04L5/16

    CPC classification number: H04M1/573 ,  H04L7/033 ,  H04L25/0266 ,  H04L25/06 ,  H04M1/76 ,  H04M3/007 ,  H04M11/06 ,  H04M19/001 ,  H04M19/02

    Abstract: An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.

    Abstract translation: 提供了一种适用于电话，医疗仪器，工业过程控制和其他应用的隔离系统。 本发明的优选实施例包括电容隔离屏障，通过数字信号传送数字信号。 该系统提供跨越隔离屏障的通信手段，其高度免疫幅度和相位噪声干扰。 可以在隔离屏障的一侧采用时钟恢复电路，从跨屏障通信的数字信号提取定时信息，并且滤除在屏障处引入的相位噪声的影响。 Δ-Σ转换器可以设置在隔离屏障的两侧以在模拟和数字域之间转换信号。 隔离电源也可以设置在屏障的隔离侧上，由此响应于穿过隔离屏障接收的数字数据产生直流电流。 最后，提供双向隔离系统，由此使用单对隔离电容器实现数字信号的双向通信。 在优选实施例中，跨屏障通信的数字数据由与其他数字控制，信令和成帧信息在时间上多路复用的数字delta-sigma数据信号组成。

    Direct digital access arrangement circuitry and method for connecting to phone lines
    57.
    发明授权
    Direct digital access arrangement circuitry and method for connecting to phone lines 失效

    公开(公告)号：US07301995B2

    公开(公告)日：2007-11-27

    申请号：US10780219

    申请日：2004-02-17

    Applicant: Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    Inventor： Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    IPC: H04B1/38 ,  H04L5/16

    CPC classification number: H04M1/573 ,  H04L7/033 ,  H04L25/0266 ,  H04L25/06 ,  H04M1/76 ,  H04M3/007 ,  H04M11/06 ,  H04M19/001 ,  H04M19/02

    Abstract: An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.

    Isolation system with digital communication across a capacitive barrier
    59.
    发明授权
    Isolation system with digital communication across a capacitive barrier 失效

    公开(公告)号：US07154940B2

    公开(公告)日：2006-12-26

    申请号：US10606231

    申请日：2003-06-25

    Applicant: Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    Inventor： Jeffrey W. Scott ,  Navdeep S. Sooch ,  David R. Welland

    IPC: H04B1/38

    CPC classification number: H04L25/0266 ,  H04L7/033 ,  H04L25/06 ,  H04M11/06

    Abstract: An isolation system is provided that is suitable for use in telephony, medical instrumentation, industrial process control and other applications. Preferred embodiments of the invention comprise a capacitive isolation barrier across which a digital signal is communicated. The system provides a means of communication across the isolation barrier that is highly immune to amplitude and phase noise interference. Clock recovery circuitry may be employed on one side of the isolation barrier to extract timing information from the digital signal communicated across the barrier, and to filter the effects of phase noise introduced at the barrier. Delta-sigma converters may be disposed on both sides of the isolation barrier to convert signals between analog and digital domains. An isolated power supply may also be provided on the isolated side of the barrier, whereby direct current is generated in response to the digital data received across the isolation barrier. Finally, a bidirectional isolation system is provided whereby bidirectional communication of digital signals is accomplished using a single pair of isolation capacitors. In preferred embodiments, the digital data communicated across the barrier consists of digital delta-sigma data signals multiplexed in time with other digital control, signaling and framing information.

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