公开(公告)号：US20140377917A1

公开(公告)日：2014-12-25

申请号：US13954453

申请日：2013-07-30

Applicant: International Business Machines Corporation

Inventor： Hong He ,  Chiahsun Tseng ,  Junli Wang ,  Yunpeng Yin

IPC: H01L29/66

CPC classification number: H01L27/0886 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device having a doped well area includes a doped substrate layer formed on a substrate portion of the semiconductor device. The doped substrate layer extends along a first direction to define a length and a second direction perpendicular to the first direction to define a width. A plurality of fins is formed on the doped substrate layer and an oxide substrate layer is formed between each fin. At least one gate is formed on the oxide substrate layer and extends across at least one fin among the plurality of fins.

公开(公告)号：US20140315379A1

公开(公告)日：2014-10-23

申请号：US14027315

申请日：2013-09-16

Applicant: International Business Machines Corporation

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L21/28

CPC classification number: H01L21/28132 ,  H01L21/76801 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/401 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/78

Abstract: After formation of a replacement gate structure, a template dielectric layer employed to pattern the replacement gate structure is removed. After deposition of a dielectric liner, a first dielectric material layer is deposited by an anisotropic deposition and an isotropic etchback. A second dielectric material layer is deposited and planarized employing the first dielectric material portion as a stopping structure. The first dielectric material portion is removed selective to the second dielectric material layer, and is replaced with gate cap dielectric material portion including at least one dielectric material different from the materials of the dielectric material layers. A contact via hole extending to a source/drain region is formed employing the gate cap dielectric material portion as an etch stop structure. A contact via structure is spaced from the replacement gate structure at least by remaining portions of the gate cap dielectric material portion.

公开(公告)号：US08859384B1

公开(公告)日：2014-10-14

申请号：US13957022

申请日：2013-08-01

Applicant: International Business Machines Corporation

Inventor： Hsueh-Chung H. Chen ,  Hong He ,  Chiahsun Tseng ,  Chun-Chen Yeh ,  Yunpeng Yin

IPC: H01L21/20 ,  H01L49/02

CPC classification number: H01L28/10

Abstract: Methods for forming inductors. The methods include forming sidewalls around a mandrel over a conductor layer; removing material from the conductor layer around a region defined by the sidewalls; removing the mandrel; partially etching the conductor layer in a region between the sidewalls; etching the partially etched conductor layer to form separate metal segments; depositing a dielectric material in and around the metal segments; and forming conductive lines between exposed contacts of adjacent metal segments.

Abstract translation: 电感器形成方法。 所述方法包括在导体层上形成围绕心轴的侧壁; 在由侧壁限定的区域周围从导体层去除材料; 去除心轴; 在侧壁之间的区域中部分地蚀刻导体层; 蚀刻部分蚀刻的导体层以形成分离的金属段; 在金属片段内和周围沉积电介质材料; 以及在相邻金属段的暴露的触点之间形成导电线。

公开(公告)号：US20140264596A1

公开(公告)日：2014-09-18

申请号：US13831172

申请日：2013-03-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L27/088 ,  H01L29/66

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/66477 ,  H01L29/66545

Abstract: A transistor device and a method for forming a fin-shaped field effect transistor (FinFET) device, with the channel portion of the fins on buried silicon oxide, while the source and drain portions of the fins on silicon. An example method includes receiving a wafer with a silicon layer electrically isolated from a silicon substrate by a buried oxide (BOX) layer. The BOX layer is in physical contact with the silicon layer and the silicon substrate. The method further comprises implanting a well in the silicon substrate and forming vertical sources and drains over the well between dummy gates. The vertical sources and drains extend through the BOX layer, fins, and a portion of the dummy gates.

公开(公告)号：US10714596B2

公开(公告)日：2020-07-14

申请号：US15627680

申请日：2017-06-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Hong He ,  Juntao Li ,  Junli Wang ,  Chih-Chao Yang

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/161 ,  H01L29/165 ,  H01L29/10

Abstract: A method for forming a fin device includes forming semiconductor fins over a first dielectric layer. A second dielectric layer is directionally deposited into or on the first dielectric layer and on tops of the fins on horizontal surfaces. The second dielectric layer is configured to protect the first dielectric layer in subsequent processing. Sidewalls of the fins are precleaned while the first dielectric layer is protected by the second dielectric layer. The second dielectric layer is removed to expose the first dielectric layer in a protected state.

公开(公告)号：US20200083357A1

公开(公告)日：2020-03-12

申请号：US16683979

申请日：2019-11-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Hong He ,  Juntao Li

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L21/322 ,  H01L21/324 ,  H01L21/02 ,  H01L29/165 ,  H01L21/18

Abstract: A silicon germanium alloy is formed on sidewall surfaces of a silicon fin. An oxidation process or a thermal anneal is employed to convert a portion of the silicon fin into a silicon germanium alloy fin. In some embodiments, the silicon germanium alloy fin has a wide upper portion and a narrower lower portion. In such an embodiment, the wide upper portion has a greater germanium content than the narrower lower portion. In other embodiments, the silicon germanium alloy fin has a narrow upper portion and a wider lower portion. In this embodiment, the narrow upper portion of the silicon germanium alloy fin has a greater germanium content than the wider lower portion of the silicon germanium alloy fin.

公开(公告)号：US10566454B2

公开(公告)日：2020-02-18

申请号：US16032213

申请日：2018-07-11

Applicant: International Business Machines Corporation

Inventor： Hong He ,  Chiahsun Tseng ,  Chun-chen Yeh ,  Yunpeng Yin

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/283 ,  H01L29/45 ,  H01L29/417 ,  H01L29/08 ,  H01L21/768 ,  H01L23/535 ,  H01L29/06 ,  H01L29/165

Abstract: Self-aligned contacts of a semiconductor device are fabricated by forming a metal gate structure on a portion of a semiconductor layer of a substrate. The metal gate structure contacts inner sidewalls of a gate spacer. A second sacrificial epitaxial layer is formed on a first sacrificial epitaxial layer. The first sacrificial epitaxial layer is adjacent to the gate spacer and is formed on source/drain regions of the semiconductor layer. The first and second sacrificial epitaxial layers are recessed. The recessing exposes at least a portion of the source/drain regions. A first dielectric layer is formed on the exposed portions of the source/drain regions, and over the gate spacer and metal gate structure. At least one cavity within the first dielectric layer is formed above at least one of the exposed portions of source/drain regions. At least one metal contact is formed within the at least one cavity.

公开(公告)号：US10453841B2

公开(公告)日：2019-10-22

申请号：US15285000

申请日：2016-10-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Chia-Yu Chen ,  Bruce B. Doris ,  Hong He ,  Rajasekhar Venigalla

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/04 ,  H01L29/78 ,  H01L21/18 ,  H01L29/165 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/12

Abstract: A semiconductor device that includes at least one germanium containing fin structure having a length along a direction and a sidewall orientated along the (100) plane. The semiconductor device also includes at least one germanium free fin structure having a length along a direction and a sidewall orientated along the (100) plane. A gate structure is present on a channel region of each of the germanium containing fin structure and the germanium free fin structure. N-type epitaxial semiconductor material having a square geometry present on the source and drain portions of the sidewalls having the (100) plane orientation of the germanium free fin structures. P-type epitaxial semiconductor material having a square geometry is present on the source and drain portions of the sidewalls having the (100) plane orientation of the germanium containing fin structures.

公开(公告)号：US10418463B2

公开(公告)日：2019-09-17

申请号：US15445344

申请日：2017-02-28

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Hong He ,  Juntao Li

IPC: H01L21/02 ,  H01L29/06 ,  H01L21/322 ,  H01L21/324 ,  H01L29/66 ,  H01L29/165 ,  H01L29/78 ,  H01L21/18

Abstract: A silicon germanium alloy is formed on sidewall surfaces of a silicon fin. An oxidation process or a thermal anneal is employed to convert a portion of the silicon fin into a silicon germanium alloy fin. In some embodiments, the silicon germanium alloy fin has a wide upper portion and a narrower lower portion. In such an embodiment, the wide upper portion has a greater germanium content than the narrower lower portion. In other embodiments, the silicon germanium alloy fin has a narrow upper portion and a wider lower portion. In this embodiment, the narrow upper portion of the silicon germanium alloy fin has a greater germanium content than the wider lower portion of the silicon germanium alloy fin.

公开(公告)号：US10340368B2

公开(公告)日：2019-07-02

申请号：US16128945

申请日：2018-09-12

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kangguo Cheng ,  Bruce B. Doris ,  Hong He ,  Ali Khakifirooz ,  Yunpeng Yin

IPC: H01L29/66 ,  H01L21/225 ,  H01L29/78 ,  H01L21/306 ,  H01L29/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/8234

Abstract: A method of forming a semiconductor device that includes forming a silicon including fin structure and forming a germanium including layer on the silicon including fin structure. Germanium is then diffused from the germanium including layer into the silicon including fin structure to convert the silicon including fin structure to silicon germanium including fin structure.