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    Dynamic online optimizer
    51.
    发明申请
    Dynamic online optimizer 审中-公开
    动态在线优化器

    公开(公告)号：US20050149912A1

    公开(公告)日：2005-07-07

    申请号：US10748284

    申请日：2003-12-29

    申请人： Alexandre Farcy ,  Stephan Jourdan ,  Avinash Sodani ,  Per Hammarlund

    发明人： Alexandre Farcy ,  Stephan Jourdan ,  Avinash Sodani ,  Per Hammarlund

    IPC分类号： G06F9/38 ,  G06F9/44

    CPC分类号： G06F9/3808 ,  G06F8/443

    摘要： A system and method for optimizing a series of traces to be executed by a processing core is disclosed. The lines of a trace are sent to an optimizer each time they are sent to a processing core to be executed. Runtime information may be collected on a line of a trace each time that trace is executed by a processing core. The runtime information may be used by the optimizer to better optimize the micro-operations of the lines of the trace. The optimizer optimizes a trace each time the trace is executed to improve the efficiency of future iterations of the trace. Most of the optimizations result in a reduction of the number of μops within the trace. The optimizer may optimize two or more lines at a time in order to find more opportunities to remove μops and shorten the trace. The two lines may be alternately offset so that each line has the maximum allowed number of micro-operations.

    摘要翻译： 公开了一种用于优化要由处理核执行的一系列迹线的系统和方法。 每次将跟踪的行发送到执行处理核心时，都将其发送到优化器。 每次由处理核心执行跟踪时，运行时信息可以在跟踪线上收集。 优化器可以使用运行时信息来更好地优化跟踪线的微操作。 优化器每次执行跟踪时优化跟踪，以提高跟踪的未来迭代的效率。 大多数优化导致跟踪中的muops数量减少。 优化器可以一次优化两行或更多行，以便找到更多机会删除muops并缩短跟踪。 两条线可以交替地偏移，使得每条线具有允许的最大微操作数。

    Method for and a trailing store buffer for use in memory renaming
    53.
    发明申请
    Method for and a trailing store buffer for use in memory renaming 失效
    用于存储器重命名的方法和后端存储缓冲区

    公开(公告)号：US20050138339A1

    公开(公告)日：2005-06-23

    申请号：US10743422

    申请日：2003-12-23

    申请人： Sebastien Hily ,  Per Hammarlund

    发明人： Sebastien Hily ,  Per Hammarlund

    IPC分类号： G06F9/30 ,  G06F9/38

    CPC分类号： G06F9/3834

    摘要： Embodiments of the present invention relate to a memory management scheme and apparatus that enables efficient memory renaming. The method includes computing a store address, writing the store address in a first storage, writing data associated with the store address to a memory, and de-allocating the store address from the first storage, allocating the store address in a second storage, predicting a load instruction to be memory renamed, computing a load store source index, computing a load address, disambiguating the memory renamed load instruction, and retiring the memory renamed load instruction, if the store instruction is still allocated in at least one of the first storage and the second storage and should have effectively provided to the load the full data. The method may also include re-executing the load instruction without memory renaming, if the store instruction is not in at the first storage or in the second storage.

    摘要翻译： 本发明的实施例涉及一种能够实现高效存储器重命名的存储器管理方案和装置。 该方法包括计算存储地址，将存储地址写入第一存储器中，将与存储地址相关联的数据写入存储器，以及从第一存储器解除存储地址，在第二存储器中分配存储地址，预测存储地址 如果所述存储指令仍被分配在所述第一存储器中的至少一个中，则存储指令被重新命名为存储器重命名的加载指令，计算加载存储源索引，计算加载地址，消除所述存储器重命名的加载指令，以及退出所述存储器重命名加载指令， 并且第二个存储应该有效地提供给负载的完整数据。 如果存储指令不在第一存储器或第二存储器中，则该方法还可以包括重新执行加载指令而不进行存储器重命名。