公开(公告)号：US06790694B2

公开(公告)日：2004-09-14

申请号：US10281231

申请日：2002-10-28

申请人： Toru Sugiyama ,  Kouhei Morizuka ,  Masayuki Sugiura ,  Yasuhiko Kuriyama ,  Yoshikazu Tanabe

发明人： Toru Sugiyama ,  Kouhei Morizuka ,  Masayuki Sugiura ,  Yasuhiko Kuriyama ,  Yoshikazu Tanabe

IPC分类号： H01L2192

CPC分类号： H01L24/05 ,  H01L21/78 ,  H01L23/488 ,  H01L23/564 ,  H01L23/66 ,  H01L24/03 ,  H01L24/06 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2223/6644 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/484 ,  H01L2224/48624 ,  H01L2224/48644 ,  H01L2224/73265 ,  H01L2224/85444 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01031 ,  H01L2924/01047 ,  H01L2924/01067 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/05042 ,  H01L2924/10157 ,  H01L2924/10161 ,  H01L2924/10329 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13063 ,  H01L2924/13064 ,  H01L2924/14 ,  H01L2924/1423 ,  H01L2924/18301 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/00 ,  H01L2924/00012

摘要： A high frequency semiconductor module, includes: a semiconductor chip having top and bottom surfaces; a semiconductor element merged in the semiconductor chip; a ground pad of the semiconductor element disposed on the top surface; a metal layer configured to connect to the ground pad and extend to sidewalls of the semiconductor chip; a ground metal arranged on a surface of a mounting substrate; and a conductive material formed on the ground, configured to connect the metal layer and the ground metal.

摘要翻译： 高频半导体模块包括：具有顶表面和底表面的半导体芯片; 半导体元件合并在半导体芯片中; 所述半导体元件的接地焊盘设置在所述顶面上; 金属层，被配置为连接到所述接地焊盘并延伸到所述半导体芯片的侧壁; 布置在安装基板的表面上的接地金属; 以及形成在地面上的导电材料，被配置为连接金属层和接地金属。

公开(公告)号：US06602808B2

公开(公告)日：2003-08-05

申请号：US10013729

申请日：2001-12-13

申请人： Yoshikazu Tanabe ,  Toshiaki Nagahama ,  Nobuyoshi Natsuaki ,  Yasuhiko Nakatsuka

发明人： Yoshikazu Tanabe ,  Toshiaki Nagahama ,  Nobuyoshi Natsuaki ,  Yasuhiko Nakatsuka

IPC分类号： H01L2126

CPC分类号： C23C16/4412 ,  B01D53/8671 ,  B01D2257/108 ,  C30B25/14 ,  H01L27/10894 ,  Y02C20/30 ,  Y02P70/605

摘要： In a gas-phase treating process of a semiconductor wafer using hydrogen, there is provided a technique for safely eliminating the hydrogen in an exhaust gas discharged from a gas-phase treating apparatus. The profile at the end portions of the side walls of gate electrodes of a poly-metal structure is improved by forming the gate electrodes over a semiconductor wafer IA having a gate oxide film and then by supplying the semiconductor wafer 1A with a hydrogen gas containing a low concentration of water, as generated from hydrogen and oxygen by catalytic action, to oxidize the principal face of the semiconductor wafer 1A selectively. After this, the hydrogen in the exhaust gas, as discharged from an oxidizing furnace, is completely converted into water by causing it to react with oxygen by a catalytic method.

公开(公告)号：US06569780B2

公开(公告)日：2003-05-27

申请号：US09939621

申请日：2001-08-28

申请人： Yoshikazu Tanabe ,  Satoshi Sakai ,  Nobuyoshi Natsuaki

发明人： Yoshikazu Tanabe ,  Satoshi Sakai ,  Nobuyoshi Natsuaki

IPC分类号： H01L2131

CPC分类号： H01L21/31662 ,  H01L21/02052 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/3144 ,  H01L21/31658 ,  H01L21/67109 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67213 ,  H01L21/67219 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823857 ,  H01L29/42364 ,  H01L29/518 ,  Y10S148/023 ,  Y10S148/116 ,  Y10S438/935

摘要： A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.

公开(公告)号：US06518201B1

公开(公告)日：2003-02-11

申请号：US09494036

申请日：2000-01-31

申请人： Yoshikazu Tanabe ,  Satoshi Sakai ,  Nobuyoshi Natsuaki

发明人： Yoshikazu Tanabe ,  Satoshi Sakai ,  Nobuyoshi Natsuaki

IPC分类号： H01L2131

CPC分类号： H01L21/31662 ,  H01L21/02052 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/3144 ,  H01L21/31658 ,  H01L21/67109 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67213 ,  H01L21/67219 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823857 ,  H01L29/42364 ,  H01L29/518 ,  Y10S148/023 ,  Y10S148/116 ,  Y10S438/935

摘要： A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of an oxide film and uniformity in thickness of the oxide film.

公开(公告)号：US08517591B2

公开(公告)日：2013-08-27

申请号：US12372895

申请日：2009-02-18

申请人： Hiroshi Nakamoto ,  Yoshikazu Tanabe ,  Ken Kagabu

发明人： Hiroshi Nakamoto ,  Yoshikazu Tanabe ,  Ken Kagabu

IPC分类号： F21V7/04

CPC分类号： G02B6/0065 ,  G02B6/0016 ,  G02B6/0038 ,  G02B6/0046 ,  G02B6/0083 ,  G02F1/133615

摘要： In a method of forming a thin light guide plate which includes a compression step in an injection molding step, an optical pattern is liable to be adhered to a mold. Further, in removing the light guide plate from the mold using an ejector pin, a stress is concentrated on a local area of the light guide plate thus generating warping, deformation or irregularities in size of the light guide plate. To overcome such drawbacks, a liquid crystal display device is configured such that an optical pattern portion is compressed, and the light guide plate is removed by making use of a peripheral portion of a mold thus preventing the generation of stress in a local area of the light guide plate due to an ejector pin.

摘要翻译： 在注射成型步骤中形成包括压缩步骤的薄导光板的方法中，光学图案易于附着在模具上。 此外，在使用推顶销从模具中移除导光板的同时，应力集中在导光板的局部区域上，从而产生导光板的翘曲，变形或尺寸不均匀。 为了克服这些缺点，液晶显示装置被构造为使得光学图案部分被压缩，并且通过利用模具的周边部分去除导光板，从而防止在局部区域中产生应力 导光板由于顶针而引起。

公开(公告)号：US08502935B2

公开(公告)日：2013-08-06

申请号：US12222576

申请日：2008-08-12

申请人： Hiroshi Nakamoto ,  Yoshikazu Tanabe ,  Kouji Fujisawa

发明人： Hiroshi Nakamoto ,  Yoshikazu Tanabe ,  Kouji Fujisawa

IPC分类号： G02F1/335 ,  F21V7/04

CPC分类号： G02B6/0073 ,  G02B6/0016 ,  G02B6/002 ,  G02B6/0028 ,  G02B6/0065 ,  G02F1/133615

摘要： In a backlight which arranges light emitting diodes on a side surface of a light guide plate, even when the light guide plate is made thin by further reducing a thickness of the light guide plate and the light emitting diodes having a thickness larger than the thickness of the light guide plate are used, it is possible to manufacture the light guide plate with high accuracy in a short time. In a liquid crystal display device having a backlight which radiates light to a liquid crystal panel, LEDs are mounted on the light guide plate formed on the backlight as a light emitting element, a light radiation portion of the light guide plate is formed by molding by applying pressure and heat to a sheet-shaped resin, and a light incident portion of the light guide plate is formed by injection molding.

摘要翻译： 在将发光二极管配置在导光板的侧面的背光源中，即使通过进一步减小导光板的厚度而使导光板变薄，并且发光二极管的厚度大于 使用导光板，可以在短时间内高精度地制造导光板。 在具有向液晶面板照射光的背光源的液晶显示装置中，LED作为发光元件安装在形成在背光源上的导光板上，导光板的发光部分通过模制成形而形成 对片状树脂施加压力和热量，并且通过注射成型形成导光板的光入射部分。

公开(公告)号：US20120069329A1

公开(公告)日：2012-03-22

申请号：US13114160

申请日：2011-05-24

申请人： Ichiro ISHIMARU ,  Minori Noguchi ,  Ichiro Moriyama ,  Yoshikazu Tanabe ,  Yasuo Yatsugake ,  Yukio Kenbou ,  Kenji Watanabe ,  Hirofumi Tsuchiyama

发明人： Ichiro ISHIMARU ,  Minori Noguchi ,  Ichiro Moriyama ,  Yoshikazu Tanabe ,  Yasuo Yatsugake ,  Yukio Kenbou ,  Kenji Watanabe ,  Hirofumi Tsuchiyama

IPC分类号： G01N21/88

CPC分类号： G01N21/88 ,  G01N21/474 ,  G01N21/94 ,  G01N21/9501 ,  G01N21/9503 ,  G01N2021/8825 ,  G01N2021/8854

摘要： A defect inspection apparatus including: a first illumination optical system which is configured to illuminate the inspection area on a sample surface from a normal line direction or a direction near thereof with respect to said sample surface; a second illumination optical system which is configured to illuminate said inspection area from a slant direction with respect to said sample surface; a detection optical system having a plurality of first detectors which are located, in front of, on the sides of, and behind said inspection area, respectively, with respect to the illumination direction of said second illumination optical system, and where the regular reflected light component, from said sample surface, by illumination light of said second illumination optical system, is not converged; and a signal processing system which is configured to inspect a defect, upon basis of signals obtained from said plurality of first detectors.

摘要翻译： 一种缺陷检查装置，包括：第一照明光学系统，被配置为从相对于所述样品表面的法线方向或近似的方向照射样品表面上的检查区域; 第二照明光学系统，被配置为相对于所述样品表面从倾斜方向照射所述检查区域; 检测光学系统，具有分别相对于所述第二照明光学系统的照明方向位于所述检查区域的所述检查区域的前方和后方的多个第一检测器，并且其中所述规则反射光 从所述样品表面通过所述第二照明光学系统的照明光分量不会收敛; 以及信号处理系统，其被配置为基于从所述多个第一检测器获得的信号来检查缺陷。

公开(公告)号：US07952085B2

公开(公告)日：2011-05-31

申请号：US12196647

申请日：2008-08-22

申请人： Ichiro Ishimaru ,  Minori Noguchi ,  Ichiro Moriyama ,  Yoshikazu Tanabe ,  Yasuo Yatsugake ,  Yukio Kenbou ,  Kenji Watanabe ,  Hirofumi Tsuchiyama

发明人： Ichiro Ishimaru ,  Minori Noguchi ,  Ichiro Moriyama ,  Yoshikazu Tanabe ,  Yasuo Yatsugake ,  Yukio Kenbou ,  Kenji Watanabe ,  Hirofumi Tsuchiyama

IPC分类号： G01N21/88

CPC分类号： G01N21/88 ,  G01N21/474 ,  G01N21/94 ,  G01N21/9501 ,  G01N21/9503 ,  G01N2021/8825 ,  G01N2021/8854

摘要： The invention provides a surface inspection apparatus and a method for inspecting the surface of a sample that are capable of inspecting discriminatingly between the scratch of various configuration and the adhered foreign object that occur on the surface of a work target when the work target (for example, an insulating film on a semiconductor substrate) is subjected to polishing process such as CMP or grinding process in semiconductor manufacturing process or magnetic head manufacturing process.

摘要翻译： 本发明提供了一种表面检查装置和用于检查样品表面的方法，所述表面检查装置和检查方法能够区分各种构型的刮擦和在作业目标（例如，工件）上发生在工作目标表面上的被粘附的异物之间的差异 ，半导体衬底上的绝缘膜）在半导体制造工艺或磁头制造工艺中进行诸如CMP或研磨工艺的抛光工艺。

公开(公告)号：US07799690B2

公开(公告)日：2010-09-21

申请号：US11808805

申请日：2007-06-13

申请人： Yoshikazu Tanabe ,  Satoshi Sakai ,  Nobuyoshi Natsuaki

发明人： Yoshikazu Tanabe ,  Satoshi Sakai ,  Nobuyoshi Natsuaki

IPC分类号： H01L21/311

CPC分类号： H01L21/31662 ,  H01L21/02052 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/3144 ,  H01L21/31658 ,  H01L21/67109 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67213 ,  H01L21/67219 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823857 ,  H01L29/42364 ,  H01L29/518 ,  Y10S148/023 ,  Y10S148/116 ,  Y10S438/935

摘要： A method for fabricating a semiconductor integrated circuit device of the invention comprises feeding oxidation species containing a low concentration of water, which is generated from hydrogen and oxygen by the catalytic action, to the main surface of or in the vicinity of a semiconductor wafer, and forming a thin oxide film serving as a gate insulating film of an MOS transistor and having a thickness of 5 nm or below on the main surface of the semiconductor wafer at an oxide film-growing rate sufficient to ensure fidelity in formation of oxide film and uniformity in thickness of the oxide film.

摘要翻译： 制造本发明的半导体集成电路器件的方法包括将由氢和氧产生的低浓度水的氧化物质通过催化作用输送到半导体晶片的主表面或其附近，以及 在半导体晶片的主表面上以氧化膜生长速率形成用作MOS晶体管的栅极绝缘膜的厚度为5nm以下的薄氧化膜，其足以确保形成氧化膜的保真度和均匀性 的氧化膜厚度。

公开(公告)号：US07242016B2

公开(公告)日：2007-07-10

申请号：US11104621

申请日：2005-04-13

申请人： Ichiro Ishimaru ,  Minori Noguchi ,  Ichiro Moriyama ,  Yoshikazu Tanabe ,  Yasuo Yatsugake ,  Yukio Kenbou ,  Kenji Watanabe ,  Hirofumi Tsuchiyama

发明人： Ichiro Ishimaru ,  Minori Noguchi ,  Ichiro Moriyama ,  Yoshikazu Tanabe ,  Yasuo Yatsugake ,  Yukio Kenbou ,  Kenji Watanabe ,  Hirofumi Tsuchiyama

IPC分类号： G01N21/88

CPC分类号： G01N21/88 ,  G01N21/474 ,  G01N21/94 ,  G01N21/9501 ,  G01N21/9503 ,  G01N2021/8825 ,  G01N2021/8854

摘要： A surface inspection apparatus and a method for inspecting the surface of a sample are capable of inspecting discriminatingly between scratches of various configuration and adhered foreign objects that occur on the surface of a work target when the work target (for example, an insulating film on a semiconductor substrate) is subjected to a polishing process such as CMP or a grinding process, in semiconductor manufacturing process or magnetic head manufacturing process. In the invention, the scratch and foreign object that occur on the polished or ground surface of the sample is epi-illuminated and slant-illuminated by use of approximately same light flux, the difference between the scattered light intensity from the shallow scratch and from the foreign object is applied to thereby discriminate between the shallow scratch and the foreign object, and the directionality of the scattered light is detected to discriminate between the linear scratch and the foreign object.

摘要翻译： 表面检查装置和检查样品表面的方法能够在工作目标（例如，工件的表面上的绝缘膜）上区别地检查在工作目标表面上发生的各种构造和附着异物的划痕 半导体衬底）在半导体制造工艺或磁头制造工艺中进行诸如CMP或研磨工艺的抛光工艺。 在本发明中，通过使用大致相同的光通量，在样品的抛光或地面上发生的划痕和异物被表面照射和倾斜照射，来自浅划痕的散射光强度与来自 应用异物，从而区分浅刮痕和异物，并且检测散射光的方向性以区分线状划痕和异物。