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公开(公告)号:US20230085284A1
公开(公告)日:2023-03-16
申请号:US17993067
申请日:2022-11-23
Applicant: STMicroelectronics ( Rousset) SAS
Inventor: Abderrezak Marzaki , Yoann Goasduff , Virginie Bidal , Pascal Fornara
IPC: G01V7/04 , B81B3/00 , B81C1/00 , H01L49/02 , H01H37/04 , H01H37/32 , H01L21/3213 , H01L29/423
Abstract: A method for detecting orientation of an integrated circuit is disclosed. The method includes moving, in response to a gravitational force, a mobile metallic piece in an evolution zone of a housing. The housing is formed in an interconnect region of the integrated circuit. The housing includes walls defining the evolution zone. The walls are formed within multiple metallization levels of the interconnect region. The walls include a floor wall and a ceiling wall. At least one of the floor wall and ceiling wall incorporate a pointed element directing its pointed region towards the mobile metallic piece. The pointed element delimits an open crater in a concave part of a projection. The method further includes creating an electrical signal by movement of the mobile metallic piece at a plurality of electrically conducting elements positioned at boundary points of the evolution zone and detecting the electrical signal by a detector.
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公开(公告)号:US11329011B2
公开(公告)日:2022-05-10
申请号:US17113645
申请日:2020-12-07
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Pascal Fornara , Fabrice Marinet
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L23/58 , H01L29/8605
Abstract: An integrated circuit is protected against at attack. An electrically conductive body at floating potential is situated in the integrated circuit. The electrically conductive body has an initial amount of electric charge prior to the attack and functions to collect electric charge as a result of the attack. A detection circuit operates to detect an amount of electric charge collected on the electrically conductive body and determine whether the collected amount is different from the initial amount. If the detected amount of charge is different from the initial amount, a control circuit trigger the taking of a protective action.
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公开(公告)号:US10991664B2
公开(公告)日:2021-04-27
申请号:US16358223
申请日:2019-03-19
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Pascal Fornara
IPC: H01L23/62 , H01H85/02 , H01L23/525 , H01L21/66
Abstract: A semiconductor wafer includes first zones containing integrated circuits, each first zone including a substrate and a sealing ring at a periphery of the substrate. The first zones are separated from each other by second zones defining cutting lines or paths. The integrated circuit includes an electrically conductive fuse that extends between a first location inside the integrated circuit and a second location situated outside the integrated circuit beyond one of the cutting lines. This electrically conductive fuse includes a portion that passes through the sealing ring and another portion that straddles the adjacent cutting line. The portion of the fuse that passes through is electrically isolated from the sealing ring and from the substrate. The straddling portion is configured to be sliced, when cutting the wafer along the cutting line, so as to cause the fuse to change from an electrical on state to an electrical off state.
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公开(公告)号:US10943876B2
公开(公告)日:2021-03-09
申请号:US16520458
申请日:2019-07-24
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Fabrice Marinet , Pascal Fornara
IPC: H01L23/00 , H01L23/48 , H01L27/11521 , G11C16/10 , G11C16/14
Abstract: An attack on an integrated circuit using a beam of electrically charged particles is detected by collecting charges due to the attack using at least one electrically conductive body that is electrically coupled to the floating gate of a state transistor. Prior to the attack, the state transistor is configured to confer an initial threshold voltage. The collected charges passed to the floating gate cause a modification of the threshold voltage of the state transistor. Detection of the attack is made by determining that the threshold voltage of the state transistor is different from the initial threshold voltage.
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公开(公告)号:US10886240B2
公开(公告)日:2021-01-05
申请号:US16518755
申请日:2019-07-22
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Pascal Fornara , Fabrice Marinet
IPC: H01L23/00 , H01L23/522 , H01L23/528 , H01L23/58 , H01L29/8605
Abstract: An integrated circuit is protected against at attack. An electrically conductive body at floating potential is situated in the integrated circuit. The electrically conductive body has an initial amount of electric charge prior to the attack and functions to collect electric charge as a result of the attack. A detection circuit operates to detect an amount of electric charge collected on the electrically conductive body and determine whether the collected amount is different from the initial amount. If the detected amount of charge is different from the initial amount, a control circuit trigger the taking of a protective action.
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公开(公告)号:US10770547B2
公开(公告)日:2020-09-08
申请号:US16657409
申请日:2019-10-18
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Guilhem Bouton , Pascal Fornara , Christian Rivero
IPC: H01L29/10 , H01L29/06 , H01L29/78 , H01L27/112 , H01L21/762 , H01L21/763
Abstract: An integrated circuit includes a substrate and at least one component unfavorably sensitive to compressive stress which is arranged at least partially within an active region of the substrate limited by an insulating region. To address compressive stress in the active region, the circuit further includes at least one electrically inactive trench located at least in the insulating region and containing an internal area configured to reduce compressive stress in the active region. The internal area is filled with polysilicon. The polysilicon filled trench may further extend through the insulating region and into the substrate.
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公开(公告)号:US10249679B2
公开(公告)日:2019-04-02
申请号:US14979282
申请日:2015-12-22
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Pascal Fornara , Christian Rivero
Abstract: Method of wireless communication between a first device and a second device, in which, the first device and the second device comprising respectively a first thermoelectric generator and a second thermoelectric generator, the two thermoelectric generators being in thermal coupling, a first signal is generated within the first device, the first thermoelectric generator is electrically powered as a function of the first signal so as to create a first thermal gradient in the said first generator and a second thermal gradient in the second generator, and a second signal is generated within the second device on the basis of the electrical energy produced by the second thermoelectric generator in response to the said second thermal gradient.
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公开(公告)号:US20180158530A1
公开(公告)日:2018-06-07
申请号:US15886243
申请日:2018-02-01
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Pascal Fornara , Christian Rivero
IPC: G11C16/22 , H01L21/311 , H01L27/115 , H01L23/00 , H01L29/78 , H01L21/66 , H01L21/8238 , H01L21/74 , H01L21/8234
CPC classification number: G11C16/22 , G06F21/87 , H01L21/31116 , H01L21/74 , H01L21/823481 , H01L21/823892 , H01L22/14 , H01L22/34 , H01L23/57 , H01L23/576 , H01L27/115 , H01L29/7846
Abstract: The thinning of a semiconductor substrate of an integrated circuit from a back face is detected using the measurement of a physical quantity representative of the resistance between the ends of two electrically-conducting contacts situated at an interface between an insulating region and an underlying substrate region. The two electrically-conducting contacts extend through the insulating region to reach the underlying substrate region.
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公开(公告)号:US20180145039A1
公开(公告)日:2018-05-24
申请号:US15596772
申请日:2017-05-16
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Pascal Fornara , Guilhem Bouton , Mathieu Lisart
IPC: H01L23/00 , H01L23/28 , H01L23/528 , H01L23/522 , H01L21/768 , H01L21/56
CPC classification number: H01L23/57 , H01L21/56 , H01L21/76807 , H01L21/76834 , H01L21/76877 , H01L21/76888 , H01L23/28 , H01L23/5226 , H01L23/528 , H01L23/53228 , H01L23/53295 , H01L23/573
Abstract: An integrated circuit includes an interconnection part with a via level situated between a lower metallization level and an upper metallization level. The lower metallization level is covered by an insulating encapsulation layer. An electrical discontinuity between a first via of the via level and a first metal track of the lower metallization level is provided at the level of the insulating encapsulation layer. The electrical discontinuity is formed prior to formation of any via of the via level and prior to any metal track of the upper metallization level. The electrical discontinuity may comprise: a portion of an additional insulating layer extending over the insulating encapsulation layer; a portion of the insulating encapsulation layer; or an insulating oxide on a top surface of the first metal track.
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公开(公告)号:US09875870B2
公开(公告)日:2018-01-23
申请号:US15477876
申请日:2017-04-03
Applicant: STMicroelectronics (Rousset) SAS
Inventor: Christian Rivero , Pascal Fornara , Sebastian Orellana
CPC classification number: H01H49/00 , H01H59/0009 , H01H2001/0052 , H01H2001/0057 , H01H2001/0078 , H01H2061/006 , H01L23/5222 , H01L23/5223 , H01L23/5226 , H01L23/525 , H01L23/53238 , H01L23/53252 , H01L23/53266
Abstract: In order, for example, to improve the ohmic contact between two metal pieces located at a metallization level, these two metal pieces are equipped with two offset vias located at the metallization level and at least partially at the via level immediately above. Each offset via comprises, for example, a nonoxidizable or substantially nonoxidizable compound, such as a barrier layer of Ti/TiN.
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