公开(公告)号：US20190295641A1

公开(公告)日：2019-09-26

申请号：US16299226

申请日：2019-03-12

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino Conte

IPC: G11C13/00 ,  G06F13/16

Abstract: Described herein is a non-volatile memory device in which it is possible to switch between different reading modes. In particular, the memory device includes a plurality of memory cells and implements, alternatively, a reading of a differential type and a reading of a single-ended type. Further described herein is a method for reading the memory device.

公开(公告)号：US20190035450A1

公开(公告)日：2019-01-31

申请号：US16151388

申请日：2018-10-04

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Antonino Conte ,  Enrico Castaldo ,  Raul Andres Bianchi ,  Francesco La Rosa

IPC: G11C11/24 ,  G04F10/10

Abstract: A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.

公开(公告)号：US20180005684A1

公开(公告)日：2018-01-04

申请号：US15389751

申请日：2016-12-23

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Antonino Conte ,  Enrico Castaldo ,  Raul Andres Bianchi ,  Francesco La Rosa

IPC: G11C11/24

CPC classification number: G11C11/24 ,  G04F10/10

Abstract: A reading circuit for a charge-retention circuit stage is provided with a storage capacitor coupled between a first biasing terminal and a floating node, and a discharge element coupled between the floating node and a reference terminal. The reading circuit further has an operational amplifier having a first input terminal that is coupled to the floating node and receives a reading voltage, a second input terminal receives a reference voltage, and an output terminal on which it supplies an output voltage, the value of which is a function of the comparison between the reading voltage and the reference voltage and indicative of a residual charge in the storage capacitor. A shifting stage shifts the value of the reading voltage of the floating node, before the comparison is made between the reading voltage and the reference voltage for supplying the output voltage.

公开(公告)号：US20170248981A1

公开(公告)日：2017-08-31

申请号：US15596895

申请日：2017-05-16

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino Conte ,  Carmelo Paolino

IPC: G05F1/575 ,  G05F1/56 ,  H03F1/34 ,  H03F1/42 ,  H02M3/07 ,  H03F3/45

CPC classification number: G05F1/575 ,  G05F1/56 ,  H02M3/07 ,  H03F1/34 ,  H03F1/42 ,  H03F3/45

Abstract: A voltage-regulator device includes an error-amplifier stage configured to receive a first reference voltage and a feedback voltage, an output amplifier stage coupled to the error-amplifier stage and configured to generate an output voltage related to the first reference voltage by an amplification factor, and a feedback stage configured to generate the feedback voltage. A compensation stage is configured to implement a second feedback loop, and cause, in response to a variation of the output voltage, a corresponding variation of a first biasing voltage for the output amplifier stage. The compensation stage includes a coupling-capacitor element coupled between the output amplifier stage and a first internal node, and a driving module coupled between the first internal node, and the output amplifier stage and configured to generate a compensation voltage for driving the output amplifier stage.

公开(公告)号：US09728261B2

公开(公告)日：2017-08-08

申请号：US15448813

申请日：2017-03-03

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino Conte ,  Maria Giaquinta

IPC: G11C16/04 ,  G11C16/06 ,  H03M1/66 ,  H03F3/45

CPC classification number: G11C16/06 ,  H03F1/34 ,  H03F3/347 ,  H03F3/45 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/156 ,  H03F2200/375 ,  H03F2200/453 ,  H03F2203/45101 ,  H03F2203/45332 ,  H03F2203/45514 ,  H03F2203/45546 ,  H03F2203/45632 ,  H03M1/661

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

公开(公告)号：US20170178731A1

公开(公告)日：2017-06-22

申请号：US15448813

申请日：2017-03-03

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino Conte ,  Maria Giaquinta

IPC: G11C16/06 ,  H03F3/45 ,  H03M1/66

CPC classification number: G11C16/06 ,  H03F1/34 ,  H03F3/347 ,  H03F3/45 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/156 ,  H03F2200/375 ,  H03F2200/453 ,  H03F2203/45101 ,  H03F2203/45332 ,  H03F2203/45514 ,  H03F2203/45546 ,  H03F2203/45632 ,  H03M1/661

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

公开(公告)号：US09640261B2

公开(公告)日：2017-05-02

申请号：US15198161

申请日：2016-06-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Antonino Conte ,  Maria Giaquinta

IPC: G11C16/04 ,  G11C16/06 ,  H03F1/34 ,  H03F3/347 ,  H03F3/45 ,  H03M1/66

CPC classification number: G11C16/06 ,  H03F1/34 ,  H03F3/347 ,  H03F3/45 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/156 ,  H03F2200/375 ,  H03F2200/453 ,  H03F2203/45101 ,  H03F2203/45332 ,  H03F2203/45514 ,  H03F2203/45546 ,  H03F2203/45632 ,  H03M1/661

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

公开(公告)号：US20150263758A1

公开(公告)日：2015-09-17

申请号：US14638246

申请日：2015-03-04

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Antonino Conte ,  Maria Giaquinta

IPC: H03M1/66 ,  G11C16/06

CPC classification number: G11C16/06 ,  H03F1/34 ,  H03F3/347 ,  H03F3/45 ,  H03F3/45475 ,  H03F3/45977 ,  H03F2200/156 ,  H03F2200/375 ,  H03F2200/453 ,  H03F2203/45101 ,  H03F2203/45332 ,  H03F2203/45514 ,  H03F2203/45546 ,  H03F2203/45632 ,  H03M1/661

Abstract: A digital-to-analog converter (DAC) may include a conversion block providing a first analog value. The DAC may also include an amplification block for receiving the first analog value and providing a second analog value amplified by an amplification factor. The amplification block may include a first input terminal for receiving the first analog value, a second input terminal, and an output terminal for providing the second analog value. The amplification block may also include a first capacitive element and a second capacitive element. The first and second capacitive elements may determine the amplification factor. The amplification block may further include a control unit for recovering a charge at a first terminal of the second capacitive element, and based thereon, the second analog value.

Abstract translation: 数模转换器（DAC）可以包括提供第一模拟值的转换块。 DAC还可以包括用于接收第一模拟值并提供由放大因子放大的第二模拟值的放大块。 放大块可以包括用于接收第一模拟值的第一输入端，第二输入端和用于提供第二模拟值的输出端。 放大块还可以包括第一电容元件和第二电容元件。 第一和第二电容元件可以确定放大系数。 放大块还可以包括用于在第二电容元件的第一端子处恢复电荷的控制单元，并且基于该第二模拟值。

公开(公告)号：US09093232B2

公开(公告)日：2015-07-28

申请号：US13859195

申请日：2013-04-09

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Enrico Castaldo ,  Antonino Conte ,  SantiNunzioAntonino Pagano ,  Stefania Rinaldi

IPC: H03K17/16 ,  H01H11/00 ,  H03K17/0412 ,  H03K17/06 ,  H03K19/017

CPC classification number: H01H11/00 ,  H03K17/04123 ,  H03K17/063 ,  H03K19/01714 ,  Y10T29/49105

Abstract: An electronic switch may include transfer transistor having a first conduction terminal for receiving an input signal, a second conduction terminal, and a control terminal. The transfer transistor may enable/disable a transfer of the input signal from the first conduction terminal to the second conduction terminal according to a control signal. The control signal may take a first value and a second value different from the first value, a difference between the first value and the second value defining, in absolute value, an operative value of the control signal. The electronic switch may further comprise a driving circuit for receiving the input signal and the control signal, and for providing a driving signal equal to the sum between the input signal and the operative value of the control signal to the control terminal of the transfer transistor.

Abstract translation: 电子开关可以包括具有用于接收输入信号的第一导电端子，第二导通端子和控制端子的传输晶体管。 转移晶体管可以根据控制信号使输入信号从第一导通端子传输到第二导通端子。 控制信号可以采用不同于第一值的第一值和第二值，以绝对值确定控制信号的操作值的第一值和第二值之间的差。 电子开关还可以包括用于接收输入信号和控制信号的驱动电路，并且用于提供等于输入信号和控制信号的操作值之和的和与传输晶体管的控制端相加的驱动信号。

公开(公告)号：US20130335121A1

公开(公告)日：2013-12-19

申请号：US13859195

申请日：2013-04-09

Applicant: STMicroelectronics S.R.L.

Inventor： Enrico Castaldo ,  Antonino Conte ,  SantiNunzioAntonino Pagano ,  Stefania Rinaldi

IPC: H03K17/06 ,  H01H11/00

CPC classification number: H01H11/00 ,  H03K17/04123 ,  H03K17/063 ,  H03K19/01714 ,  Y10T29/49105

Abstract: An electronic switch may include transfer transistor having a first conduction terminal for receiving an input signal, a second conduction terminal, and a control terminal. The transfer transistor may enable/disable a transfer of the input signal from the first conduction terminal to the second conduction terminal according to a control signal. The control signal may take a first value and a second value different from the first value, a difference between the first value and the second value defining, in absolute value, an operative value of the control signal. The electronic switch may further comprise a driving circuit for receiving the input signal and the control signal, and for providing a driving signal equal to the sum between the input signal and the operative value of the control signal to the control terminal of the transfer transistor.

Abstract translation: 电子开关可以包括具有用于接收输入信号的第一导电端子，第二导通端子和控制端子的传输晶体管。 转移晶体管可以根据控制信号使输入信号从第一导通端子传输到第二导通端子。 控制信号可以采用不同于第一值的第一值和第二值，以绝对值确定控制信号的操作值的第一值和第二值之间的差。 电子开关还可以包括用于接收输入信号和控制信号的驱动电路，并且用于提供等于输入信号和控制信号的操作值之和的和与传输晶体管的控制端相加的驱动信号。