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公开(公告)号：US20140103337A1
公开(公告)日：2014-04-17
申请号：US14054078
申请日：2013-10-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei YAMAZAKI , Hideomi SUZAWA , Shinya SASAGAWA , Tetsuhiro TANAKA
CPC classification number: H01L21/02565 , H01L21/02617 , H01L21/02631 , H01L27/1156 , H01L29/26 , H01L29/66969 , H01L29/78 , H01L29/7869 , H01L29/78693 , H01L29/78696
Abstract: To provide a highly reliable semiconductor device including an oxide semiconductor by suppression of change in its electrical characteristics. Oxygen is supplied from a base insulating layer provided below an oxide semiconductor layer and a gate insulating layer provided over the oxide semiconductor layer to a region where a channel is formed, whereby oxygen vacancies which might be generated in the channel are filled. Further, extraction of oxygen from the oxide semiconductor layer by a source electrode layer or a drain electrode layer in the vicinity of the channel formed in the oxide semiconductor layer is suppressed, whereby oxygen vacancies which might be generated in a channel are suppressed.
Abstract translation: 通过抑制其电特性的变化来提供包括氧化物半导体的高度可靠的半导体器件。 氧气由设置在氧化物半导体层下方的基底绝缘层和设置在氧化物半导体层上的栅极绝缘层提供到形成沟道的区域，从而填充可能在沟道中产生的氧空位。 此外，通过在氧化物半导体层中形成的沟道附近的源极电极层或漏极电极层从氧化物半导体层提取氧被抑制，由此抑制在沟道中可能产生的氧空位。
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公开(公告)号：US20140004656A1
公开(公告)日：2014-01-02
申请号：US13911476
申请日：2013-06-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shinya SASAGAWA , Hiroshi FUJIKI
IPC: H01L29/66
CPC classification number: H01L29/66969 , H01L21/465 , H01L29/66742 , H01L29/66772 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: Provided is a method for manufacturing a transistor by which the defective shape of a semiconductor device is prevented in the case where a source electrode layer and a drain electrode layer are formed on an oxide semiconductor film. A source electrode layer and a drain electrode layer are formed each having a cross-sectional shape with which disconnection of a gate insulating film is unlikely to occur even when the gate insulating film over the source electrode layer and the drain electrode layer has a small thickness. An oxide semiconductor film having a crystal structure over an insulating surface is formed; an electrode layer on the oxide semiconductor film is formed; and a thickness of an exposed portion of the oxide semiconductor film is reduced by exposing the oxide semiconductor film to dilute hydrofluoric acid with a concentration higher than 0.0001% and lower than or equal to 0.25%.
Abstract translation: 提供了在氧化物半导体膜上形成源电极层和漏极电极层的情况下，防止半导体器件的形状不良的晶体管的制造方法。 形成源极电极层和漏电极层，每个源极电极层和漏电极层具有横截面形状，即使源极电极层和漏电极层上的栅极绝缘膜具有小的厚度也不可能发生栅极绝缘膜的断开 。 形成在绝缘表面上具有晶体结构的氧化物半导体膜; 形成氧化物半导体膜上的电极层; 通过暴露氧化物半导体膜来稀释浓度高于0.0001％且低于或等于0.25％的氢氟酸来减少氧化物半导体膜的暴露部分的厚度。
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公开(公告)号：US20130119375A1
公开(公告)日：2013-05-16
申请号：US13666150
申请日：2012-11-01
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shinya SASAGAWA , Motomu KURATA
CPC classification number: H01L29/7869 , H01L21/02554 , H01L21/02565 , H01L21/02581 , H01L21/02631 , H01L21/34 , H01L27/1225 , H01L29/42384 , H01L29/4908 , H01L29/66969 , H01L29/78 , H01L29/78618
Abstract: Provided is a miniaturized transistor having high electrical characteristics. The transistor includes a source electrode layer in contact with one side surface of the oxide semiconductor layer in the channel-length direction and a drain electrode layer in contact with the other side surface thereof. The transistor further includes a gate electrode layer in a region overlapping with a channel formation region with a gate insulating layer provided therebetween and a conductive layer having a function as part of the gate electrode layer in a region overlapping with the source electrode layer or the drain electrode layer with the gate insulating layer provided therebetween and in contact with a side surface of the gate electrode layer. With such a structure, an Lov region is formed with a scaled-down channel length maintained.
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54.发明申请公开(公告)号：US20250017072A1
公开(公告)日：2025-01-09
申请号：US18698963
申请日：2022-10-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shinya SASAGAWA , Ryota HODO , Kentaro SUGAYA , Yuichi YANAGISAWA
Abstract: A high-resolution display device is provided. A first light-emitting device and a second light-emitting device are included over an insulating surface. A first sidewall insulating layer is in contact with a side surface of a first pixel electrode included in the first light-emitting device, and a second sidewall insulating layer is in contact with a side surface of a second pixel electrode included in the second light-emitting device. The first light-emitting device overlaps with a first coloring layer, and the second light-emitting device overlaps with a second coloring layer that transmits light of a color different from a color of light transmitted through the first coloring layer. The first light-emitting device and the second light-emitting device share a common electrode. A first layer included in the first light-emitting device, a second layer included in the second light-emitting device, and a material layer positioned over the top surface of an insulating layer and positioned between the first sidewall insulating layer and the second sidewall insulating layer contain the same light-emitting material and are apart from one another.
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公开(公告)号：US20240379866A1
公开(公告)日：2024-11-14
申请号：US18691097
申请日：2022-09-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hitoshi KUNITAKE , Ryota HODO , Yasuhiro JINBO , Motomu KURATA , Shinya SASAGAWA , Kunihiro FUKUSHIMA , Shunpei YAMAZAKI
IPC: H01L29/786 , H01L29/423 , H01L29/66
Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor. The transistor includes an oxide, a first conductor and a second conductor that are over the oxide, a first insulator over the first conductor and the second conductor, a second insulator in an opening included in the first insulator, a third insulator over the second insulator, a fourth insulator over the third insulator, and a third conductor over the fourth insulator. The opening includes a region overlapping with the oxide. The third conductor includes a region overlapping with the oxide with the second insulator, the third insulator, and the fourth insulator therebetween. The second insulator is in contact with a top surface of the oxide and a sidewall of the opening. The thickness of the second insulator is smaller than that of the third insulator. The fourth insulator is less permeable to oxygen than the third insulator is. The third conductor has a width greater than or equal to 3 nm and less than or equal to 15 nm in a cross-sectional view of the transistor in the channel length direction.
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Patent Agency Ranking
56.发明公开公开(公告)号：US20240341155A1
公开(公告)日：2024-10-10
申请号：US18580029
申请日：2022-06-29
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shinya SASAGAWA , Ryota HODO , Kentaro SUGAYA , Yoshikazu HIURA , Takahiro FUJIE , Sachiko KAWAKAMI , Yui YOSHIYASU , Tomohiro KUBOTA
CPC classification number: H10K59/873 , H10K50/18 , H10K59/1201 , H10K71/233 , H10K71/40
Abstract: A display device with high display quality is provided. The display device includes a first light-emitting device, a second light-emitting device, a first insulating layer, and a second insulating layer; the first light-emitting device includes a first pixel electrode, a first light-emitting layer over the first pixel electrode, and a common electrode over the first light-emitting layer; the second light-emitting device includes a second pixel electrode, a second light-emitting layer over the second pixel electrode, and the common electrode over the second light-emitting layer; the first insulating layer covers a side surface and part of a top surface of the first light-emitting layer and a side surface and part of a top surface of the second light-emitting layer; the second insulating layer overlaps with the side surface and the part of the top surface of the first light-emitting layer and the side surface and the part of the top surface of the second light-emitting layer with the first insulating layer therebetween; the common electrode covers the second insulating layer; in a cross-sectional view, an end portion of the second insulating layer has a tapered shape with a taper angle less than 90°; and the second insulating layer covers at least part of a side surface of the first insulating layer.
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公开(公告)号：US20240224616A1
公开(公告)日：2024-07-04
申请号：US18569342
申请日：2022-06-03
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Yuichi YANAGISAWA , Kenichi OKAZAKI , Takashi HAMADA , Shinya SASAGAWA
IPC: H10K59/122
CPC classification number: H10K59/122
Abstract: A display apparatus with high resolution is provided. A display apparatus which can achieve high color reproducibility is provided. A display apparatus with high luminance is provided. A highly reliable display apparatus is provided. The display apparatus includes a first insulating layer, a first conductive layer provided in an opening of the first insulating layer, a first EL layer over the first conductive layer and the first insulating layer, a second insulating layer in contact with a side surface of the first EL layer and a top surface of the first insulating layer, and a second conductive layer over the first EL layer and the second insulating layer.
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公开(公告)号：US20240215291A1
公开(公告)日：2024-06-27
申请号：US18555927
申请日：2022-04-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shinya SASAGAWA , Ryota HODO , Hiroaki HONDA , Yasunori SASAMURA
IPC: H10K50/13 , H10K59/131 , H10K71/00 , H10K71/40 , H10K71/60
CPC classification number: H10K50/13 , H10K59/131 , H10K71/40 , H10K71/60 , H10K71/621
Abstract: Provided is a display device with high display quality. The display device includes a first pixel and a second pixel provided to be adjacent to the first pixel. The first pixel includes a first pixel electrode, a first EL layer over the first pixel electrode, and a common electrode over the first EL layer; the second pixel includes a second pixel electrode, a second EL layer over the second pixel electrode, and the common electrode over the second EL layer; each of the first pixel electrode and the second pixel electrode has a tapered shape on a side surface; a taper angle of the tapered shape is smaller than 90 degrees; and the display device includes a region where the distance between the first pixel electrode and the second pixel electrode is less than or equal to one micrometer.
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公开(公告)号：US20240196663A1
公开(公告)日：2024-06-13
申请号：US18512373
申请日：2023-11-17
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Yasumasa YAMANE , Nozomu SUGISAWA , Daiki NAKAMURA , Hitomi SATO , Daigo SHIMADA , Takeyoshi WATABE , Nobuharu OHSAWA , Toshiyuki ISA , Shinya SASAGAWA , Kentaro SUGAYA
IPC: H10K59/122 , H10K59/80
CPC classification number: H10K59/122 , H10K59/80515
Abstract: A novel display device that is highly convenient, useful, or reliable is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, and a first layer. The first light-emitting device includes a first electrode, a second electrode, a first unit between the first electrode and the second electrode, and a second layer between the first electrode and the first unit. The first unit includes a first light-emitting material. The second light-emitting device includes a third electrode, a fourth electrode, a second unit between the third electrode and the fourth electrode, and a third layer between the third electrode and the second unit. The second unit includes a second light-emitting material. The first layer is between the first electrode and the second layer and between the third electrode and the third layer, and overlaps with a first gap between the first electrode and the third electrode.
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公开(公告)号：US20240147761A1
公开(公告)日：2024-05-02
申请号：US18263362
申请日：2022-01-20
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Yuichi YANAGISAWA , Shinya SASAGAWA , Shiro NISHIZAKI , Ryota HODO
CPC classification number: H10K59/1201 , H10K59/124 , H10K59/32 , H10K71/10 , H10K71/231 , H10K71/60 , H10K85/10
Abstract: A method for manufacturing a display apparatus with high display quality is provided. The method is for manufacturing a display apparatus including first to third insulators, first and second conductors, and a first EL layer. The first conductor is formed over the first insulator, and the second insulator is formed over the first insulator and over the first conductor. Next, a first opening portion reaching the first conductor is formed in a region of the second insulator overlapping with the first conductor. A positive photoresist is applied to regions over the first and second insulators and over the first conductor, and a second opening portion with an inversely tapered structure reaching the first conductor and the second insulator is formed in a region of the photoresist overlapping with the first opening portion and the first conductor. The first EL layer, the second conductor, and the third insulator are sequentially formed on a bottom portion of the second opening portion of the photoresist and over the photoresist, and then, the photoresist and the first EL layer, the second conductor, and the third insulator formed over the photoresist are removed.
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