利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

63 条记录 (耗时 0.031 秒)

    AMORPHIZATION/TEMPLATED RECRYSTALLIZATION METHOD FOR HYBRID ORIENTATION SUBSTRATES
    52.
    发明申请
    AMORPHIZATION/TEMPLATED RECRYSTALLIZATION METHOD FOR HYBRID ORIENTATION SUBSTRATES 失效
    用于混合定向衬底的拟合/调制再结晶方法

    公开(公告)号：US20080108204A1

    公开(公告)日：2008-05-08

    申请号：US11871694

    申请日：2007-10-12

    申请人： Keith Fogel ,  Katherine Saenger ,  Chun-Yung Sung ,  Haizhou Yin

    发明人： Keith Fogel ,  Katherine Saenger ,  Chun-Yung Sung ,  Haizhou Yin

    IPC分类号： H01L21/76

    CPC分类号： H01L21/02675 ,  H01L21/02532 ,  H01L21/2022 ,  H01L21/76224 ,  H01L21/823807

    摘要： The present invention provides an improved amorphization/templated recrystallization (ATR) method for fabricating low-defect-density hybrid orientation substrates. ATR methods for hybrid orientation substrate fabrication generally start with a Si layer having a first orientation bonded to a second Si layer or substrate having a second orientation. Selected regions of the first Si layer are amorphized and then recrystallized into the orientation of the second Si layer by using the second Si layer as a template. The process flow of the present invention solves two major difficulties not disclosed by prior art ATR methods: the creation of “corner defects” at the edges of amorphized Si regions bounded by trenches, and undesired orientation changes during a high temperature post-recrystallization defect-removal annealing of non-ATR'd regions not bounded by trenches. In particular, this invention provides a process flow comprising the steps of (i) amorphization and low-temperature recrystallization performed in substrate regions free of trenches, (ii) formation of trench isolation regions that subsume the defective regions at the edge of the ATR'd regions, and (iii) a high-temperature defect-removal anneal performed with the trench isolation regions in place.

    摘要翻译： 本发明提供了用于制造低缺陷密度混合取向基材的改进的非晶化/模板重结晶（ATR）方法。 用于混合取向衬底制造的ATR方法通常从具有第一取向键合到具有第二取向的第二Si层或衬底的Si层开始。 第一Si层的选定区域是非晶化的，然后通过使用第二Si层作为模板将其再结晶成第二Si层的取向。 本发明的工艺流程解决了现有技术ATR方法未公开的两个主要困难：在由沟槽界定的非晶化Si区域的边缘产生“角部缺陷”，以及在高温后再结晶缺陷 - 未被沟槽限定的非ATR区域的去除退火。 特别地，本发明提供了一种工艺流程，其包括以下步骤：（i）在没有沟槽的衬底区域中进行非晶化和低温重结晶，（ii）形成在ATR'边缘处的缺陷区域的沟槽隔离区域的形成， d区域，以及（iii）在沟槽隔离区域中进行的高温缺陷去除退火。

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    53.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080106285A1

    公开(公告)日：2008-05-08

    申请号：US11930019

    申请日：2007-10-30

    申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    IPC分类号： G01R31/02

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    54.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080106283A1

    公开(公告)日：2008-05-08

    申请号：US11929976

    申请日：2007-10-30

    申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    IPC分类号： G01R31/02

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    55.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080100324A1

    公开(公告)日：2008-05-01

    申请号：US11929736

    申请日：2007-10-30

    申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    IPC分类号： G01R31/26

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    56.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080100317A1

    公开(公告)日：2008-05-01

    申请号：US11929662

    申请日：2007-10-30

    申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    IPC分类号： G01R31/26

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.

    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF
    57.
    发明申请
    HIGH DENSITY INTEGRATED CIRCUIT APPARATUS, TEST PROBE AND METHODS OF USE THEREOF 审中-公开

    公开(公告)号：US20080100316A1

    公开(公告)日：2008-05-01

    申请号：US11929634

    申请日：2007-10-30

    申请人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    发明人： Brian Beaman ,  Keith Fogel ,  Paul Lauro ,  Maurice Norcott ,  Da-Yuan Shih ,  George Walker

    IPC分类号： G01R1/06

    CPC分类号： G01R1/0735 ,  G01R1/06744 ,  G01R1/0675 ,  G01R1/07307 ,  G01R1/07378 ,  G01R3/00

    摘要： The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires. The elastomer is cured and the mold is removed, leaving an array of wires disposed in the elastomer and in electrical contact with the space transformer The space transformer can have an array of pins which are on the opposite surface of the space transformer opposite to that on which the elongated conductors are bonded. The pins are inserted into a socket on a second space transformer, such as a printed circuit board to form a probe assembly. Alternatively, an interposer electrical connector can be disposed between the first and second space transformer.