公开(公告)号：US20090181362A1

公开(公告)日：2009-07-16

申请号：US12065469

申请日：2006-08-29

申请人： Yasuo Suzuki ,  Akira Asai ,  Takashi Suzuki ,  Kazuya Hidari ,  Takeomi Murata ,  Taiichi Usui ,  Sou Takeda ,  Kohei Yamada ,  Toshitada Noguchi

发明人： Yasuo Suzuki ,  Akira Asai ,  Takashi Suzuki ,  Kazuya Hidari ,  Takeomi Murata ,  Taiichi Usui ,  Sou Takeda ,  Kohei Yamada ,  Toshitada Noguchi

IPC分类号： C12Q1/70 ,  C07H7/02

CPC分类号： G01N33/548 ,  G01N33/56983

摘要： A method is provided in which the recognition specificity of a virus for a receptor sugar chain can be easily determined with a simple instrument or apparatus. This method for determining the recognition specificity of a virus for a receptor sugar chain or for determining the change in a host infected in accordance with the mutation of virus includes the steps of bringing a sample of the virus into contact with a support having a polymer with sialo-oligosaccharide immobilized on the surface thereof; and assaying the degree of binding therein to determine the recognition specificity of the virus for the receptor sugar chain and to determine the change in a host range. The method is suitable for the surveillance of a virus.

摘要翻译： 提供了一种方法，其中可以用简单的仪器或装置容易地确定病毒对受体糖链的识别特异性。 用于确定病毒对受体糖链的识别特异性或用于根据病毒突变确定受感染宿主的变化的方法包括以下步骤：使病毒样品与具有聚合物的载体接触 唾液酸寡糖固定在其表面上; 并测定其中的结合程度以确定病毒对受体糖链的识别特异性并确定宿主范围的变化。 该方法适用于病毒监控。

公开(公告)号：US07349936B2

公开(公告)日：2008-03-25

申请号：US10632136

申请日：2003-07-31

申请人： Akira Asai ,  Shigeki Matsutani

发明人： Akira Asai ,  Shigeki Matsutani

IPC分类号： G06F7/38

CPC分类号： G06F17/175

摘要： There is provided an interpolation method for the Volume-of-Fluid (VOF) applied to a two-phase incompressible fluid, in particular, which makes it possible to cause time evolution of a shape-describing function based on the Volume-of-Fluid (VOF) method while preserving a sharpness of a shape described by the function. The method defines a function F on a one-dimensional structured grid formed on a one-dimensional real region, the function being defined through definition of a value thereof at a center of each cell within the one-dimensional structured grid, as an interpolation function H. With respect to a cell of interest on the one-dimensional structured grid, a slope is set to zero if a forward difference and a backward difference of the function f have different signs, and to a value twice as large as a smaller one of absolute values of the forward difference and the backward difference if the forward difference and the backward difference have the same sign. The function F on a partial region of the one-dimensional real region determined by the cell of interest is defined by a linear function having a value of F0 at a center of the cell of interest and the slope.

摘要翻译： 提供了一种应用于两相不可压缩流体的流体流体（VOF）的插值方法，特别地，这可以使基于流体体积的形状描述函数的时间演化 （VOF）方法，同时保持由该功能描述的形状的清晰度。 该方法定义了在一维实体区域上形成的一维结构网格上的函数F，该函数通过在一维结构化网格内的每个单元的中心定义其值作为内插函数来定义 对于一维结构化网格上的感兴趣的单元格，如果函数f的前向差和后向差具有不同的符号，则将斜率设置为零，并且将其设置为与小的两倍大的值 如果正向差和后向差具有相同的符号，则前向差和后向差的绝对值。 由感兴趣单元确定的一维实际区域的部分区域上的函数F由在关注单元格的中心处具有值F0的线性函数和斜率来定义。

公开(公告)号：US07235830B2

公开(公告)日：2007-06-26

申请号：US11260197

申请日：2005-10-28

申请人： Haruyuki Sorada ,  Takeshi Takagi ,  Akira Asai ,  Akira Inoue

发明人： Haruyuki Sorada ,  Takeshi Takagi ,  Akira Asai ,  Akira Inoue

IPC分类号： H01L29/76

CPC分类号： H01L29/78696 ,  H01L21/76264 ,  H01L21/76281 ,  H01L29/1054 ,  H01L29/66742 ,  H01L29/78687 ,  Y10S438/933 ,  Y10S438/938

摘要： The present invention provides a semiconductor device comprising: a semiconductor layer (3); a gate electrode (11) formed on the semiconductor layer (3) via a gate insulation film (10); and a first insulation film (13) formed at one or more of sidewalls of the semiconductor layer (3), the gate insulation film (10) and the gate electrode (11); wherein the first insulation film (13) overlies a part of the gate insulation film (10) surface. According to the semiconductor device, leakage current at the isolation edge can be suppressed and thus reliability can be improved.

摘要翻译： 本发明提供一种半导体器件，包括：半导体层（3）; 经由栅极绝缘膜（10）形成在所述半导体层（3）上的栅电极（11）; 以及形成在所述半导体层（3），所述栅极绝缘膜（10）和所述栅电极（11）的侧壁的一个或多个的第一绝缘膜（13）。 其中所述第一绝缘膜（13）覆盖所述栅极绝缘膜（10）表面的一部分。 根据半导体装置，可以抑制隔离边缘处的漏电流，从而可以提高可靠性。

公开(公告)号：US07203606B2

公开(公告)日：2007-04-10

申请号：US11275142

申请日：2005-12-15

申请人： Kota Nakano ,  Akira Asai

发明人： Kota Nakano ,  Akira Asai

IPC分类号： G01F17/00

CPC分类号： G06F17/5018 ,  G06F2217/16

摘要： During an incompressible fluid movement, three consecutive times during the movement of the fluid are called first, second, and third times in time order, calculation is performed with two different types of lattices for the first and third times and for the second time. Momentum and mass density at the first time are temporally developed to the third time in accordance with a conservation law by using an upwind velocity field. A pressure at the second time is determined so that a velocity field derived from momenta at the third time satisfies an incompressibility condition, and the field at the third time is corrected by adding a change in momentum caused by a pressure term using the determined pressure. This prevents pressure vibration and avoids the complexity of advective term calculation.

摘要翻译： 在不可压缩的流体运动期间，在流体运动期间连续三次被称为第一次，第二次和第三次的时间顺序，对于第一次和第三次以及第二次以两种不同类型的格架进行计算。 第一次的动量和质量密度通过使用逆风速度场根据守恒定律在时间上发展到第三次。 确定第二次的压力使得从第三次的动量导出的速度场满足不可压缩条件，并且通过使用所确定的压力加上由压力项引起的动量变化来校正第三次的场。 这可以防止压力振动，避免平流项计算的复杂性。

公开(公告)号：US07197486B2

公开(公告)日：2007-03-27

申请号：US10192158

申请日：2002-07-11

申请人： Akira Asai ,  Shigeki Matsutani

发明人： Akira Asai ,  Shigeki Matsutani

IPC分类号： G06F7/10

CPC分类号： G06Q10/04 ,  Y10S706/919

摘要： In a method for determining a minimum value of an optimization function under constraints given by equations, a set of points which satisfy the constraints is regarded as a Riemannian manifold within a finite-dimensional real-vector space, the Riemannian manifold is approached from an initial position within the real-vector space. An exponential map regarding a geodesic line equation with respect to a tangent vector on the Riemannian manifold ends at a finite order, an approximate geodesic line is generated as a one-dimensional orbit. An approximate parallel-translation is performed on the tangent vector on the Riemannian manifold and on the orbit generated in the orbit generating step by finite-order approximation of the exponential map regarding the parallel translation of the tangent vector. By repeating the above-described procedure from the position at which a minimum value is given until the minimum value on the orbit converges, the solution of the optimization problem with constraints is determined using a simple calculation procedure.

摘要翻译： 在用等式确定的约束条件下确定优化函数的最小值的方法中，满足约束的一组点被认为是有限维实空间中的黎曼流形，黎曼流形从初始 在实数向量空间内的位置。 关于黎曼流形上的切线向量的测地线方程的指数图以有限的顺序结束，生成近似测线，作为一维轨道。 对黎曼流形上的切线向量和在轨道生成步骤中产生的轨道上的切线矢量进行近似平行平移，通过有限次逼近关于切线矢量的并行平移的指数图。 通过从给出最小值的位置重复上述过程直到轨道上的最小值收敛，使用简单的计算过程来确定具有约束的优化问题的解。

公开(公告)号：US07049681B2

公开(公告)日：2006-05-23

申请号：US10972442

申请日：2004-10-26

申请人： Teruhito Ohnishi ,  Akira Asai

发明人： Teruhito Ohnishi ,  Akira Asai

IPC分类号： H01L29/02

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A Si1-xGex layer 111b functioning as the base composed of an i-Si1-xGex layer and a p+ Si1-xGex layer is formed on a collector layer 102, and a Si cap layer 111a as the emitter is formed on the p+ Si1-xGex layer. An emitter lead electrode 129, which is composed of an n− polysilicon layer 129b containing phosphorus in a concentration equal to or lower than the solid-solubility limit for single-crystal silicon and a n+ polysilicon layer 129a containing phosphorus in a high concentration, is formed on the Si cap layer 111a in a base opening 118. The impurity concentration distribution in the base layer is properly maintained by suppressing the Si cap layer 111a from being doped with phosphorus (P) in an excessively high concentration. The upper portion of the Si cap layer 111a may contain a p-type impurity. The p-type impurity concentration distribution in the base layer of an NPN bipolar transistor is thus properly maintained.

摘要翻译： 作为由i-Si 1-x Ge x x构成的基底的Si 1-x Ge 2 x层111b， / SUB层，并且在集电极层102上形成有Si + 1-xSi Ge层，并且Si覆盖层111a 因为发射极形成在p + 1 Si 1-x Ge层上。 发射极引线电极129，其由含有等于或低于单晶硅的固溶度极限的磷的N +和/或多个多晶硅层129b组成， 在基底开口118中的Si覆盖层111a上形成含有高浓度的磷的多晶硅层129a。通过抑制Si覆盖层111a的基底层中的杂质浓度分布适当地保持 以过高浓度的磷（P）掺杂。 Si覆盖层111a的上部可以含有p型杂质。 因此，适当地维持NPN双极晶体管的基极层中的p型杂质浓度分布。

公开(公告)号：US06987072B2

公开(公告)日：2006-01-17

申请号：US11009020

申请日：2004-12-13

申请人： Yoshihiko Kanzawa ,  Teruhito Ohnishi ,  Ken Idota ,  Tohru Saitoh ,  Akira Asai

发明人： Yoshihiko Kanzawa ,  Teruhito Ohnishi ,  Ken Idota ,  Tohru Saitoh ,  Akira Asai

IPC分类号： H01L21/31

CPC分类号： H01L21/324 ,  C30B23/02 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02381 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02661 ,  H01L21/02664 ,  H01L21/322 ,  Y10S438/933

摘要： A method for fabricating a semiconductor crystal that has a first step for forming a semiconductor crystal layer (202) that contains carbon atoms and at least one kind of Group IV element other than carbon on a substrate (201), a second step for adding an impurity that is capable of reacting with oxygen to the semiconductor crystal layer (202), and a third step for removing the carbon atoms contained in the semiconductor crystal layer (202) by reacting the carbon with the impurity. This method makes it possible to fabricate a semiconductor crystal substrate in which the concentration of interstitial carbon atoms is satisfactorily reduced, thus resulting in excellent electrical properties when the substrate is applied to a semiconductor device.

摘要翻译： 一种制造半导体晶体的方法，其具有在基板（201）上形成含有碳原子的半导体晶体层（202）和除了碳以外的至少一种第IV族元素的第一工序，第二工序用于添加 能够与氧反应的半导体晶体层（202）的杂质，以及通过使碳与杂质反应来除去半导体结晶层（202）中所含的碳原子的第三工序。 该方法可以制造其中间隙碳原子的浓度令人满意地降低的半导体晶体衬底，从而当将衬底应用于半导体器件时获得优异的电性能。

公开(公告)号：US06927118B2

公开(公告)日：2005-08-09

申请号：US10695478

申请日：2003-10-29

申请人： Ken Idota ,  Teruhito Ohnishi ,  Akira Asai

发明人： Ken Idota ,  Teruhito Ohnishi ,  Akira Asai

IPC分类号： H01L21/331 ,  H01L21/8249 ,  H01L29/737 ,  H01L21/8222

CPC分类号： H01L29/66242 ,  H01L21/8249 ,  H01L29/7378

摘要： The present invention discloses a process of fabricating a semiconductor device comprising the steps of: forming a collector layer of a first conductivity type at a portion of a surface of a semiconductor substrate; forming a collector opening portion in a first insulating layer formed on the semiconductor substrate; epitaxially growing, on the semiconductor substrate of the collector opening portion, a semiconductor layer including a layer of a second conductivity type constituting a base layer; sequentially layering, on the semiconductor substrate, an etching stopper layer against dry etching and a masking layer against wet etching; exposing a part of the etching stopper layer by removing a part of the masking layer by means of dry etching; and by subjecting the exposed etching stopper layer to a wet etching treatment using the remaining masking layer as a mask, forming a base junction opening portion through the etching stopper layer and the masking layer.

摘要翻译： 本发明公开了一种制造半导体器件的方法，包括以下步骤：在半导体衬底的表面的一部分处形成第一导电类型的集电极层; 在形成在所述半导体衬底上的第一绝缘层中形成集电极开口部分; 在集电体开口部的半导体基板上外延生长构成基底层的具有第二导电类型的层的半导体层; 在半导体衬底上依次层叠抗干蚀刻的蚀刻停止层和抗蚀刻的掩模层; 通过干蚀刻去除一部分掩模层来暴露一部分蚀刻阻挡层; 并且通过使用剩余的掩模层作为掩模对暴露的蚀刻停止层进行湿法蚀刻处理，通过蚀刻停止层和掩​​模层形成基底连接开口部分。

公开(公告)号：US06926392B2

公开(公告)日：2005-08-09

申请号：US10620421

申请日：2003-07-17

申请人： Toshiaki Sasaki ,  Keiichi Murai ,  Yasuyuki Tamura ,  Sadayuki Sugama ,  Akira Asai ,  Tsutomu Kawai ,  Masayoshi Tachihara

发明人： Toshiaki Sasaki ,  Keiichi Murai ,  Yasuyuki Tamura ,  Sadayuki Sugama ,  Akira Asai ,  Tsutomu Kawai ,  Masayoshi Tachihara

IPC分类号： A61M15/00 ,  A61M15/02 ,  B05B1/24 ,  B41J2/14 ,  B41J2/05

CPC分类号： B41J2/1404 ,  A61M15/0065 ,  A61M15/02 ,  A61M15/025 ,  B41J2/14016 ,  B41J2/1412 ,  B41J2/1433 ,  B41J2002/14387 ,  B41J2002/14475

摘要： A liquid ejection head includes a liquid path; an ejection outlet forming member which constitutes a part of a wall of the liquid and which forms an ejection outlet for ejecting a droplet of liquid; a heat generating element, provided at a position opposing to the ejection outlet of the wall of the liquid flow path, for generating a bubble in the liquid by application of heat to the liquid; a restrictor portion, provided at a recessed portion of the ejection outlet, wherein the recessed portion is recessed from a plane in which the ejection outlet is formed, wherein the liquid forms a meniscus and is retained in the ejection outlet such that the restrictor portion is within the liquid, wherein an area So of an opening of the restrictor portion and a surface Sh of the heat generating element satisfy So≦Sh. According to this invention, a central portion of the meniscus opposed to the fine opening at the ejection outlet bulges, and the liquid is ejected in this state. Namely, very small amount of the liquid can be ejected, since not all of the liquid in the recess portion in the ejection outlet is ejected.

公开(公告)号：US20050082571A1

公开(公告)日：2005-04-21

申请号：US10972442

申请日：2004-10-26

申请人： Teruhito Ohnishi ,  Akira Asai

发明人： Teruhito Ohnishi ,  Akira Asai

IPC分类号： H01L29/73 ,  H01L21/331 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/165 ,  H01L29/732 ,  H01L29/737 ,  H01L29/739

CPC分类号： H01L29/66242 ,  H01L29/7378

摘要： A Si1-xGex layer 111b functioning as the base composed of an i-Si1-xGex layer and a p+ Si1-xGex layer is formed on a collector layer 102, and a Si cap layer 111a as the emitter is formed on the p+ Si1-xGex layer. An emitter lead electrode 129, which is composed of an n− polysilicon layer 129b containing phosphorus in a concentration equal to or lower than the solid-solubility limit for single-crystal silicon and a n+ polysilicon layer 129a containing phosphorus in a high concentration, is formed on the Si cap layer 111a in a base opening 118. The impurity concentration distribution in the base layer is properly maintained by suppressing the Si cap layer 111a from being doped with phosphorus (P) in an excessively high concentration. The upper portion of the Si cap layer 111a may contain a p-type impurity. The p-type impurity concentration distribution in the base layer of an NPN bipolar transistor is thus properly maintained.

摘要翻译： 作为由i-Si 1-x Ge x x构成的基底的Si 1-x Ge 2 x层111b， / SUB层，并且在集电极层102上形成有Si + 1-xSi Ge层，并且Si覆盖层111a 因为发射极形成在p + 1 Si 1-x Ge层上。 发射极引线电极129，其由含有等于或低于单晶硅的固溶度极限的磷的N +和/或多个多晶硅层129b组成， 在基底开口118中的Si覆盖层111a上形成含有高浓度的磷的多晶硅层129a。通过抑制Si覆盖层111a的基底层中的杂质浓度分布适当地保持 以过高浓度的磷（P）掺杂。 Si覆盖层111a的上部可以含有p型杂质。 因此，适当地维持NPN双极晶体管的基极层中的p型杂质浓度分布。