公开(公告)号：US10768527B2

公开(公告)日：2020-09-08

申请号：US16102429

申请日：2018-08-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chung Su ,  Kuan-Hsin Lo ,  Yahru Cheng ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/16 ,  G03F7/20 ,  G03F7/09 ,  H01L21/027

Abstract: A method includes providing a photoresist solution that includes a first solvent having a first volume and a second solvent having a second volume, where the first solvent is different from the second solvent and where the first volume is less than the second volume; dispersing the photoresist solution over a substrate to form a film, where the dispersing evaporates a portion of the first solvent and a portion of the second solvent such that a remaining portion of the first solvent is greater than a remaining portion of the second solvent; baking the film; after baking the film, exposing the film to form an exposed film; and developing the exposed film.

公开(公告)号：US10707081B2

公开(公告)日：2020-07-07

申请号：US16178417

申请日：2018-11-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Shih-Chun Huang ,  Chiu-Hsiang Chen ,  Ya-Wen Yeh ,  Yu-Tien Shen ,  Po-Chin Chang ,  Chien Wen Lai ,  Wei-Liang Lin ,  Ya Hui Chang ,  Yung-Sung Yen ,  Li-Te Lin ,  Pinyen Lin ,  Ru-Gun Liu ,  Chin-Hsiang Lin

IPC: H01L21/033 ,  H01L29/66 ,  H01L21/027 ,  H01L21/311 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3115

Abstract: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.

公开(公告)号：US20200050110A1

公开(公告)日：2020-02-13

申请号：US16102429

申请日：2018-08-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Chung Su ,  Kuan-Hsin Lo ,  Yahru Cheng ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/16 ,  H01L21/027 ,  G03F7/09 ,  G03F7/20

Abstract: A method includes providing a photoresist solution that includes a first solvent having a first volume and a second solvent having a second volume, where the first solvent is different from the second solvent and where the first volume is less than the second volume; dispersing the photoresist solution over a substrate to form a film, where the dispersing evaporates a portion of the first solvent and a portion of the second solvent such that a remaining portion of the first solvent is greater than a remaining portion of the second solvent; baking the film; after baking the film, exposing the film to form an exposed film; and developing the exposed film.

公开(公告)号：US10527941B2

公开(公告)日：2020-01-07

申请号：US15608631

申请日：2017-05-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Yu Liu ,  Ya-Ching Chang ,  Cheng-Han Wu ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/039 ,  G03F7/38 ,  G03F7/32 ,  G03F7/30

Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a resist layer over a substrate and performing an exposing process to the resist layer. The resist layer includes a polymer backbone, an acid labile group (ALG) bonded to the polymer backbone, a sensitizer bonded to the polymer backbone, a photo-acid generator (PAG), and a thermo-base generator (TBG). The method further includes baking the resist layer at a first temperature and subsequently at a second temperature. The second temperature is higher than the first temperature. The method further includes developing the resist layer in a developer, thereby forming a patterned resist layer.

公开(公告)号：US20190384172A1

公开(公告)日：2019-12-19

申请号：US16556435

申请日：2019-08-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yen-Hao Chen ,  Wei-Han Lai ,  Chien-Wei Wang ,  Chin-Hsiang Lin

IPC: G03F7/004 ,  G03F7/32 ,  C07C381/12 ,  G03F7/038 ,  G03F7/039 ,  G03F7/16 ,  G03F7/20 ,  G03F7/26 ,  G03F7/38 ,  G03F7/40 ,  H01L21/027

Abstract: Resist materials having enhanced sensitivity to radiation are disclosed herein, along with methods for lithography patterning that implement such resist materials. An exemplary resist material includes a polymer, a sensitizer, and a photo-acid generator (PAG). The sensitizer is configured to generate a secondary radiation in response to the radiation. The PAG is configured to generate acid in response to the radiation and the secondary radiation. The PAG includes a sulfonium cation having a first phenyl ring and a second phenyl ring, where the first phenyl ring is chemically bonded to the second phenyl ring.

公开(公告)号：US10354874B2

公开(公告)日：2019-07-16

申请号：US15812750

申请日：2017-11-14

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Chun Huang ,  Chin-Hsiang Lin ,  Chien-Wen Lai ,  Ru-Gun Liu ,  Wei-Liang Lin ,  Ya Hui Chang ,  Yung-Sung Yen ,  Yu-Tien Shen ,  Ya-Wen Yeh

IPC: H01L21/3065 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L21/3105

Abstract: A method of fabricating a semiconductor device includes forming a hard mask layer over a substrate. A multi-layer resist is formed over the hard mask layer. The multi-layer resist is etched to form a plurality of openings in the multi-layer resist to expose a portion of the hard mask layer. Ion are directionally provided at an angle to the multi-layer resist to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In one embodiment, the multi-layer resist is directionally etched by directing etch ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer. In another embodiment, the multi-layer resist is directionally implanted by directing implant ions at an angle to predominately contact sidewalls of the plurality of openings in the multi-layer resist rather than the hard mask layer.

公开(公告)号：US20180337044A1

公开(公告)日：2018-11-22

申请号：US15600037

申请日：2017-05-19

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Siao-Shan Wang ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: H01L21/033 ,  H01L21/71 ,  H01L21/027

CPC classification number: H01L21/0332 ,  G03F7/40 ,  H01L21/0273

Abstract: A method for lithography patterning includes forming an opening in a first layer over a substrate and coating a grafting solution over the first layer and filling in the opening. The grafting solution comprises a grafting compound and a solvent. The grafting compound comprises a grafting unit chemically bonded to a linking unit chemically bonded to a polymer backbone. The linking unit comprises an alkyl segment. The grafting unit is attachable to the first layer. The method further includes curing the grafting solution so that a first portion of the grafting compound is attached to a surface of the first layer, thereby forming a second layer over the surface of the first layer.

公开(公告)号：US10115592B2

公开(公告)日：2018-10-30

申请号：US15595525

申请日：2017-05-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Yu Liu ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: H01L21/33 ,  H01L21/027 ,  H01L21/311

Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming an under layer on a substrate; forming a silicon-containing middle layer on the under layer, wherein the silicon-containing middle layer has a thermal base generator (TBG) composite; forming a photosensitive layer on the silicon-containing middle layer; performing an exposing process to the photosensitive layer; and developing the photosensitive layer, thereby forming a patterned photosensitive layer.

公开(公告)号：US20180174853A1

公开(公告)日：2018-06-21

申请号：US15474522

申请日：2017-03-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Tien Shen ,  Chi-Cheng Hung ,  Chin-Hsiang Lin ,  Chien-Wei Wang ,  Ching-Yu Chang ,  Chih-Yuan Ting ,  Kuei-Shun Chen ,  Ru-Gun Liu ,  Wei-Liang Lin ,  Ya Hui Chang ,  Yuan-Hsiang Lung ,  Yen-Ming Chen ,  Yung-Sung Yen

IPC: H01L21/308 ,  H01L21/265 ,  H01L21/027

CPC classification number: H01L21/26586 ,  H01L21/0337 ,  H01L21/31116 ,  H01L21/31144

Abstract: A method for semiconductor manufacturing includes providing a substrate and a patterning layer over the substrate; forming a hole in the patterning layer; applying a first directional etching along a first direction to inner sidewalls of the hole; and applying a second directional etching along a second direction to the inner sidewalls of the hole, wherein the second direction is different from the first direction.

公开(公告)号：US09805913B2

公开(公告)日：2017-10-31

申请号：US14727957

申请日：2015-06-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chih-Hong Hwang ,  Chun-Lin Chang ,  Nai-Han Cheng ,  Chi-Ming Yang ,  Chin-Hsiang Lin

IPC: H01J37/317 ,  H01L21/687 ,  H01L21/265 ,  H01J37/302 ,  H01J37/147 ,  H01J37/20

CPC classification number: H01J37/3171 ,  H01J37/1474 ,  H01J37/20 ,  H01J37/3023 ,  H01J37/3172 ,  H01J2237/12 ,  H01J2237/20228 ,  H01J2237/30477 ,  H01J2237/30483 ,  H01L21/265 ,  H01L21/68764

Abstract: A process control method is provided for ion implantation methods and apparatuses, to produce a high dosage area on a substrate such as may compensate for noted non-uniformities. In an ion implantation tool, separately controllable electrodes are provided as multiple sets of opposed electrodes disposed outside an ion beam. Beam blockers are positionable into the ion beam. Both the electrodes and beam blockers are controllable to reduce the area of the ion beam that is incident upon a substrate. The electrodes and beam blockers also change the position of the reduced-area ion beam incident upon the surface. The speed at which the substrate scans past the ion beam may be dynamically changed during the implantation process to produce various dosage concentrations in the substrate.