公开(公告)号：US20120001148A1

公开(公告)日：2012-01-05

申请号：US13233937

申请日：2011-09-15

Applicant: Michael Miller ,  Prashant Phatak ,  Tony Chiang

Inventor： Michael Miller ,  Prashant Phatak ,  Tony Chiang

IPC: H01L45/00 ,  H01L21/02 ,  H01L47/00

CPC classification number: H01L45/1233 ,  H01L23/5228 ,  H01L23/525 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1641 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A resistance-change memory device using stress engineering is described, including a first layer including a first conductive electrode, a second layer above the first layer including a resistive-switching element, a third layer above the second layer including a second conductive electrode, where a first stress is created in the switching element at a first interface between the first layer and the second layer upon heating the memory element, and where a second stress is created in the switching element at a second interface between the second layer and the third layer upon the heating. A stress gradient equal to a difference between the first stress and the second stress has an absolute value greater than 50 MPa, and a reset voltage of the memory element has a polarity relative to a common electrical potential that has a sign opposite the stress gradient when applied to the first conductive electrode

Abstract translation: 描述了使用应力工程的电阻变化存储器件，包括第一层，包括第一导电电极，第一层上方的第二层，包括电阻式开关元件，第二层上方的第三层包括第二导电电极， 在加热存储元件时在第一层和第二层之间的第一界面处在开关元件中产生第一应力，并且其中在第二层和第三层之间的第二界面处在开关元件中产生第二应力 加热。 等于第一应力和第二应力之间的差的应力梯度具有大于50MPa的绝对值，并且存储元件的复位电压具有相对于具有与应力梯度相反的符号的公共电位的极性， 施加到第一导电电极

公开(公告)号：US08062918B2

公开(公告)日：2011-11-22

申请号：US12345576

申请日：2008-12-29

Applicant: Michael Miller ,  Prashant Phatak ,  Tony Chiang ,  Xiying Chen ,  April Schricker ,  Tanmay Kumar

Inventor： Michael Miller ,  Prashant Phatak ,  Tony Chiang ,  Xiying Chen ,  April Schricker ,  Tanmay Kumar

IPC: H01L21/00

CPC classification number: H01L45/16 ,  H01L21/265 ,  H01L21/31155 ,  H01L27/2463 ,  H01L29/8615 ,  H01L45/08 ,  H01L45/10 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/165

Abstract: This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.

Abstract translation: 本公开提供了制造半导体器件层和相关联的存储单元结构的方法。 通过进行半导体器件层的表面处理（例如离子轰击）以产生具有有意深度分布的缺陷，可以创建具有更一致的电参数的多层存储单元。 例如，在电阻式开关存储单元中，可以获得设定和复位电压的更紧密的分配和较低的成形电压，从而提高器件的产量和可靠性。 在至少一个实施例中，选择深度轮廓以调制缺陷的类型及其对被轰击的金属氧化物层的电性能的影响并增强均匀的缺陷分布。

公开(公告)号：US20110204311A1

公开(公告)日：2011-08-25

申请号：US13098632

申请日：2011-05-02

Applicant: Alexander Gorer ,  Prashant Phatak ,  Tony Chiang ,  Igor Ivanov

Inventor： Alexander Gorer ,  Prashant Phatak ,  Tony Chiang ,  Igor Ivanov

IPC: H01L45/00 ,  H01L21/8239

CPC classification number: H01L45/10 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1633

Abstract: Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element.

Abstract translation: 描述了使用阳极氧化形成的非易失性电阻式开关存储器。 一种使用阳极氧化形成电阻式开关存储元件的方法包括形成含金属层，至少部分地阳极氧化含金属层以形成电阻式开关金属氧化物，以及在电阻式开关金属氧化物上形成第一电极。 在一些实例中，含金属层的未渐变部分可以是存储元件的第二电极。

公开(公告)号：US07977153B2

公开(公告)日：2011-07-12

申请号：US12967530

申请日：2010-12-14

Applicant: Pragati Kumar ,  Sandra G. Malhotra ,  Sean Barstow ,  Tony Chiang

Inventor： Pragati Kumar ,  Sandra G. Malhotra ,  Sean Barstow ,  Tony Chiang

IPC: H01L21/00 ,  H01L21/16 ,  H01L21/20 ,  H01L21/36

CPC classification number: H01L45/1625 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1641

Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed from resistive-switching metal oxide layers. Metal oxide layers may be formed using sputter deposition at relatively low sputtering powers, relatively low duty cycles, and relatively high sputtering gas pressures. Dopants may be incorporated into a base oxide layer at an atomic concentration that is less than the solubility limit of the dopant in the base oxide. At least one oxidation state of the metal in the base oxide is preferably different than at least one oxidation state of the dopant. The ionic radius of the dopant and the ionic radius of the metal may be selected to be close to each other. Annealing and oxidation operations may be performed on the resistive switching metal oxides. Bistable metal oxides with relatively large resistivities and large high-state-to-low state resistivity ratios may be produced.

Abstract translation: 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以由电阻式开关金属氧化物层形成。 金属氧化物层可以使用相对低的溅射功率，相对低的占空比和较高的溅射气体压力的溅射沉积形成。 掺杂剂可以以小于基底氧化物中的掺杂剂的溶解度极限的原子浓度结合到基底氧化物层中。 基底氧化物中的金属的至少一种氧化态优选不同于掺杂剂的至少一种氧化态。 可以选择掺杂剂的离子半径和金属的离子半径彼此接近。 可以对电阻式开关金属氧化物进行退火和氧化操作。 可以制造具有相对较大的电阻率和大的高 - 低 - 电阻率比的双稳态金属氧化物。

公开(公告)号：US07977152B2

公开(公告)日：2011-07-12

申请号：US12463319

申请日：2009-05-08

Applicant: Alexander Gorer ,  Prashant Phatak ,  Tony Chiang ,  Igor Ivanov

Inventor： Alexander Gorer ,  Prashant Phatak ,  Tony Chiang ,  Igor Ivanov

IPC: H01L21/00

CPC classification number: H01L45/10 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1633

Abstract: Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element.

Abstract translation: 描述了使用阳极氧化形成的非易失性电阻式开关存储器。 一种使用阳极氧化形成电阻式开关存储元件的方法包括形成含金属层，至少部分地阳极氧化含金属层以形成电阻式开关金属氧化物，以及在电阻式开关金属氧化物上形成第一电极。 在一些实例中，含金属层的未渐变部分可以是存储元件的第二电极。

公开(公告)号：US07863087B1

公开(公告)日：2011-01-04

申请号：US12114655

申请日：2008-05-02

Applicant: Pragati Kumar ,  Sandra G. Malhotra ,  Sean Barstow ,  Tony Chiang

Inventor： Pragati Kumar ,  Sandra G. Malhotra ,  Sean Barstow ,  Tony Chiang

IPC: H01L21/00 ,  H01L21/16 ,  H01L21/20 ,  H01L21/36

CPC classification number: H01L45/1625 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1641

Abstract: Nonvolatile memory elements are provided that have resistive switching metal oxides. The nonvolatile memory elements may be formed from resistive-switching metal oxide layers. Metal oxide layers may be formed using sputter deposition at relatively low sputtering powers, relatively low duty cycles, and relatively high sputtering gas pressures. Dopants may be incorporated into a base oxide layer at an atomic concentration that is less than the solubility limit of the dopant in the base oxide. At least one oxidation state of the metal in the base oxide is preferably different than at least one oxidation sate of the dopant. The ionic radius of the dopant and the ionic radius of the metal may be selected to be close to each other. Annealing and oxidation operations may be performed on the resistive switching metal oxides. Bistable metal oxides with relatively large resistivities and large high-state-to-low state resistivity ratios may be produced.

Abstract translation: 提供具有电阻开关金属氧化物的非易失性存储元件。 非易失性存储元件可以由电阻式开关金属氧化物层形成。 金属氧化物层可以使用相对低的溅射功率，相对低的占空比和较高的溅射气体压力的溅射沉积形成。 掺杂剂可以以小于基底氧化物中的掺杂剂的溶解度极限的原子浓度结合到基底氧化物层中。 基底氧化物中金属的至少一种氧化态优选不同于掺杂剂的至少一种氧化态。 可以选择掺杂剂的离子半径和金属的离子半径彼此接近。 可以对电阻式开关金属氧化物进行退火和氧化操作。 可以制造具有相对较大的电阻率和大的高 - 低 - 电阻率比的双稳态金属氧化物。

公开(公告)号：US07678607B2

公开(公告)日：2010-03-16

申请号：US11702725

申请日：2007-02-05

Applicant: Tony Chiang ,  Chi-I Lang ,  Zhi-wen Sun ,  Jinhong Tong ,  Nitin Kumar

Inventor： Tony Chiang ,  Chi-I Lang ,  Zhi-wen Sun ,  Jinhong Tong ,  Nitin Kumar

IPC: H01L21/00

CPC classification number: H01L45/04 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1633

Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.

公开(公告)号：US07658790B1

公开(公告)日：2010-02-09

申请号：US11773316

申请日：2007-07-03

Applicant: Alexander Gorer ,  Tony Chiang ,  Chi-I Lang

Inventor： Alexander Gorer ,  Tony Chiang ,  Chi-I Lang

IPC: C23C18/34

CPC classification number: C23C18/34 ,  C23C18/50

Abstract: An electroless solution for deposition of a cobalt-based alloy on a substrate is provided. The electroless solution may be formed by mixing first and second solutions, with the first and second solutions being prepared from concentrated precursors. In one embodiment, the first solution contains a cobalt (Co) ion source and a complexing and deposition selectivity agent. In one embodiment, the cobalt concentration in the first solution is at least 90 millimoles per liter. The second solution contains a reducing agent. In one embodiment, the reducing agent is dimethylamineborane (DMAB) having a concentration of at least 10 grams per liter. In other embodiments, the first solution also contains a tungsten (W) ion source, and either the first or second solution also contains a phosphorous (P) ion source.

Abstract translation: 提供了一种用于在基底上沉积钴基合金的无电溶液。 化学溶液可以通过混合第一和第二溶液形成，第一和第二溶液由浓缩的前体制备。 在一个实施方案中，第一溶液含有钴（Co）离子源和络合和沉积选择剂。 在一个实施方案中，第一溶液中的钴浓度为至少90毫摩尔/升。 第二种溶液含有还原剂。 在一个实施方案中，还原剂是浓度为至少10克/升的二甲胺硼烷（DMAB）。 在其它实施方案中，第一溶液还含有钨（W）离子源，并且第一或第二溶液也含有磷（P）离子源。

公开(公告)号：US20090278110A1

公开(公告)日：2009-11-12

申请号：US12463319

申请日：2009-05-08

Applicant: Alexander Gorer ,  Prashant Phatak ,  Tony Chiang ,  Igor Ivanov

Inventor： Alexander Gorer ,  Prashant Phatak ,  Tony Chiang ,  Igor Ivanov

IPC: H01L47/00 ,  H01L21/16

CPC classification number: H01L45/10 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1633

Abstract: Non-volatile resistive-switching memories formed using anodization are described. A method for forming a resistive-switching memory element using anodization includes forming a metal containing layer, anodizing the metal containing layer at least partially to form a resistive switching metal oxide, and forming a first electrode over the resistive switching metal oxide. In some examples, an unanodized portion of the metal containing layer may be a second electrode of the memory element.

Abstract translation: 描述了使用阳极氧化形成的非易失性电阻式开关存储器。 一种使用阳极氧化形成电阻式开关存储元件的方法包括形成含金属层，至少部分地阳极氧化含金属层以形成电阻式开关金属氧化物，以及在电阻式开关金属氧化物上形成第一电极。 在一些实例中，含金属层的未渐变部分可以是存储元件的第二电极。

公开(公告)号：US20090275210A1

公开(公告)日：2009-11-05

申请号：US12433842

申请日：2009-04-30

Applicant: Sunil Shanker ,  Tony Chiang

Inventor： Sunil Shanker ,  Tony Chiang

IPC: H01L21/30

CPC classification number: C23C16/047 ,  C23C16/04 ,  C23C16/45536 ,  C23C16/45551 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/45591 ,  C23C16/4583 ,  C23C16/46 ,  C23C16/50 ,  C23C16/5096 ,  C23C16/52 ,  H01J37/32357 ,  H01J37/32366

Abstract: Combinatorial plasma enhanced deposition techniques are described, including designating multiple regions of a substrate, providing a precursor to at least a first region of the multiple regions, and providing a plasma to the first region to deposit a first material on the first region formed using the first precursor, wherein the first material is different from a second material formed on a second region of the substrate.

Abstract translation: 描述组合等离子体增强沉积技术，包括指定衬底的多个区域，为多个区域的至少第一区域提供前体，以及向第一区域提供等离子体，以将第一材料沉积在使用 第一前体，其中所述第一材料不同于形成在所述基底的第二区域上的第二材料。