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89 条记录 (耗时 0.04 秒)

    Semiconductor device
    52.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US06246077B1

    公开(公告)日：2001-06-12

    申请号：US09396372

    申请日：1999-09-15

    申请人： Setsuko Kobayashi ,  Takashi Shinohe ,  Tomoki Inoue ,  Akihiro Yahata

    发明人： Setsuko Kobayashi ,  Takashi Shinohe ,  Tomoki Inoue ,  Akihiro Yahata

    IPC分类号： H01L310312

    CPC分类号： H01L29/66068 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/267 ,  H01L29/7801 ,  H01L29/7802 ,  H01L29/7816 ,  H01L29/7838

    摘要： A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.

    摘要翻译： 半导体器件包括第一导电类型的第一半导体层，形成在第一半导体层的表面上的第一导电类型的第二半导体层，导电带的底部与第二半导体层的真空度之间的能量差 半导体层比第一半导体层小的栅电极，形成在第二半导体层上方的栅极绝缘膜之间的栅电极和第二导电类型的一对第三半导体层与至少第一半导体层 半导体层并且在第一半导体层的表面的区域中彼此面对，从而在栅电极下形成沟道区。

    Power semiconductor device
    53.
    发明授权
    Power semiconductor device 失效
    功率半导体器件

    公开(公告)号：US06137136A

    公开(公告)日：2000-10-24

    申请号：US932464

    申请日：1997-09-18

    申请人： Akihiro Yahata ,  Satoshi Urano ,  Tomoki Inoue ,  Ichiro Omura

    发明人： Akihiro Yahata ,  Satoshi Urano ,  Tomoki Inoue ,  Ichiro Omura

    IPC分类号： H01L29/74 ,  H01L21/336 ,  H01L29/06 ,  H01L29/423 ,  H01L29/739 ,  H01L29/749 ,  H01L29/78 ,  H01L29/76

    CPC分类号： H01L29/0696 ,  H01L29/7397 ,  H01L29/4236

    摘要： An injection enhanced insulated gate bipolar transistor is disclosed in which an average roughness of silicon on the side and bottom surfaces of trench grooves below a gate oxide film is made to be 0.6 nm or smaller. Irregular portions on the surface of silicon of the gate oxide film can be prevented. Thus, lowering of the gate breakdown voltage occurring because of dispersion of the thickness of the gate oxide film due to the irregular portions can be prevented.

    摘要翻译： 公开了一种注入增强型绝缘栅双极型晶体管，其中在栅极氧化膜下方的沟槽槽的侧表面和底表面上的平均粗糙度为0.6nm或更小。 可以防止栅极氧化膜的硅表面上的不规则部分。 因此，可以防止由于不规则部分导致的栅极氧化膜的厚度的分散而产生的栅极击穿电压的降低。

    Semiconductor device
    54.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US5977564A

    公开(公告)日：1999-11-02

    申请号：US951674

    申请日：1997-10-16

    申请人： Setsuko Kobayashi ,  Takashi Shinohe ,  Tomoki Inoue ,  Akihiro Yahata

    发明人： Setsuko Kobayashi ,  Takashi Shinohe ,  Tomoki Inoue ,  Akihiro Yahata

    IPC分类号： H01L21/04 ,  H01L21/205 ,  H01L21/336 ,  H01L29/04 ,  H01L29/06 ,  H01L29/12 ,  H01L29/24 ,  H01L29/267 ,  H01L29/78 ,  H01L31/0312

    CPC分类号： H01L29/66068 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/267 ,  H01L29/7801 ,  H01L29/7802 ,  H01L29/7816 ,  H01L29/7838 ,  H01L29/1608

    摘要： A semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type formed on the surface of the first semiconductor layer, the energy difference between the bottom of the conductive band and the vacuum level in the second semiconductor layer being smaller than that in the first semiconductor layer, a gate electrode formed above the second semiconductor layer with a gate insulating film interposed therebetween, and a pair of third semiconductor layers of the second conductivity type, being in contact with at least the first semiconductor layer and faced each other in a region of the surface of the first semiconductor layer, so that a channel region is formed under the gate electrode.

    摘要翻译： 半导体器件包括第一导电类型的第一半导体层，形成在第一半导体层的表面上的第一导电类型的第二半导体层，导电带的底部与第二半导体层的真空度之间的能量差 半导体层比第一半导体层小的栅电极，形成在第二半导体层上方的栅极绝缘膜之间的栅电极和第二导电类型的一对第三半导体层与至少第一半导体层 半导体层并且在第一半导体层的表面的区域中彼此面对，从而在栅电极下形成沟道区。

    Power semiconductor device
    55.
    发明授权
    Power semiconductor device 失效
    功率半导体器件

    公开(公告)号：US5714775A

    公开(公告)日：1998-02-03

    申请号：US633688

    申请日：1996-04-19

    申请人： Tomoki Inoue ,  Ichiro Omura ,  Hiromichi Ohashi

    发明人： Tomoki Inoue ,  Ichiro Omura ,  Hiromichi Ohashi

    IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/32 ,  H01L29/739 ,  H01L29/74 ,  H01L31/111

    CPC分类号： H01L29/7397 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/32

    摘要： A p-type emitter layer having a low resistivity is arranged on a bottom surface of an n-type base layer having a high resistivity. A p-type base layer is formed in a top surface of the n-type base layer. Trenches are formed in the p-type base layer and the n-type base layer such that each trench penetrates the p-type base layer and reaches down to a halfway depth in the n-type base layer. Inter-trench regions made of semiconductor are defined between the trenches. An n-type emitter layer having a low resistivity is formed in a surface of the p-type base layer to be in contact with the upper part of each trench. A gate electrode is buried via a gate insulating film in each trench. That side surface of each inter-trench region which faces the gate electrode consists of a {100} plane.

    摘要翻译： 具有低电阻率的p型发射极层布置在具有高电阻率的n型基极层的底表面上。 p型基底层形成在n型基底层的顶表面上。 在p型基底层和n型基底层中形成沟槽，使得每个沟槽穿过p型基底层并在n型基底层中下降到中间深度。 在沟槽之间限定由半导体制成的沟槽间区域。 在p型基底层的表面上形成具有低电阻率的n型发射极层，以与每个沟槽的上部接触。 每个沟槽中的栅极绝缘膜埋入栅电极。 面对栅电极的每个沟槽间区域的侧表面由{100}平面组成。

    Insulated-gate semiconductor device
    56.
    发明授权
    Insulated-gate semiconductor device 失效
    绝缘栅半导体器件

    公开(公告)号：US5689121A

    公开(公告)日：1997-11-18

    申请号：US480389

    申请日：1995-06-07

    申请人： Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa ,  Norio Yasuhara ,  Tomoki Inoue

    发明人： Mitsuhiko Kitagawa ,  Ichiro Omura ,  Akio Nakagawa ,  Norio Yasuhara ,  Tomoki Inoue

    IPC分类号： H01L29/06 ,  H01L29/423 ,  H01L29/739 ,  H01L29/745 ,  H01L29/74 ,  H01L31/111

    CPC分类号： H01L29/7455 ,  H01L29/7394 ,  H01L29/7397 ,  H01L29/7398 ,  H01L29/0696 ,  H01L29/4236

    摘要： An insulated-gate semiconductor device comprises a P type emitter layer, an N.sup.- high-resistive base layer formed on the P type emitter layer, and a P type base layer contacting the N.sup.- high-resistive base layer. A plurality of trenches are formed having a depth to reach into the N.sup.- high-resistive base layer from the P type base layer. A gate electrode covered with a gate insulation film is buried in each trench. An N type source layer to be connected to a cathode electrode is formed in the surface of the P type base layer in a channel region between some trenches, thereby forming an N channel MOS transistor for turn-on operation. A P channel MOS transistor connected to the P base layer is formed in a channel region between other trenches so as to discharge the holes outside the device upon turn-off operation.

    摘要翻译： 绝缘栅半导体器件包括P型发射极层，形成在P型发射极层上的N-高电阻基极层和与N型高电阻基极层接触的P型基极层。 形成从P型基底层到达N个高电阻基底层的深度的多个沟槽。 覆盖有栅极绝缘膜的栅电极被埋在每个沟槽中。 在一些沟槽之间的沟道区域中，在P型基极层的表面形成有与阴极连接的N型源极层，从而形成用于导通工作的N沟道MOS晶体管。 连接到P基极层的P沟道MOS晶体管形成在其它沟槽之间的沟道区域中，以便在关断操作时将器件的孔排出。

    Solid-state imaging device including three stacked photoelectric conversion layers, three accumulators, and a single readout circuit
    57.
    发明授权
    Solid-state imaging device including three stacked photoelectric conversion layers, three accumulators, and a single readout circuit 失效
    固态成像装置包括三个堆叠的光电转换层，三个累加器和单个读出电路

    公开(公告)号：US07932942B2

    公开(公告)日：2011-04-26

    申请号：US11353236

    申请日：2006-02-14

    申请人： Tomoki Inoue ,  Atsuhiko Ishihara

    发明人： Tomoki Inoue ,  Atsuhiko Ishihara

    IPC分类号： H04N3/14 ,  H01L27/146

    CPC分类号： H04N9/045 ,  H04N2209/047

    摘要： A solid-state imaging device is provided and has: three photoelectric conversion layers stacked above a semiconductor substrate 1, each detecting a different color; three signal charge accumulators in a semiconductor substrate for accumulating signal charges generated in each of the three photoelectric conversion layers: and a signal readout circuit in the semiconductor substrate for reading out signals corresponding to the signal charges accumulated in the signal charge accumulators. The three signal charge accumulators are arranged in a direction in the surface of the semiconductor substrate as a pixel and a plurality of the pixels are arranged in a square lattice pattern both in the direction and a direction perpendicular thereto. The three signal charge accumulators arranged in each pixel in an odd row are arranged such that an array of the signal charge accumulators in the first sub-row of each pixel has all of the three signal charge accumulators.

    摘要翻译： 提供了一种固态成像装置，具有：叠层在半导体基板1上的三个光电转换层，每个检测不同的颜色; 用于累积在三个光电转换层中的每一个中产生的信号电荷的半导体衬底中的三个信号电荷累加器和用于读出与累积在信号电荷累加器中的信号电荷相对应的信号的半导体衬底中的信号读出电路。 三个信号电荷累积器沿着半导体衬底的表面的方向作为像素布置，并且多个像素在垂直于其的方向和方向上以正方形的格子图案排列。 布置在奇数行的每个像素中的三个信号电荷累加器布置成使得每个像素的第一子行中的信号电荷累加器的阵列具有三个信号电荷累加器的全部。

    Photoelectric converting film stack type solid-state image pickup device and method of producing the same
    60.
    发明授权
    Photoelectric converting film stack type solid-state image pickup device and method of producing the same 失效
    光电转换膜堆叠式固态摄像装置及其制造方法

    公开(公告)号：US07400023B2

    公开(公告)日：2008-07-15

    申请号：US11082901

    申请日：2005-03-18

    申请人： Mikio Watanabe ,  Tomoki Inoue ,  Masafumi Inuiya

    发明人： Mikio Watanabe ,  Tomoki Inoue ,  Masafumi Inuiya

    IPC分类号： H01L31/062

    CPC分类号： H01L27/14647 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14687 ,  H01L27/14692

    摘要： In a photoelectric converting film stack type solid-state image pickup device, a plurality of photoelectric converting film are stacked on a semiconductor substrate in which a signal readout circuit is formed, each of the photoelectric converting films is sandwiched between a common electrode film and pixel electrode films corresponding to respective pixels, and photo-charges generated in the photoelectric converting films are taken out through the pixel electrode films. In the solid-state image pickup device, a common electrode film for a first photoelectric converting film is used also as a common electrode film for a second photoelectric converting film, the first photoelectric converting film is stacked below the common electrode film, and the second photoelectric converting film is stacked above the common electrode film.

    摘要翻译： 在光电转换膜堆叠型固态摄像装置中，在形成信号读出电路的半导体基板上层叠多个光电转换膜，将各光电转换膜夹在公共电极膜和像素 对应于各个像素的电极膜和在光电转换膜中产生的光电荷通过像素电极膜被取出。 在固态摄像装置中，第一光电转换膜用公共电极膜也用作第二光电转换膜的公共电极膜，第一光电转换膜堆叠在公共电极膜的下方，第二光电转换膜 光电转换膜层叠在公共电极膜的上方。