Class AB output stages and amplifiers including class AB output stages
    52.
    发明授权
    Class AB output stages and amplifiers including class AB output stages 有权
    AB类输出级和放大器,包括AB类输出级

    公开(公告)号:US08212614B2

    公开(公告)日:2012-07-03

    申请号:US13352052

    申请日:2012-01-17

    IPC分类号: H03F3/45

    摘要: A buffer stage includes a flipped voltage follower and an emitter follower. The flipped voltage follower is connected between a high voltage rail and a low voltage rail and includes an input and an output. The emitter follower is also connected between the high voltage rail and the low voltage rail and includes an input and an output. A resistor connects the output of the flipped voltage follower to the output of the emitter follower. The input of the flipped voltage follower and the input of the emitter follower are connected together and provide an input of the buffer stage. The output of the emitter follower provides an output of the buffer stage. A differential buffer stage can be implemented using a pair of such buffer stages. Such a differential buffer stage can provide the output stage for a fully differential operational amplifier.

    摘要翻译: 缓冲级包括翻转电压跟随器和射极跟随器。 翻转电压跟随器连接在高压轨和低压轨之间,并包括输入和输出。 射极跟随器也连接在高压轨和低压轨之间,并包括输入和输出。 电阻将翻转电压跟随器的输出端连接到射极跟随器的输出端。 翻转电压跟随器的输入和射极跟随器的输入端连接在一起并提供缓冲器级的输入。 射极跟随器的输出提供缓冲级的输出。 可以使用一对这样的缓冲级来实现差分缓冲级。 这样的差分缓冲级可为全差分运算放大器提供输出级。

    Operational amplifier
    53.
    发明授权
    Operational amplifier 失效
    运算放大器

    公开(公告)号:US08193862B2

    公开(公告)日:2012-06-05

    申请号:US12872239

    申请日:2010-08-31

    申请人: Koichiro Adachi

    发明人: Koichiro Adachi

    IPC分类号: H03F3/45

    摘要: A multi-stage amplification type class-AB operational amplifier disclosed includes an amplification stage having plural amplification sections formed in multiple stages, and a class-AB output stage having a bias section and an output section, in which an input signal input to the amplification stage is sequentially amplified by the plural amplification sections, and further amplified by the bias section and the output section of the class-AB output stage. A positive supply voltage applied to the amplification stage is different from a positive supply voltage applied to the class-AB output stage, and a negative supply voltage applied to the amplification stage is different from a negative supply voltage applied to the class-AB output stage.

    摘要翻译: 所公开的多级放大型AB类运算放大器包括具有多级放大部分的多级放大级和具有偏置部分和输出部分的AB类输出级,其中输入到放大器的输入信号 通过多个放大部分顺序地放大级,并且由AB类输出级的偏置部分和输出部分进一步放大。 施加到放大级的正电源电压与施加到AB类输出级的正电源电压不同,施加到放大级的负电源电压与施加到AB类输出级的负电源电压不同 。

    Amplification Circuit, Electronic Device, Amplification Method
    54.
    发明申请
    Amplification Circuit, Electronic Device, Amplification Method 审中-公开
    放大电路,电子装置,放大方法

    公开(公告)号:US20120133435A1

    公开(公告)日:2012-05-31

    申请号:US13233885

    申请日:2011-09-15

    申请人: Takeshi Kumagaya

    发明人: Takeshi Kumagaya

    IPC分类号: H03F1/00

    摘要: In one embodiment, there is provided an amplification circuit. The amplification circuit includes: a plurality of amplifiers configured to amplify an input signal and output the amplified signal; a control circuit configured to control a current supplied to each of the plurality of amplifiers; and a switching circuit configured to switch the amplified signal output from the plurality of amplifiers in response to current control performed by the control circuit.

    摘要翻译: 在一个实施例中,提供了一种放大电路。 放大电路包括:多个放大器,被配置为放大输入信号并输出​​放大的信号; 控制电路,被配置为控制提供给所述多个放大器中的每一个的电流; 以及开关电路,被配置为响应于由所述控制电路执行的电流控制来切换从所述多个放大器输出的放大信号。

    CLASS AB OUTPUT STAGES AND AMPLIFIERS INCLUDING CLASS AB OUTPUT STAGES
    55.
    发明申请
    CLASS AB OUTPUT STAGES AND AMPLIFIERS INCLUDING CLASS AB OUTPUT STAGES 有权
    AB类输出级和放大器,包括AB类输出级

    公开(公告)号:US20120119833A1

    公开(公告)日:2012-05-17

    申请号:US13352052

    申请日:2012-01-17

    IPC分类号: H03F3/45

    摘要: A buffer stage includes a flipped voltage follower and an emitter follower. The flipped voltage follower is connected between a high voltage rail and a low voltage rail and includes an input and an output. The emitter follower is also connected between the high voltage rail and the low voltage rail and includes an input and an output. A resistor connects the output of the flipped voltage follower to the output of the emitter follower. The input of the flipped voltage follower and the input of the emitter follower are connected together and provide an input of the buffer stage. The output of the emitter follower provides an output of the buffer stage. A differential buffer stage can be implemented using a pair of such buffer stages. Such a differential buffer stage can provide the output stage for a fully differential operational amplifier.

    摘要翻译: 缓冲级包括翻转电压跟随器和射极跟随器。 翻转电压跟随器连接在高压轨和低压轨之间,并包括输入和输出。 射极跟随器也连接在高压轨和低压轨之间,并包括输入和输出。 电阻将翻转电压跟随器的输出端连接到射极跟随器的输出端。 翻转电压跟随器的输入和射极跟随器的输入端连接在一起并提供缓冲器级的输入。 射极跟随器的输出提供缓冲级的输出。 可以使用一对这样的缓冲级来实现差分缓冲级。 这样的差分缓冲级可为全差分运算放大器提供输出级。

    CLASS AB OUTPUT STAGES AND AMPLIFIERS INCLUDING CLASS AB OUTPUT STAGES
    57.
    发明申请
    CLASS AB OUTPUT STAGES AND AMPLIFIERS INCLUDING CLASS AB OUTPUT STAGES 有权
    AB类输出级和放大器,包括AB类输出级

    公开(公告)号:US20110304393A1

    公开(公告)日:2011-12-15

    申请号:US12954169

    申请日:2010-11-24

    IPC分类号: H03F3/45

    摘要: A buffer stage includes a flipped voltage follower and an emitter follower. The flipped voltage follower is connected between a high voltage rail and a low voltage rail and include an input and an output. The emitter follower is also connected between the high voltage rail and the low voltage rail and includes an input and an output. A resistor connects the output of the flipped voltage follower to the output of the emitter follower. The input of the flipped voltage follower and the input of the emitter follower are connected together and provide an input of the buffer stage. The output of the emitter follower provides an output of the buffer stage. A differential buffer stage can be implemented using a pair of such buffer stages. Such a differential buffer stage can provide the output stage for a fully differential operational amplifier.

    摘要翻译: 缓冲级包括翻转电压跟随器和射极跟随器。 翻转电压跟随器连接在高压轨和低压轨之间,并包括输入和输出。 射极跟随器也连接在高压轨和低压轨之间,并包括输入和输出。 电阻将翻转电压跟随器的输出端连接到射极跟随器的输出端。 翻转电压跟随器的输入和射极跟随器的输入端连接在一起并提供缓冲器级的输入。 射极跟随器的输出提供缓冲级的输出。 可以使用一对这样的缓冲级来实现差分缓冲级。 这样的差分缓冲级可为全差分运算放大器提供输出级。

    POWER AMPLIFIER AND SEMICONDUCTOR INTEGRATED CIRCUIT
    59.
    发明申请
    POWER AMPLIFIER AND SEMICONDUCTOR INTEGRATED CIRCUIT 失效
    功率放大器和半导体集成电路

    公开(公告)号:US20110235689A1

    公开(公告)日:2011-09-29

    申请号:US12886699

    申请日:2010-09-21

    申请人: Shouhei Kousai

    发明人: Shouhei Kousai

    IPC分类号: H04L5/16 H03F3/16

    摘要: In general, according to one embodiment, a power amplifier includes an envelope detector, a limiter, and a combiner. The envelope detector is configured to sense an envelope component of an input signal. The limiter includes a PMOS (Positive channel Metal Oxide Semiconductor) transistor and an NMOS (Negative channel Metal Oxide Semiconductor) transistor. The PMOS transistor is configured to sense a phase component of the input signal. The phase component has a second-order distortion controlled within a predetermined range with respect to the input signal. The NMOS transistor is configured to sense a phase component of the input signal. The phase component has the same second-order distortion as the phase component sensed by the PMOS transistor. The combiner is configured to combine the envelope component sensed by the envelope detector and the phase component sensed by the limiter to generate an output signal.

    摘要翻译: 通常,根据一个实施例,功率放大器包括包络检测器,限幅器和组合器。 包络检测器被配置为感测输入信号的包络分量。 限幅器包括PMOS(正通道金属氧化物半导体)晶体管和NMOS(负通道金属氧化物半导体)晶体管。 PMOS晶体管被配置为感测输入信号的相位分量。 相位分量具有相对于输入信号控制在预定范围内的二阶失真。 NMOS晶体管被配置为感测输入信号的相位分量。 相位分量具有与由PMOS晶体管感测的相位分量相同的二阶失真。 组合器被配置为组合由包络检测器感测的包络分量和由限幅器感测的相位分量以产生输出信号。

    Background offset cancellation scheme for continuous time gm-C filters
    60.
    发明授权
    Background offset cancellation scheme for continuous time gm-C filters 有权
    连续时间gm-C滤波器的背景偏移消除方案

    公开(公告)号:US07876147B1

    公开(公告)日:2011-01-25

    申请号:US12472229

    申请日:2009-05-26

    申请人: Fu-Tai An Xuemei Liu

    发明人: Fu-Tai An Xuemei Liu

    IPC分类号: H03K5/00

    摘要: The present disclosure describes methods and apparatus for compensating DC offset in a filter having a plurality of transconductance pieces. In one implementation, the method includes measuring a corresponding DC offset associated with each transconductance piece of the plurality of transconductance pieces; storing each measured DC offset corresponding to each transconductance piece of the plurality of transconductance pieces; selecting one or more of the plurality of transconductance pieces to be used during operation of the filter; deriving an aggregate amount of DC offset for the one or more selected transconductance pieces, the aggregate amount of DC offset being derived based on each stored DC offset value corresponding to each selected transconductance piece; and applying the derived aggregate amount of DC offset to the one or more selected transconductance pieces to compensate for the DC offset during the operation of the filter.

    摘要翻译: 本公开描述了用于补偿具有多个跨导件的滤波器中的DC偏移的方法和装置。 在一个实施方案中,该方法包括测量与多个跨导件中的每个跨导片相关联的对应DC偏移; 存储与所述多个跨导片中的每个跨导片相对应的每个测量的DC偏移; 选择在所述过滤器的操作期间使用的所述多个跨导件中的一个或多个; 导出所述一个或多个所选跨导件的DC偏移的总量,基于对应于每个所选跨导件的每个存储的DC偏移值导出DC偏移的总量; 以及将所导出的DC偏移量的总量应用于所述一个或多个选择的跨导片,以补偿在所述滤波器的操作期间的所述DC偏移。