摘要:
An image pickup apparatus includes a pixel generating a signal by photoelectric conversion, a comparator comparing the signal based on the pixel with a reference signal varied with time, a counter performing counting until the comparator outputs a signal indicating that a relationship in magnitude between the signal based on the pixel and the reference signal is reversed, and a control unit. The comparator includes a first amplifier receiving the reference signal at a first input portion and the signal based on the pixel at a second input portion to compare the signal based on the pixel with the reference signal. The control unit sets a bandwidth of the comparator to a first bandwidth when the reference signal varies at a first rate of change and to a second bandwidth when the reference signal varies at a second rate of change.
摘要:
Described herein are an apparatus, system, and method for compensating voltage swing and duty cycle of a signal on an input-output (I/O) pad of a processor by adjusting the voltage swing and duty cycle of the signal. The apparatus comprises a driver to transmit a signal on an I/O pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. Described herein is also an analog-to-digital (A2D) converter for measuring and/or calibrating various signal attributes including current, voltage, and time.
摘要:
A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.
摘要:
An integrated circuit device can include a plurality of analog blocks, at least a first analog block comprising a data converter circuit, each analog block including a programmable switch path coupled to a plurality of external connections to the integrated circuit device; and a plurality of programmable digital blocks, at least one programmable digital block configurable to control the programmable switch paths to couple external connections to the data converter circuit via an analog block other than the first analog block.
摘要:
An image pickup apparatus includes a pixel generating a signal by photoelectric conversion, a comparator comparing the signal based on the pixel with a reference signal varied with time, a counter performing counting until the comparator outputs a signal indicating that a relationship in magnitude between the signal based on the pixel and the reference signal is reversed, and a control unit. The comparator includes a first amplifier receiving the reference signal at a first input portion and the signal based on the pixel at a second input portion to compare the signal based on the pixel with the reference signal. The control unit sets a bandwidth of the comparator to a first bandwidth when the reference signal varies at a first rate of change and to a second bandwidth when the reference signal varies at a second rate of change.
摘要:
Described herein are an apparatus, system, and method for compensating voltage swing and duty cycle of a signal on an input-output (I/O) pad of a processor by adjusting the voltage swing and duty cycle of the signal. The apparatus comprises a driver to transmit a signal on an I/O pad, the signal on the I/O pad having a voltage swing and a duty cycle; and an adjustment unit, coupled to the driver, to receive the signal from the I/O pad transmitted by the driver and to generate voltage swing and duty cycle control signals for adjusting the voltage swing and duty cycle of the signal on the I/O pad respectively. Described herein is also an analog-to-digital (A2D) converter for measuring and/or calibrating various signal attributes including current, voltage, and time.
摘要:
An analog to digital converter includes: a reference circuit adapted to generate reference voltages; differential amplifiers; normal phase circuits each of which samples a normal phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a first input terminal of one of the differential amplifiers when the input is differential and single-ended; and reversed phase circuits each of which samples a reversed phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a second input terminal of one of the differential amplifiers when the input is differential and which samples a ground level as a reference voltage of the reference circuit and supplies the reference voltage and comparison voltage to the second input terminal of the differential amplifier when the input is single-ended.
摘要:
A patient monitoring signal processing system adaptively varies medical signal data rate. The system uses an analog to digital converter for digitizing an analog cyclically varying input signal derived from a patient in response to a sampling clock input. The sampling clock determines frequency of analog to digital sampling of the analog input signal by the analog to digital converter. A detector detects first and second different signal portions within a cycle of the cyclically varying input signal. A control processor coupled to the analog to digital converter and the detector, provides the sampling clock and adaptively determines first and second different frequencies of the sampling clock to be used in sampling within detected corresponding first and second different signal portions of the cyclically varying input signal in response to predetermined information indicating a frequency of a signal component of the cyclically varying input signal in the first signal portion is higher than a frequency of a signal component of the cyclically varying input signal in the second signal portion. Also the first frequency is higher than the second frequency of the first and second different frequencies.
摘要:
An analog to digital converter includes: a reference circuit adapted to generate reference voltages; differential amplifiers; normal phase circuits each of which samples a normal phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a first input terminal of one of the differential amplifiers when the input is differential and single-ended; and reversed phase circuits each of which samples a reversed phase analog input signal and transfers a comparison voltage, obtained by comparison with a reference voltage generated by the reference circuit, to a second input terminal of one of the differential amplifiers when the input is differential and which samples a ground level as a reference voltage of the reference circuit and supplies the reference voltage and comparison voltage to the second input terminal of the differential amplifier when the input is single-ended.
摘要:
Various apparatuses, methods and systems for a multi-mode DAC with selectable output range, granularity and offset and controlled slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus for supplying a reference signal, including a digital-to-analog converter, a counter and a clock. The digital-to-analog converter has a digital input and an analog output that supplies a reference signal based on the digital input. The counter has a digital control word input, a clock input, a clock enable output and a count output connected to the digital input of the digital-to-analog converter. The counter is adapted to assert the clock enable output when the digital control word input requests an output count that is different from an actual count at the count output of the counter. The clock has an enable input connected to the clock enable output of the counter and a clock output connected to the clock input of the counter. The clock is adapted to produce clock pulses on the clock output while the enable input is asserted.