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    Multi-stage link switch
    51.
    发明授权
    Multi-stage link switch 失效
    多级链路开关

    公开(公告)号：US5285444A

    公开(公告)日：1994-02-08

    申请号：US960273

    申请日：1992-10-13

    申请人： Yoshito Sakurai ,  Shinobu Gohara

    发明人： Yoshito Sakurai ,  Shinobu Gohara

    IPC分类号： H04L12/56 ,  H04Q11/04

    CPC分类号： H04L12/5601 ,  H04L49/108 ,  H04L49/1553 ,  H04L49/255 ,  H04Q11/0478 ,  H04L2012/5672 ,  H04L2012/5679 ,  H04L2012/5681

    摘要： A multi-stage link switch includes first, second and third switch elements, each of the first, second and third switch elements having a predetermined plurality of incoming terminals and a predetermined plurality of outgoing terminals. Communication information is switched between a plurality of incoming highways and a plurality of outgoing highways based on information in each of a plurality of cells. Each cell has fixed length and is transmitted by each of the incoming highways to the plurality of outgoing highways. The multi-stage link switch includes a primary stage including a plurality of the first switch elements, each input terminal of each first switch element is connected to a corresponding one of the input highways, an intermediate stage including a plurality of the second switch elements, each input terminal of each of the second switch elements is being connected to a corresponding one of the output terminals of a corresponding one of the first switch elements of the primary stage, and a last stage including a plurality of the third switch elements, each input terminal of each of the third switch elements being connected to a corresponding one of the output terminals of a corresponding one of the second switch elements in the intermediate stage. Each outgoing terminal of each of the third switch elements is connected to a corresponding one of the outgoing highways.

    摘要翻译： 多级链路开关包括第一，第二和第三开关元件，第一，第二和第三开关元件中的每一个具有预定的多个输入端子和预定的多个输出端子。 基于多个单元中的每一个中的信息，在多个输入高速公路和多个输出高速公路之间切换通信信息。 每个小区具有固定的长度，并且被每个入站的高速公路传送到多个输出高速公路。 多级链路开关包括：初级级，包括多个第一开关元件，每个第一开关元件的每个输入端子连接到相应的一个输入高速公路，中间级包括多个第二开关元件， 每个第二开关元件的每个输入端子被连接到初级级的第一开关元件中的对应的一个的输出端子中的对应的一个，以及包括多个第三开关元件的最后级，每个输入端 每个第三开关元件的端子连接到中间级中的相应的一个第二开关元件的相应的一个输出端子。 每个第三开关元件的每个输出端子连接到相应的输出高速公路之一。

    Method and apparatus for identifying valid data cells in a redundant pair combining unit of an asynchronous transfer mode switch
    52.
    发明授权
    Method and apparatus for identifying valid data cells in a redundant pair combining unit of an asynchronous transfer mode switch 失效
    用于识别异步传输模式切换的冗余对组合单元中的有效数据单元的方法和装置

    公开(公告)号：US5278849A

    公开(公告)日：1994-01-11

    申请号：US676172

    申请日：1991-03-28

    申请人： Robert M. Hall

    发明人： Robert M. Hall

    IPC分类号： H04L12/70 ,  H04L12/933 ,  H04L12/935 ,  H04L12/939 ,  H04L1/00

    CPC分类号： H04L49/153 ,  H04L49/1553 ,  H04L49/552 ,  H04L2012/5627 ,  H04L2012/565 ,  H04L49/1523 ,  H04L49/30

    摘要： Identifying valid data cells of a call in a redundant path combining unit of an asynchronous transfer mode switch having duplicated switching planes includes identifying the plane of the last data cell to be passed in respect of a particular call, checking that a sequence number associated with the data cell is not one greater than that stored in a storage device, checking that the last data cell to be passed on the particular call was from the same plane, checking if the data cell is a duplicate of the last data cell to arrive on this plane, and passing the data cell to an output store if (c) is true and (d) is not true and storing in the storage device the sequence number of the data cell. A transceiver receives and transmits data and a first store is connected to the transceiver for storing plane identification data and data cell sequence number data. A second store stores a call identifier used to address the first store and a sequence number related to a particular call, for presentation to an addressed location in the first store. A first comparator receives the sequence number from the second store and a sequence number from the first store and compares these numbers, while a second comparator receives the sequence number from the second store, and the sequence number from the first store by way of an incrementer which increments the sequence number by one, and compares the numbers. Data cell acceptance logic circuitry is connected to the first and second comparators and generates read and write control signals for the first store, in accordance with output signals generated by the first and second comparators.

    摘要翻译： 在具有复制的交换平面的异步传输模式交换机的冗余路径组合单元中识别呼叫的有效数据单元包括识别关于特定呼叫要传递的最后数据单元的平面，检查与该特定呼叫相关联的序列号 数据单元不是大于存储在存储设备中的数据单元，检查要在特定调用上传递的最后一个数据单元是否来自同一平面，检查数据单元是否与最后一个数据单元重复 （c）为真，并且（d）不为真，并且在存储装置中存储数据单元的序列号，并将数据单元传送到输出存储器。 收发器接收和发送数据，并且第一存储器连接到收发器，用于存储平面识别数据和数据单元序列号数据。 第二商店存储用于寻址第一商店的呼叫标识符和与特定呼叫相关的序列号，用于呈现到第一商店中的寻址位置。 第一比较器从第二存储器接收序列号，并从第一存储器接收序列号，并比较这些数字，而第二比较器从第二存储器接收序列号，并通过加法器从第一存储器接收序列号 将序列号增加1，并比较数字。 数据单元接收逻辑电路连接到第一和第二比较器，并且根据由第一和第二比较器产生的输出信号产生用于第一存储的读和写控制信号。

    Concentrator-based growable packet switch
    53.
    发明授权
    Concentrator-based growable packet switch 失效
    基于集中器的可扩展分组交换机

    公开(公告)号：US5256958A

    公开(公告)日：1993-10-26

    申请号：US797849

    申请日：1991-11-26

    申请人： Kai Y. Eng ,  Mark J. Karol ,  Mark A. Pashan

    发明人： Kai Y. Eng ,  Mark J. Karol ,  Mark A. Pashan

    IPC分类号： H04L12/56 ,  H04Q11/04

    CPC分类号： H04L12/5601 ,  H04L49/1553 ,  H04L49/1576 ,  H04Q11/0478 ,  H04L2012/561 ,  H04L2012/5681

    摘要： An m.times.n (m>n) output Packet Switch Unit is implemented by using an n.times.n Packet Switch Module and an m:n Concentrator. The arriving packet cells are supplied from the m Concentrator inputs to the n Concentrator outputs in a "first-in first-out" (FIFO) sequence. The Concentrator provides for buffering of arriving packet cells on the m Concentrator inputs in excess of available packet cell positions in the n Concentrator outputs until they can be supplied to a concentrator output in the FIFO sequence. In turn, packet cells from the n Concentrator outputs are supplied to n inputs of the Packet Switch Module which supplies them to appropriate output destinations associated with the n outputs of the Packet Switch Module. A plurality of the Concentrator-Based output Packet Switch Units is readily employed to implement any "larger" Packet Switch architecture.

    Multiple path self-routing switching network for switching asynchronous time-division multiplex packets with availability signalling
    54.
    发明授权
    Multiple path self-routing switching network for switching asynchronous time-division multiplex packets with availability signalling 失效
    多路自动路由切换网络，用于切换具有可用信号的异步时分多路复用分组

    公开(公告)号：US5247513A

    公开(公告)日：1993-09-21

    申请号：US703771

    申请日：1991-05-21

    申请人： Michel A. Henrion ,  Henri Verhille

    发明人： Michel A. Henrion ,  Henri Verhille

    IPC分类号： H04Q3/52 ,  H04L12/56

    CPC分类号： H04L12/5601 ,  H04L49/106 ,  H04L49/1553 ,  H04L49/255 ,  H04L2012/563

    摘要： A novel packet-oriented multiple path self-routing switching network for switching asynchronous time-division multiplexed packets is characterized in that each switch unit of at least one upstream stage of the switching network includes means for defining an available state in which the downstream switch unit is available for routing packet traffic and for transmitting availability status information to upstream switch units when the downstream switch unit is in that available state, and is further characterized in that each upstream switch unit includes means for receiving availability status information for those outputs leading to a switch unit in the available state, and for prohibiting access to any output for which such availability status information is not received.

    摘要翻译： 用于切换异步时分多路复用分组的新颖的面向分组的多路径自路由交换网络的特征在于，交换网络的至少一个上行级的每个交换单元包括用于定义可用状态的装置，其中下游交换单元 可用于路由分组业务，并且用于当下游交换单元处于该可用状态时向上游交换单元发送可用性状态信息，并且其特征还在于每个上游交换单元包括用于接收所述输出的那些输出的可用性状态信息的装置 开关单元处于可用状态，并且用于禁止访问未接收到这种可用性状态信息的任何输出。

    Packet parallel interconnection network
    55.
    发明授权
    Packet parallel interconnection network 失效
    分组并行互联网络

    公开(公告)号：US5191578A

    公开(公告)日：1993-03-02

    申请号：US537682

    申请日：1990-06-14

    申请人： Kuo-Chu Lee

    发明人： Kuo-Chu Lee

    IPC分类号： H04L12/56

    CPC分类号： H04L49/508 ,  H04L49/101 ,  H04L49/1523 ,  H04L49/1553 ,  H04L49/20 ,  H04L49/30 ,  H04L49/3072

    摘要： A packet parallel interconnection network for routing packets in parallel form comprises a three-dimensional space domain switch which interconnects a plurality of time domain switches in the form of multiple two level bus systems with separate data and control paths. The space domain switch comprises one control plane and a plurality of data switching planes such that the i.sup.th data switching plane routes the i.sup.th data slice of a packet. The control plane and the data switching planes comprise output buffered crosspoint switches. The control plane processes address information in the packets to be routed and broadcasts routing information to the data switching planes to control the routing of data slices by the data switching planes. It is a significant advantage of the time and space domain switches that decoupled control and data paths provide for overlapped control processing and data routing. The inventive interconnection network is especially useful for implementing a parallel processing system for processing database queries.

    摘要翻译： 用于以并行形式路由分组的分组并行互连网络包括三维空间域交换机，其以多个两级总线系统的形式将多个时域交换机与单独的数据和控制路径相互连接。 空间域交换机包括一个控制平面和多个数据交换平面，使得第i个数据交换平面路由分组的第i个数据分片。 控制平面和数据交换平面包括输出缓冲交叉点开关。 控制平面处理要路由的分组中的地址信息，并将路由信息广播到数据交换平面，以控制数据切换平面对数据切片的路由。 解耦控制和数据路径为重叠的控制处理和数据路由提供时间和空间域交换机的显着优点。 本发明的互连网络对于实现用于处理数据库查询的并行处理系统是特别有用的。

    Method and circuit arrangement for the acceptance and forwarding of message cells transmitted according to an asynchronous transfer mode by an asynchronous transfer mode switching equipment
    56.
    发明授权
    Method and circuit arrangement for the acceptance and forwarding of message cells transmitted according to an asynchronous transfer mode by an asynchronous transfer mode switching equipment 失效
    通过异步传输模式切换设备接收异步传输模式传输信息的接收和转发的方法和电路布置

    公开(公告)号：US5153920A

    公开(公告)日：1992-10-06

    申请号：US738358

    申请日：1991-07-31

    申请人： Gerd Danner

    发明人： Gerd Danner

    IPC分类号： H04L12/56

    CPC分类号： H04L49/25 ,  H04L49/1553 ,  H04L49/256 ,  H04L49/552 ,  H04L2012/5627 ,  H04L2012/5652 ,  H04L49/1515 ,  H04L49/30

    摘要： For receiving and forwarding message cells transmitted according to an asynchronous transfer mode (ATM) by an ATM switching equipment which comprises a multi-stage reversing switching matrix network, each of the message cells has a routing information block having a plurality of routing information corresponding in number of the plurality of switching matrix stages to be traversed located in front thereof within the ATM switching equipment and the routing information just evaluated for the forwarding of a message cell through one of the switching matrix stages is subsequently displaced to the end of the respective routing information block. It is thereby provided that each of the routing information of the routing information block has a separate security information attached thereto and the security information is falsified, together with the displacement of a routing information to the end of the respective routing information block. A message cell is thereby only forwarded via a switching matrix stage when the routing information to be evaluated for that purpose has been recognized as being free of error on the basis of the attached security information.

    摘要翻译： 为了接收和转发由包括多级反转交换矩阵网络的ATM交换设备根据异步传输模式（ATM）发送的消息小区，每个消息小区具有路由信息块，该路由信息块具有多个对应于 在ATM交换设备内位于其前面的多个交换矩阵级的数目，并且刚刚评估用于通过一个交换矩阵级转发消息单元的路由信息​​随后被移位到相应路由的结尾 信息块。 因此，路由信息块的路由信息​​中的每一个具有附加到其上的单独的安全信息，并且安全信息被伪造，以及路由信息的位移到相应的路由信息​​块的末尾。 因此，当为了该目的而被评估的路由信息​​已被基于所附加的安全信息被识别为没有错误时，消息信元因此仅经由交换矩阵级转发。

    Alternate paths in a self-routing packet switching network
    59.
    发明授权
    Alternate paths in a self-routing packet switching network 失效
    自路由分组交换网络中的备用路径

    公开(公告)号：US4550397A

    公开(公告)日：1985-10-29

    申请号：US562176

    申请日：1983-12-16

    申请人： Jonathan S. Turner ,  Leonard F. Wyatt

    发明人： Jonathan S. Turner ,  Leonard F. Wyatt

    IPC分类号： H04Q11/04 ,  G06F15/173 ,  H04L12/56 ,  H04Q3/52 ,  H04J3/00

    CPC分类号： H04L49/505 ,  G06F15/17393 ,  H04L49/10 ,  H04L49/1507 ,  H04L49/1553 ,  H04L2012/5627

    摘要： A packet switching architecture in which switching network nodes automatically determine alternate routes through a switching network so as to increase reliability and distribute traffic. The switching network comprises stages of distribution and routing nodes. The routing nodes are responsive to physical addresses associated with the packets to communicate those packets to address designated downstream nodes. The distribution switching nodes statistically communicate packets to downstream switching nodes on the basis of an alternate routing algorithm and availability of downstream nodes. The initial network stages are alternate distribution and routing stages followed by only routing stages for the remaining stages of the network. Both the routing and the distributing nodes are identical in design and are responsive to an input signal from the network to assume either routing or distributing functions.

    摘要翻译： 一种分组交换架构，其中交换网络节点通过交换网络自动确定备用路由，以便增加可靠性并分配流量。 交换网络包括分布和路由节点的阶段。 路由节点响应于与分组相关联的物理地址，以将这些分组传送到寻址指定的下游节点。 分布交换节点基于备用路由算法和下游节点的可用性统计地将分组传送到下游交换节点。 初始的网络阶段是交替的分配和路由阶段，后面只有网络的其余阶段的路由阶段。 路由和分发节点在设计上是相同的，并且响应于来自网络的输入信号来承担路由或分发功能。