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公开(公告)号:US20190013813A1
公开(公告)日:2019-01-10
申请号:US16105424
申请日:2018-08-20
Applicant: STMicroelectronics S.r.l.
Inventor: Francesco Pappalardo , Giuseppe Notarangelo
IPC: H03K19/21 , H03K19/173 , H04L29/12
CPC classification number: H03K19/21 , G08C2201/91 , H03K19/1733 , H03K19/1737 , H03K2217/94021 , H04L61/2038 , H04L61/6072
Abstract: A system includes a processing circuit and a circuit configured to output a given number N of bits of configuration information to be used by the processing circuit. The circuit includes a non-volatile programmable memory configured to output a first group of N bits, N terminals for receiving a second group of N bits, and N logic gates. A first input terminal of each logic gate is connected to a respective bit of output from the non-volatile programmable memory and wherein a second input terminal of each logic gate is connected to a respective terminal of the N terminals.
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632.
公开(公告)号:US10175474B2
公开(公告)日:2019-01-08
申请号:US15165547
申请日:2016-05-26
Applicant: STMicroelectronics S.r.l.
Inventor: Domenico Giusti , Roberto Carminati , Massimiliano Merli
Abstract: A micromechanical device includes a tiltable structure that is rotatable about a first rotation axis. The tiltable structure is coupled to a fixed structure through an actuation structure of a piezoelectric type. The actuation structure is formed by spring elements having a spiral shape. The spring elements each include actuation arms extending transversely to the first rotation axis. Each actuation arm carries a respective piezoelectric band of piezoelectric material. The actuation arms are divided into two sets with the piezoelectric bands thereof biased in phase opposition to obtain rotation in opposite directions of the tiltable structure about the first rotation axis.
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公开(公告)号:US20190007201A1
公开(公告)日:2019-01-03
申请号:US16022033
申请日:2018-06-28
Inventor: Roberto Colombo , Guido Marco Bertoni , William Orlando , Roberta Vittimani
Abstract: A processing system includes a first processing unit; a second processing unit; and a cryptographic coprocessor communicatively coupled to the first processing unit and the second processing unit. The cryptographic coprocessor includes a key storage memory for storing a cryptographic key; a first interface configured to receive source data to be processed directly from the first processing unit; a hardware cryptographic engine configured to process the source data as a function of the cryptographic key stored in the key storage memory; a second interface configured to receive a first cryptographic key directly from the second processing unit; and a hardware key management circuit configured to store the first cryptographic key in the key storage memory.
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634.
公开(公告)号:US20180374780A1
公开(公告)日:2018-12-27
申请号:US16007767
申请日:2018-06-13
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Mauro MAZZOLA , Matteo DE SANTA , Battista VITALI
IPC: H01L23/495 , H01L23/31 , H01L21/48 , H01L21/56
Abstract: A process for manufacturing a semiconductor flip chip package and a corresponding flip chip package. The process comprises associating conducting bump pads to a face corresponding to an active side of one or more electronic dice, flipping the one or more electronic dice so that said face corresponding to an active side of one or more electronic dies is facing a leadframe carrying contacting pads in correspondence of said conducting bump pads, bonding said contacting pads to said conducting bump pads and encasing said one or more electronic dice in a casing by a molding operation. The process includes providing a leadframe having contacting pads presenting a recessed surface in correspondence of the position of said conducting bump pads.
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公开(公告)号:US10164521B2
公开(公告)日:2018-12-25
申请号:US14957269
申请日:2015-12-02
Applicant: STMicroelectronics S.R.L.
Inventor: Claudia Castelli
Abstract: A control device for a switching regulator having two or more converter stages operating with interleaved operation, each converter stage including an inductive element and a switch element, generates command signals having a switching period for controlling switching of the switch elements, and determining alternation of a storage phase of energy in the respective inductive element and a transfer phase of the stored energy onto an output element. The control device generates the command signals phase-offset by an appropriate fraction of the switching period to obtain interleaved operation. In particular, a synchronism stage generates a synchronism signal and a control stage generates the command signals for the converter stages timed by the same synchronism signal.
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636.
公开(公告)号:US20180358456A1
公开(公告)日:2018-12-13
申请号:US16004257
申请日:2018-06-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Ferdinando IUCOLANO , Alessandro CHINI
IPC: H01L29/778 , H01L29/20 , H01L29/66 , H01L29/08 , H01L29/417 , H01L29/423
CPC classification number: H01L29/778 , H01L29/0847 , H01L29/1087 , H01L29/2003 , H01L29/207 , H01L29/41725 , H01L29/41766 , H01L29/4232 , H01L29/4236 , H01L29/66462 , H01L29/7786
Abstract: An HEMT includes a buffer layer, a hole-supply layer on the buffer layer, a heterostructure on the hole-supply layer, and a source electrode. The hole-supply layer is made of P-type doped semiconductor material, the buffer layer is doped with carbon, and the source electrode is in direct electrical contact with the hole-supply layer, such that the hole-supply layer can be biased to facilitate the transport of holes from the hole-supply layer to the buffer layer.
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637.
公开(公告)号:US10153207B2
公开(公告)日:2018-12-11
申请号:US15194309
申请日:2016-06-27
Applicant: STMicroelectronics S.R.L.
Inventor: Ferruccio Frisina , Giuseppe Abbondanza
IPC: C30B25/10 , H01L21/78 , C30B33/00 , C30B33/06 , H01L21/02 , C30B9/06 , C30B19/04 , C30B19/08 , C30B19/12 , C30B29/36 , C23C16/01 , C23C16/02 , C23C16/32 , C23C16/458
Abstract: An embodiment described herein includes a method for producing a wafer of a first semiconductor material. Said first semiconductor material has a first melting temperature. The method comprises providing a crystalline substrate of a second semiconductor material having a second melting temperature lower than the first melting temperature, and exposing the crystalline substrate to a flow of first material precursors for forming a first layer of the first material on the substrate. The method further comprising bringing the crystalline substrate to a first process temperature higher than the second melting temperature, and at the same time lower than the first melting temperature, in such a way the second material melts, separating the second melted material from the first layer, and exposing the first layer to the flow of the first material precursor for forming a second layer of the first material on the first layer.
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638.
公开(公告)号:US10152944B2
公开(公告)日:2018-12-11
申请号:US14870131
申请日:2015-09-30
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Filippo Naccari , Mirko Guarnera , Simone Bianco , Raimondo Schettini
Abstract: Color signals to be displayed on a colored display surface and having a first gamut in a color space, are subjected to radiometric compensation. An embodiment includes displaying on the colored surface a set of control points of a known color, acquiring via a camera the control points as displayed on the colored surface and evaluating at least one second color gamut of the control points displayed on the colored surface. The second color gamut(s) is/are misaligned with respect to the first color gamut due to the display surface being a colored surface. The method may also include evaluating as an intersection gamut, the misalignment of the second color gamut(s) with respect to the first color gamut, calculating the color transformation operator(s) as a function of the misalignment evaluated, and applying the color transformation operator(s) to the color signals for display on the colored display surface.
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公开(公告)号:US10150666B2
公开(公告)日:2018-12-11
申请号:US15602760
申请日:2017-05-23
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Lorenzo Baldo , Enri Duqi , Flavio Francesco Villa
Abstract: A micro-electro-mechanical device formed in a monolithic body of semiconductor material accommodating a first buried cavity; a sensitive region above the first buried cavity; and a second buried cavity extending in the sensitive region. A decoupling trench extends from a first face of the monolithic body as far as the first buried cavity and laterally surrounds the second buried cavity. The decoupling trench separates the sensitive region from a peripheral portion of the monolithic body.
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640.
公开(公告)号:US20180350184A1
公开(公告)日:2018-12-06
申请号:US16103542
申请日:2018-08-14
Applicant: STMicroelectronics S.r.l.
Inventor: Rita Miranda , Carlo Cimino , Marco Alfarano
CPC classification number: G07F7/08 , G06F16/955 , G06K19/07345 , G06Q20/3278 , G06Q20/352 , G06Q20/354 , G06Q20/425
Abstract: A method for activation of a payment card includes accessing a remote computer server of a card issuer to input card activation information, storing a unique code in the payment card having a contactless readable interface and in the remote computer server, the unique code corresponding to the payment card, and reading the unique code by a user terminal having a corresponding contactless interface. The method includes sending the unique code from the user terminal to the remote computer server, and upon verification of the unique code at the remote computer server, generating and sending an activation code to the user terminal and supplying access to an activation code input mask corresponding to the payment card. The method includes that upon submission of the activation code through the activation code input mask, comparing the submitted activation code with the generated activation code and, when matching, activating the payment card.
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