摘要:
A memory transistor has a pair of separate floating gates overlying end regions of a channel and a control gate that overlies the floating gates and a central region of the channel. The memory transistor effectively operates as a pair of floating gate transistors with an intervening select transistor. Each floating gate can be charged to store a distinct binary, analog, or multi-bit value. The direction of the channel current controls which floating gate receives channel hot electron injection during programming and which floating gate state is sensed during reading. A read operation biases the word line higher that the threshold voltage used to store data and compares the resulting channel to reference currents to identify a stored binary, analog, or multi-bit value. The threshold voltage range can include negative threshold voltages, which increases the available range for multi-bit-per-floating gate storage. The memory transistors can be integrated into a contactless array architecture having approximately one global bit/virtual ground line for every four floating gates along a row.
摘要:
A compact contactless Flash memory architecture has memory cells instead of isolation regions between adjacent diffused lines in rows of a bank and thereby increases the density of memory cells in the bank when compared to prior architectures. Diffused lines in the bank can be used as virtual ground lines or as bit lines depending on which column of the bank is selected for access. The architecture includes about half as many metal lines as diffused lines, and most bank select cells operate to connect respective metal lines to respective pairs of diffused lines.
摘要:
A Flash memory employs uniform-size blocks in array planes and has separate read and write paths connected to the array planes. The read path can read from one array plane while the write path writes in another array plane and one or more blocks are being erased. The uniform block size permits a symmetric layout and provides maximum flexibility in storage of data, code, and parameters. The uniform block size also allows spare blocks in the array planes to replace of any defective blocks. A redundancy system for the Flash memory uses a CAM and a RAM for address comparison and substitution to replace addresses corresponding to defective memory elements. To reduce access delays, part of the input address such as the row address goes directly to decoders, while another part of the input address such as the block address goes to the CAM array.
摘要:
The performance of a compression ignition internal combustion engine is improved by optimizing excess air ratio (lambda) and/or intake air charge temperature (ACT) on a full time, full range basis. The basic procedure is to first determine the desired or optimum lambda and then to control ACT and intake manifold absolute pressure (MAP) to maintain them at the optimum values for the fuel quantity required at a particular operating point. This approach allows control of both temperature and pressure of the air entering the engine. Full range control requires that lambda and ACT be controlled both upward and downward to achieve optimal engine performance. Control of both lambda and ACT is further enhanced through the use of a supercharger with adjustable input power installed in series with a standard turbocharger compressor of the engine. Supercharger control may if desired be supplemented with turbo air bypass (TAB) control, turbocharger variable area nozzle or wastegate, turboexpander control, and intake and exhaust valve control including skip fire of both fuel and air. The essence of optimized lambda control is to measure the physical properties of the working fluid in the intake manifold, exhaust manifold, or both, compute the actual value of lambda, and compare that actual value with an optimum value for the prevailing engine operating conditions. This comparison yields an error signal which is then used to control the magnitude of the required adjustment in turbocharger pressure or other engine operating parameter.
摘要:
In a programmable logic device, switching speed is improved by preventing the bit line potential from going excessively close to ground even when large numbers of word line connections to the ground conductor are made. In addition, bit line pull up to logic 1 is effected more rapidly (without retarding bit line pull down to logic 0) by having two transistors connected in parallel with one another between the reference potential source and the bit line. One of these transistors is on all the time providing a relatively small leakage current. The other transistor is on only while the bit line is at logic 0, thereby speeding pull up to logic 1 and then shutting off so as not to impede subsequent return to logic 0.
摘要:
A programmable logic device having a plurality of word lines and a plurality of bit lines, each of which is programmably interconnectable to at least one of the word lines for producing on each bit line a signal which is a logical function of the signal or signals on the word line or lines to which that bit line is interconnected. The logic device further includes at least one spare word line and/or bit line for use in the event that one of the regular lines of the same kind in defective. When the spare line is to be used, the device is preprogrammed to automatically redirect all signals intended for the bad line to another line, thereby putting the spare line into use. The signals thus automatically redirected include both the signals used during program mode to selectively interconnect the word lines and bit lines and the data signals subsequently processed during normal operation of the device.
摘要:
A method and system for determining interaction sites between biosequences is described herein. A dataset of contact data for a plurality of biomolecule pairs is obtained to account their frequency of occurrence. Statistical weights are obtained for each frequency of occurrence. A statistical vector space (SRV) is decomposed through principal component decomposition. The r-vectors of the SRV are re-projected back to a new SRV with a new set of SR coordinates. A feature vector is generated and inputted into a predictor for outputting a likelihood of an interaction site. A method and system for determining significant attribute-value associations (AVAs) from relational datasets is also described. A frequency of occurrence of attribute value pairs and statistical weights may be obtained for each frequency of occurrence. Principal component decomposition and re-projection of AVA vectors may also be performed. The disentangle SR of AVAs could be used to identify AVA related to subgroups/classes.
摘要:
A system and method for processing relational datasets are provided, the method may include: retrieving a relational dataset containing a plurality of entities and a plurality of attribute values; constructing an entity address table, based on the relational dataset, wherein the entity address table contains the plurality of attribute values, and each of the plurality of attribute values is associated with one or more entity addresses in the relational dataset; generating a frequency table, based on the entity address table, wherein the frequency table contains one or more cardinality values; generating a SR vector space table comprising a plurality of SR values for the plurality of a pair of attribute values; generating PCs and their corresponding RSRVs through disentangling SRV into a plurality of disentangled spaces (DS); selecting from the plurality of DS, a subset of DS; and generating one or more patterns based on the plurality of DS.
摘要:
A writing aid is provided which may be used to promote better form for the hand for the user. It may be used to teach young persons or individuals with disabilities who are first learning to write, and may also be used to provide comfort and better ergonomics to individuals who must write frequently. The writing aid is designed to be compatible with different writing apparatuses with carrying thicknesses, ranging from relatively thin pencil crayons to relatively thick markers.