-
公开(公告)号：US08681169B2
公开(公告)日：2014-03-25
申请号：US12651228
申请日：2009-12-31
申请人： Jesse D. Hall , Jerome F. Duluk, Jr. , Andrew Tao , Henry Moreton
发明人： Jesse D. Hall , Jerome F. Duluk, Jr. , Andrew Tao , Henry Moreton
CPC分类号： G06T15/04
摘要： Systems and methods for texture processing are presented. In one embodiment a texture method includes creating a sparse texture residency translation map; performing a probe process utilizing the sparse texture residency translation map information to return a finest LOD that contains the texels for a texture lookup operation; and performing the texture lookup operation utilizing the finest LOD. In one exemplary implementation, the finest LOD is utilized as a minimum LOD clamp during the texture lookup operation. A finest LOD number indicates a minimum resident LOD and a sparse texture residency translation map includes one finest LOD number per tile of a sparse texture. The sparse texture residency translation can indicate a minimum resident LOD.
摘要翻译： 提出了纹理处理的系统和方法。 在一个实施例中，纹理方法包括创建稀疏纹理驻留转换图; 使用稀疏纹理驻留转换映射信息来执行探测过程以返回包含用于纹理查找操作的纹素的最好的LOD; 并利用最好的LOD执行纹理查找操作。 在一个示例性实现中，在纹理查找操作期间，最好的LOD用作最小LOD钳位。 最好的LOD数字表示最小驻留LOD，稀疏纹理驻留转换映射包括稀疏纹理的每个瓷砖的最好的LOD数。 稀疏纹理驻留翻译可以指示最小驻留LOD。
-
公开(公告)号：US08427493B2
公开(公告)日：2013-04-23
申请号：US12893617
申请日：2010-09-29
申请人： Jerome F. Duluk, Jr. , Thomas Roell
发明人： Jerome F. Duluk, Jr. , Thomas Roell
IPC分类号： G06T1/60
CPC分类号： G06T17/00 , G06F9/3009 , G06F9/30101 , G06F9/30109 , G06F9/3851 , G06F9/3887 , G06T2210/32
摘要： One embodiment of the present invention sets forth a technique for reducing the overhead for transmitting explicit begin and explicit end commands that are needed in primitive draw command sequences. A draw method includes a header to specify an implicit begin command, an implicit end command, and instancing information for a primitive draw command sequence. The header is followed by a packet including one or more data words (dwords) that each specify a primitive topology, starting offset into a vertex or index buffer, and vertex or index count. Only a single clock cycle is consumed to transmit and process the header. The performance of graphics application programs that have many small batches of geometry (as is typical of many workstation applications) may be improved since the overhead of transmitting and processing the explicit begin and explicit end draw commands is reduced.
摘要翻译： 本发明的一个实施例提出了用于减少用于发送原始绘制命令序列中所需的显式开始和显式终止命令的开销的技术。 绘制方法包括用于指定隐式开始命令的头部，隐式结束命令和用于原始绘制命令序列的实例化信息。 标题之后是包括一个或多个数据字（dwords）的数据包，每个数据字指定原始拓扑，将偏移开始到顶点或索引缓冲区，以及顶点或索引计数。 仅消耗一个时钟周期来传输和处理标题。 可以改进具有许多小批量几何图形应用程序的性能（如许多工作站应用程序的典型），因为减少了显式开始和显式结束绘制命令的传输和处理的开销。
-
公开(公告)号：US08319783B1
公开(公告)日：2012-11-27
申请号：US12340493
申请日：2008-12-19
申请人： David Kirk McAllister , Steven E. Molnar , Peter B. Holmqvist , Jerome F. Duluk, Jr. , Cass W. Everitt , Emmett M. Kilgariff , Patrick R. Brown , Christian Johannes Amsinck
发明人： David Kirk McAllister , Steven E. Molnar , Peter B. Holmqvist , Jerome F. Duluk, Jr. , Cass W. Everitt , Emmett M. Kilgariff , Patrick R. Brown , Christian Johannes Amsinck
CPC分类号： G09G5/363 , G09G5/393 , G09G2360/121 , G09G2360/122
摘要： A system and method for performing zero-bandwidth-clears reduces external memory accesses by a graphics processor when performing clears and subsequent read operations. A set of clear values is stored in the graphics processor. Each portion of a color or z buffer may be configured using a zero-bandwidth-clear command to reference a clear value without writing the external memory. The clear value is provided to a requestor without accessing the external memory when a read access is performed.
摘要翻译： 执行零带宽清除的系统和方法在执行清除和后续读取操作时减少图形处理器的外部存储器访问。 一组清晰的值存储在图形处理器中。 可以使用零带宽清除命令来配置颜色或z缓冲器的每个部分，以引用清除值而不写入外部存储器。 当执行读取访问时，清除值被提供给请求者而不访问外部存储器。
-
64.发明授权公开(公告)号：US08228338B1
公开(公告)日：2012-07-24
申请号：US11625136
申请日：2007-01-19
CPC分类号： G06F11/0793 , G06F11/0715 , G06F11/0751
摘要： A method and system for overriding state information programmed into a processor using an application programming interface (API) avoids introducing error conditions in the processor. An override monitor unit within the processor stores the programmed state for any setting that is overridden so that the programmed state can be restored when the error condition no longer exists. The override monitor unit overrides the programmed state by forcing the setting to a legal value that does not cause an error condition. The processor is able to continue operating without notifying a device driver that an error condition has occurred since the error condition is avoided.
摘要翻译： 使用应用编程接口（API）将编程到处理器中的状态信息进行覆盖的方法和系统避免了在处理器中引入错误状况。 处理器内的覆盖监视单元存储被覆盖的任何设置的编程状态，以便当错误条件不再存在时可以恢复编程状态。 覆盖监视器单元通过强制设置为不引起错误条件的合法值来覆盖编程状态。 处理器能够在不通知设备驱动程序的情况下继续运行，因为避免了错误条件，所以发生了错误状况。
-
公开(公告)号：US08085275B1
公开(公告)日：2011-12-27
申请号：US11314875
申请日：2005-12-20
摘要： A push buffer-related system, method and computer program product are provided. Initially, an entry is obtained from a buffer storage describing a size and location of a portion of a push buffer. To this end, the portion of the push buffer is capable of being retrieved, utilizing the entry from the buffer storage.
摘要翻译： 提供了与缓存相关的系统，方法和计算机程序产品。 最初，从描述推送缓冲器的一部分的大小和位置的缓冲存储器获得条目。 为此，可以利用来自缓冲存储器的条目来检索推送缓冲器的部分。
-
公开(公告)号：US20110242119A1
公开(公告)日：2011-10-06
申请号：US13078878
申请日：2011-04-01
申请人： Jeffrey A. BOLZ , Jesse David Hall , Jerome F. Duluk, JR. , Patrick R. Brown , Gregory Scott Palmer
发明人： Jeffrey A. BOLZ , Jesse David Hall , Jerome F. Duluk, JR. , Patrick R. Brown , Gregory Scott Palmer
IPC分类号： G06T15/00
CPC分类号： G06T15/005 , G06F9/3009 , G06F9/3851 , G06F9/3879 , G06F9/3891 , G06T1/00 , G06T1/60 , G06T15/80
摘要： One embodiment of the present invention sets forth a method for generating work to be processed by a graphics pipeline residing within a graphics processor. The method includes the steps of receiving an indication that a first graphics workload is to be submitted to a command queue associated with the graphics processor, allocating a first portion of shader accessible memory for one or more units of state information that are necessary for processing the first graphics workload, populating the first portion of shader accessible memory with the one or more units of state information, and transmitting to the command queue of the graphics processor the one or more units of state information stored within the first portion of shader accessible memory, wherein the first graphics workload is processed within the graphics pipeline based on the one or more units of state information.
摘要翻译： 本发明的一个实施例提出了一种用于产生要由位于图形处理器内的图形管线处理的工作的方法。 该方法包括以下步骤：接收将要向第一图形工作负载提交到与图形处理器相关联的命令队列的指示，为处理所述图形处理所需的一个或多个状态信息单元分配着色器可访问存储器的第一部分 第一图形工作负载，用一个或多个状态信息单元填充着色器可访问存储器的第一部分，以及向存储在着色器可访问存储器的第一部分内的一个或多个状态信息单元传送到图形处理器的命令队列， 其中基于所述一个或多个状态信息单元在所述图形流水线内处理所述第一图形工作负载。
-
公开(公告)号：US20110084972A1
公开(公告)日：2011-04-14
申请号：US12900329
申请日：2010-10-07
IPC分类号： G06T1/00
CPC分类号： G06T1/20 , G06F9/3851 , G06F9/3887 , G06T15/005 , G09G5/363
摘要： One embodiment of the present invention sets forth a technique for executing a software method within a graphics processing unit (GPU) that minimizes the number of clock cycles during which the graphics engine is idled. The function of the software method is performed by a firmware method that is executed by a processor within the GPU. The firmware method is executed to access and optionally update the state stored in the GPU. Unlike execution of a conventional software method, execution of the firmware method does not require an exchange of information between a CPU and the GPU. Therefore, the CPU is not interrupted and throughput of the CPU is not reduced.
摘要翻译： 本发明的一个实施例提出了一种用于在图形处理单元（GPU）内执行软件方法的技术，其最大限度地减少图形引擎在空闲期间的时钟周期数。 软件方法的功能是通过由GPU内的处理器执行的固件方法执行的。 执行固件方法来访问和可选地更新存储在GPU中的状态。 与常规软件方法的执行不同，固件方法的执行不需要CPU和GPU之间的信息交换。 因此，CPU不中断，CPU的吞吐量不降低。
-
68.发明授权公开(公告)号：US07808503B2
公开(公告)日：2010-10-05
申请号：US11613093
申请日：2006-12-19
申请人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Yo , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
发明人： Jerome F. Duluk, Jr. , Richard E. Hessel , Vaughn T. Arnold , Jack Benkual , Joseph P. Bratt , George Cuan , Stephen L. Dodgen , Emerson S. Fang , Zhaoyu Gong , Thomas Y. Yo , Hengwei Hsu , Sidong Li , Sam Ng , Matthew N. Papakipos , Jason R. Redgrave , Sushma S. Trivedi , Nathan D. Tuck , Shun Wai Go , Lindy Fung , Tuan D. Nguyen , Joseph P. Grass , Bo Hong , Abraham Mammen , Abbas Rashid , Albert Suan-Wei Tsay
CPC分类号： G06T15/20 , G06T1/60 , G06T11/001 , G06T11/40 , G06T15/005 , G06T15/04 , G06T15/30 , G06T15/40 , G06T15/50 , G06T15/80 , G06T15/83 , G06T15/87
摘要： A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.
摘要翻译： 提供了包括许多子结构的延迟着色图形流水线处理器和方法。 处理器和方法的实施例可以包括延迟着色，平铺帧缓冲器和多级隐藏表面去除处理中的一个或多个。 在延迟阴影图形管道中，在完成像素着色之前完成隐藏表面移除。 流水线处理器包括命令提取和解码单元，几何单元，模式提取单元，分类单元，设置单元，剔除单元，模式注入单元，片段单元，纹理单元，Phong照明单元， 像素单元和后端单元。
-
公开(公告)号：US07623135B1
公开(公告)日：2009-11-24
申请号：US10884610
申请日：2004-07-02
IPC分类号： G06T15/00
CPC分类号： H04N9/31 , H04N9/3185
摘要： Method and apparatus for display image adjustment is described. More particularly, handles associated with polygon vertices of a polygon rendered image are provided as a graphical user interface (GUI). These handles may be selected and moved by a user with a cursor pointing device to adjust a displayed image for keystoning, among other types of distortion. This GUI allows a user to adjust a projected image for position of a projector with respect to imaging surface, as well as for imaging surface contour, where such contour may be at least substantially planar, cylindrical, or spherical and where such contour may comprise multiple imaging surfaces. This advantageously may be done without special optics or special equipment. An original image is used as texture for rendering polygons, where the image is applied to the rendered polygons.
摘要翻译： 描述用于显示图像调整的方法和装置。 更具体地，提供与多边形呈现图像的多边形顶点相关联的句柄作为图形用户界面（GUI）。 这些手柄可以由具有光标指示装置的用户选择和移动，以调整用于梯形失真的显示图像以及其他类型的失真。 该GUI允许用户调整相对于成像表面的投影仪的位置的投影图像，以及用于成像表面轮廓，其中这种轮廓可以是至少基本上平面的，圆柱形的或球形的，并且其中这样的轮廓可以包括多个 成像面。 这有利于在没有特殊光学或特殊设备的情况下完成。 使用原始图像作为渲染多边形的纹理，其中将图像应用于渲染的多边形。
-
公开(公告)号：US07526634B1
公开(公告)日：2009-04-28
申请号：US11535871
申请日：2006-09-27
IPC分类号： G06F9/40
CPC分类号： G06F9/52 , G06F9/546 , G06F2209/548
摘要： Systems and methods for synchronizing processing work performed by threads, cooperative thread arrays (CTAs), or “sets” of CTAs. A central processing unit can load launch commands for a first set of CTAs and a second set of CTAs in a pushbuffer, and specify a dependency of the second set upon completion of execution of the first set. A parallel or graphics processor (GPU) can autonomously execute the first set of CTAs and delay execution of the second set of CTAs until the first set of CTAs is complete. In some embodiments the GPU may determine that a third set of CTAs is not dependent upon the first set, and may launch the third set of CTAs while the second set of CTAs is delayed. In this manner, the GPU may execute launch commands out of order with respect to the order of the launch commands in the pushbuffer.
摘要翻译： 由线程执行的处理工作同步的系统和方法，协同线程数组（CIA）或CTA的“集合”。 中央处理单元可以加载针对第一组CTA和第二组CTA的推送命令，并且在第一组的执行完成时指定第二组的依赖关系。 并行或图形处理器（GPU）可以自主地执行第一组CTA并且延迟第二组CTA的执行，直到第一组CTA完成。 在一些实施例中，GPU可以确定第三组CTA不依赖于第一组，并且可以启动第三组CTA，同时第二组CTA被延迟。 以这种方式，GPU可以相对于推送缓冲器中的发射命令的顺序执行命令无序。
-
-
-
-
-
-
-
-
-
搜索结果
100 条记录 (耗时 0.054 秒)
