公开(公告)号：US06946926B2

公开(公告)日：2005-09-20

申请号：US10469032

申请日：2003-02-19

Applicant: Mikihiro Shimada ,  Kaoru Ishida ,  Hiroyuki Asakura

Inventor： Mikihiro Shimada ,  Kaoru Ishida ,  Hiroyuki Asakura

IPC: H05K3/46 ,  H01B11/00 ,  H01P3/00 ,  H01P3/02 ,  H01P3/08 ,  H04B3/32 ,  H05K1/00 ,  H05K1/02 ,  H01P3/04

CPC classification number: H01P3/026 ,  H01P3/023 ,  H05K1/0228 ,  H05K1/0237 ,  H05K1/0298 ,  H05K2201/09236 ,  H05K2201/09672

Abstract: A wired transmission path includes first and second differential transmission paths. The first differential transmission path is composed of two strip lines, and the second differential transmission path is composed of two strip lines. Each of the strip lines of the first differential transmission path is disposed at an equal distance from the strip lines of the second differential transmission path. Thus, there is provided a wired transmission path including a plurality of differential transmission paths in such a manner so as to cancel crosstalk.

Abstract translation: 有线传输路径包括第一和第二差分传输路径。 第一差分传输路径由两条带状线组成，第二差分传输路径由两条带状线组成。 第一差分传输路径的每条带状线设置在与第二差分传输路径的带状线相等的距离处。 因此，提供了一种包括多个差分传输路径的有线传输路径，以便消除串扰。

公开(公告)号：US20050139988A1

公开(公告)日：2005-06-30

申请号：US11000204

申请日：2004-12-01

Applicant: Kaoru Ishida

Inventor： Kaoru Ishida

IPC: H01L23/12 ,  H01L23/498 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H05K1/02 ,  H05K1/11 ,  H05K3/46 ,  H01L23/48

CPC classification number: H05K1/0231 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/50 ,  H01L23/552 ,  H01L23/66 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2924/15173 ,  H01L2924/19105 ,  H05K1/112 ,  H05K2201/10522 ,  H05K2201/10674

Abstract: Crosstalk is suppressed low even when one surface of a multi-layer board seats a semiconductor integrated circuit of the BGA type and peripheral circuit components. Of a plurality of BGA bumps arranged on the back surface of a semiconductor integrated circuit chip, those BGA bumps (such as a high-frequency signal pin) to which peripheral circuit components need be mounted right close are arranged outer-most, and peripheral circuit components are then mounted right close to these BGA bumps. The BGA bumps one tier inner from the outer-most BGA bumps, which are to be used as grounding terminals, are connected with a wide inner-layer grounding wire pattern. Those BGA bumps (such as a logic control signal pin) to which peripheral circuit components need not be mounted right close are disposed further inward and connected with an inner-layer wire pattern which is located even deeper down from a front layer. This makes the grounding pattern held between the signal wire pattern and the control wire pattern and ensures isolation between these wire patterns, whereby it is possible to suppress leakage of a signal which could cause crosstalk.

Abstract translation: 即使多层板的一个表面位于BGA型半导体集成电路和外围电路部件上，串扰也被抑制得较低。 布置在半导体集成电路芯片的背面上的多个BGA凸块中，需要紧密安装外围电路部件的那些BGA凸点（例如高频信号引脚）被布置在最外侧，并且外围电路 然后将组件紧靠这些BGA凸块安装。 用作接地端子的最外面的BGA凸块内部的BGA凸点与宽内层接地线图案相连。 外围电路部件不需要紧密安装的那些BGA凸块（诸如逻辑控制信号引脚）进一步向内设置，并且与从前层更深地定位的内层线图形连接。 这使得在信号线图案和控制线图案之间保持接地图案，并且确保这些线图案之间的隔离，由此可以抑制可能引起串扰的信号的泄漏。

公开(公告)号：US06710652B2

公开(公告)日：2004-03-23

申请号：US09961144

申请日：2001-09-21

Applicant: Masayuki Miyaji ,  Kaoru Ishida ,  Toshimitsu Matsuyoshi ,  Seiji Fujiwara

Inventor： Masayuki Miyaji ,  Kaoru Ishida ,  Toshimitsu Matsuyoshi ,  Seiji Fujiwara

IPC: H03F100

CPC classification number: H03F1/3229 ,  H03F2201/3218

Abstract: A feedforward amplifier includes a first power splitter for dividing an input signal into two paths. The first path, in sequence, includes a first vector adjuster, a main amplifier, a second power splitter and a delay circuit. The second path, in sequence, includes a delay circuit, a distortion detecting power combiner, a second vector adjuster and an error amplifier. The distortion detecting power combiner combines a portion of a signal from the first path with a signal in the second path. Each vector adjuster adjusts amplitude and phase of a signal in each path. A distortion suppression power combiner synthesizes a signal in the first path with a signal in the second path. Control is included for stopping operation of the error amplifier or main amplifier based on a predetermined condition.

Abstract translation: 前馈放大器包括用于将输入信号分成两个路径的第一功率分配器。 第一路径依次包括第一矢量调节器，主放大器，第二功率分配器和延迟电路。 第二路径依次包括延迟电路，失真检测功率组合器，第二矢量调节器和误差放大器。 失真检测功率组合器将来自第一路径的信号的一部分与第二路径中的信号组合。 每个矢量调节器调整每个路径中信号的幅度和相位。 失真抑制功率组合器将第一路径中的信号与第二路径中的信号合成。 包括用于基于预定条件停止误差放大器或主放大器的操作的控制。

公开(公告)号：US06690249B2

公开(公告)日：2004-02-10

申请号：US10102732

申请日：2002-03-22

Applicant: Kaoru Ishida ,  Masayuki Miyaji ,  Hiroaki Kosugi ,  Shin'ichi Kugou

Inventor： Kaoru Ishida ,  Masayuki Miyaji ,  Hiroaki Kosugi ,  Shin'ichi Kugou

IPC: H01P512

CPC classification number: H01P5/10 ,  H01P5/12 ,  H03F3/602

Abstract: A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics; a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of the first, second and third power amplifier circuits, and propagating combined output.

Abstract translation: 高功率放大器具有将输入信号的一半传播到同相输出端的第一平衡 - 不平衡转换器，并且还将第四输入信号传播到第一和第二反相输出端，信号传播到第一和第二 反相输出端子滞后于传播到同相输出端子的信号后方180度; 第一和第二功率放大器电路连接到第一平衡 - 不平衡变换器的第一和第二反相输出端子并且具有相同的特性; 连接到第一平衡 - 不平衡变换器的同相输出端的第三功率放大器电路，其输出功率基本上是第一或第二功率放大器电路的输出功率的两倍; 以及具有用于接收第一和第二功率放大器电路的输出的第一和第二反相输入端的第二平衡 - 不平衡变压器，具有用于接收第三功率放大器电路的输出的同相输入端， ，第二和第三功率放大器电路，以及传播组合输出。

公开(公告)号：US06590906B1

公开(公告)日：2003-07-08

申请号：US09377988

申请日：1999-08-20

Applicant: Kaoru Ishida ,  Masayuki Miyaji ,  Hiroaki Kosugi ,  Shin'ichi Kugou

Inventor： Kaoru Ishida ,  Masayuki Miyaji ,  Hiroaki Kosugi ,  Shin'ichi Kugou

IPC: H04J100

CPC classification number: H04L27/2614 ,  H04L27/2602 ,  H04L27/2637

Abstract: To reduce the size of a multi-carrier transmitter circuit for a mobile communication base station, by suppressing instantaneous peak output power to a small value with respect to a wide-band signal of a few MHz to tens of MHz so that the peak factor of a multi-carrier signal is reduced. In a multi-carrier transmitter circuit for modulating carriers with corresponding input signals to generate modulated signals and then multiplexing said modulated signals and outputting a multiplexed signal, the multi-carrier transmitter circuit is equipped with carrier generators 3-1 to 3-n for generating each said carrier, modulators 5-1 to 5-n for modulating each carrier with each input signal and outputting said modulated signal, an adder 6 for multiplexing said modulated signals and outputting the multiplexed signal, variable attenuators 2-1 to 2-n for directly or indirectly adjusting a level of each input signal, phase detectors 4-1 to 4-n for detecting a phase of each carrier, and a control circuit 7 for controlling the variable attenuators 2-1 to 2-n in accordance with the phase of each carrier.

Abstract translation: 为了减小用于移动通信基站的多载波发射机电路的尺寸，通过相对于几MHz至几十MHz的宽带信号将瞬时峰值输出功率抑制到较小值，使得峰值因子 减少了多载波信号。 在用于用相应输入信号调制载波以产生调制信号，然后复用所述调制信号并输出​​多路复用信号的多载波发射机电路中，多载波发射机电路配备有载波发生器3-1至3-n，用于产生 每个所述载波，调制器5-1至5-n用于用每个输入信号调制每个载波并输出所述调制信号;加法器6，用于复用所述调制信号并输出​​多路复用信号;可变衰减器2-1至2-n，用于 直接或间接地调整每个输入信号的电平，用于检测每个载波的相位的相位检测器4-1至4-n，以及用于根据相位控制可变衰减器2-1至2-n的控制电路7 的每个运营商。

公开(公告)号：US06507253B1

公开(公告)日：2003-01-14

申请号：US09801141

申请日：2001-03-07

Applicant: Toshimitsu Matsuyoshi ,  Toru Matsuura ,  Kaoru Ishida ,  Seiji Fujiwara

Inventor： Toshimitsu Matsuyoshi ,  Toru Matsuura ,  Kaoru Ishida ,  Seiji Fujiwara

IPC: H01P118

CPC classification number: H03H7/30

Abstract: A delay circuit in which amplitude characteristic and delay time characteristic of the output signals do not have any ripple relative to the length of the transmission line is provided. The delay circuit includes a circuit that makes a part of signals distributed into two parts by the power divider (103) to be identical in amplitude and inverse in phase relative to the component of signals outputted from the terminal-a directly to the terminal-c of the circulator (104). By composing with the power combiner (107) both signals are offset each other at the output terminal. As a result, only the signals that are inputted from the input terminal (101) and transmitted through the circulator (104) and the open-ended transmission line (105) are outputted to the output terminal (102).

Abstract translation: 提供其中输出信号的幅度特性和延迟时间特性相对于传输线的长度没有任何纹波的延迟电路。 该延迟电路包括一个电路，其使由功率分配器（103）分成两部分的信号的一部分相对于从终端a直接输出到终端c的信号的分量在幅度上相位相反， 的循环器（104）。 通过与功率组合器（107）组合，两个信号在输出端子彼此偏移。 结果，只有从输入端（101）输入并通过循环器（104）和开路传输线（105）传输的信号才被输出到输出端（102）。

公开(公告)号：US06329875B1

公开(公告)日：2001-12-11

申请号：US09514777

申请日：2000-02-28

Applicant: Kaoru Ishida ,  Toshio Obara ,  Hiroaki Kosugi ,  Naoki Komatsu

Inventor： Kaoru Ishida ,  Toshio Obara ,  Hiroaki Kosugi ,  Naoki Komatsu

IPC: H03F114

CPC classification number: H03F1/0277 ,  H03F1/0288 ,  H03F3/72 ,  H03F2203/7239

Abstract: A power amplifier has an input terminal; an output terminal; an N number of bypassable amplification circuits which are connected directly or indirectly in a sequential manner between the input terminal and the output terminal; an impedance conversion circuit which is connected directly or indirectly between the amplification circuit of a final stage and the output terminal; and a bias control circuit which controls the amplification circuits, each of the amplification circuits is configured by a high-frequency switch circuit, and an amplifier which is connected directly or indirectly to the switch circuit, and the bias control circuit controls power source voltages of the amplifiers and controls status of the switch circuit.

Abstract translation: 功率放大器具有输入端子; 输出端子; N个可旁路放大电路，其以输入端子和输出端子之间的顺序方式直接或间接连接; 直接或间接连接在最后级的放大电路和输出端之间的阻抗转换电路; 以及控制放大电路的偏置控制电路，每个放大电路由高频开关电路和直接或间接地连接到开关电路的放大器构成，偏置控制电路控制电源电压 放大器和开关电路的控制状态。

公开(公告)号：US06326845B1

公开(公告)日：2001-12-04

申请号：US09504365

申请日：2000-02-15

Applicant: Masayuki Miyaji ,  Kaoru Ishida ,  Hiroaki Kosugi ,  Shin'ichi Kugou

Inventor： Masayuki Miyaji ,  Kaoru Ishida ,  Hiroaki Kosugi ,  Shin'ichi Kugou

IPC: H03F100

CPC classification number: H03F1/3229

Abstract: A feedforward amplifier includes a power divider for dividing the input signal into first and second signals. The first signal is processed in a first path that includes, in sequence, a first vector adjuster, a main amplifier, a directional coupler and a delay circuit. The second signal is delayed in a second path that includes, in sequence, another delay circuit, a first power combiner and an auxiliary amplifier block. The first power combiner combines the first signal, by way of a coupling port from the directional coupler, with the second signal to provide a combined signal into the auxiliary amplifier block. The auxiliary amplifier block further divides the second signal into two divided signals, each having a respective non-overlapping frequency band. The two divided signals are respectively vector adjusted, amplified, and then recombined. The recombined signal is then recombined with the processed signal in the first path to provide the desired output signal.

Abstract translation: 前馈放大器包括用于将输入信号分成第一和第二信号的功率分配器。 第一信号在第一路径中被处理，其中依次包括第一矢量调节器，主放大器，定向耦合器和延迟电路。 第二信号在包括另一延迟电路，第一功率组合器和辅助放大器块的第二路径中被延迟。 第一功率组合器通过来自定向耦合器的耦合端口将第一信号与第二信号组合，以向辅助放大器模块提供组合信号。 辅助放大器块进一步将第二信号分成两个分开的信号，每个信号具有相应的非重叠频带。 两个分频信号分别进行矢量调整，放大，然后重新组合。 然后将重新组合的信号与第一路径中的经处理的信号重新组合以提供期望的输出信号。

公开(公告)号：US06206557B1

公开(公告)日：2001-03-27

申请号：US09373568

申请日：1999-08-13

Applicant: Noritoshi Sakuma ,  Kyohei Marukawa ,  Kaoru Ishida ,  Takao Suzuki

Inventor： Noritoshi Sakuma ,  Kyohei Marukawa ,  Kaoru Ishida ,  Takao Suzuki

IPC: B64D4706

CPC classification number: F21V15/04 ,  E01F9/559 ,  E01F9/571 ,  F21S8/022 ,  F21S9/03 ,  F21V31/005 ,  Y02B20/72

Abstract: A traffic sign for use in a paved road has a housing with an open upper end. A holder is vertically movably received in the housing. A light emitting unit is installed in the holder to move therewith. A transparent plate is mounted on the holder to move therewith. The transparent plate permits a light from the light emitting unit to transmit therethrough. A space is defined between a bottom of the housing and a lower end of the holder to permit the vertical movement of the holder in the housing. An elastic support ring has an inner wall fixed to an outer surface of the holder and an outer wall fixed to an inner surface of the housing. Projections are formed on the elastic support ring. Each projection projects upward beyond the transparent plate. Recesses are provided by the elastic support ring. Each recess is defined between the projections, so that the light from the light emitting unit is viewed through the transparent plate and each of the recesses.

Abstract translation: 在铺路中使用的交通标志具有敞开的上端的外壳。 支架垂直移动地容纳在壳体中。 发光单元安装在支架内以与其一起移动。 透明板安装在支架上以与其一起移动。 透明板允许来自发光单元的光透过其中。 在壳体的底部和保持器的下端之间限定了空间，以允许保持器在壳体中的垂直运动。 弹性支撑环具有固定到保持器的外表面的内壁和固定到壳体的内表面的外壁。 在弹性支撑环上形成突起。 每个投影向上突出超过透明板。 凹槽由弹性支撑环提供。 每个凹部被限定在突起之间，使得来自发光单元的光通过透明板和每个凹部观察。

公开(公告)号：US06201439B1

公开(公告)日：2001-03-13

申请号：US09150012

申请日：1998-09-09

Applicant: Kaoru Ishida ,  Masayuki Miyaji ,  Hiroaki Kosugi ,  Shin'ichi Kugou

Inventor： Kaoru Ishida ,  Masayuki Miyaji ,  Hiroaki Kosugi ,  Shin'ichi Kugou

IPC: H03F326

CPC classification number: H01P5/10 ,  H01P5/12 ,  H03F3/602

Abstract: A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics; a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of the first, second and third power amplifier circuits, and propagating combined output.

Abstract translation: 高功率放大器具有将输入信号的一半传播到同相输出端的第一平衡 - 不平衡变换器，并且还将第四输入信号传播到第一和第二反相输出端，所述信号传播到第一和第二 反相输出端子滞后于传播到同相输出端子的信号后方180度; 第一和第二功率放大器电路连接到第一平衡 - 不平衡变换器的第一和第二反相输出端子并且具有相同的特性; 连接到第一平衡 - 不平衡变换器的同相输出端的第三功率放大器电路，其输出功率基本上是第一或第二功率放大器电路的输出功率的两倍; 以及具有用于接收第一和第二功率放大器电路的输出的第一和第二反相输入端的第二平衡 - 不平衡变压器，具有用于接收第三功率放大器电路的输出的同相输入端， ，第二和第三功率放大器电路，以及传播组合输出。