IMPRINT METHOD FOR FABRICATION OF LOW DENSITY NANOPORE MEMBRANE

    公开(公告)号:US20230194991A1

    公开(公告)日:2023-06-22

    申请号:US18062225

    申请日:2022-12-06

    CPC classification number: G03F7/2016 B82Y40/00

    Abstract: A method of manufacturing a synthetic nanopore device for DNA sequencing disclosed herein includes providing a base template, forming a guiding layer on top of the base template, and forming a photoresist layer on top of the guiding layer. The photoresist layer is patterned, and the guiding layer is etched for form a guiding pattern. The photoresist layer is removed to form a guiding template and a self-assembled monolayer is deposited on at least a portion of the guiding template to form a patterned template. The patterned template is exposed to one or more etch processes to form a nanoimprint lithography template. A membrane is imprinted with the nanoimprint lithography template to form an array of nanopores in the membrane.

    Discrete track magnetic recording for EAMR

    公开(公告)号:US11670337B1

    公开(公告)日:2023-06-06

    申请号:US17540566

    申请日:2021-12-02

    CPC classification number: G11B21/08

    Abstract: A data storage medium includes a substrate, and a plurality of spaced-apart discrete data storage tracks supported by the substrate. The data storage medium also includes magnetic flux sinking material between the discrete data storage tracks and over the substrate. As an alternative to the magnetic flux sinking material, plasmonic material may be included between the discrete data storage tracks and over the substrate.

    Magnetoresistive asymmetry compensation

    公开(公告)号:US11658669B2

    公开(公告)日:2023-05-23

    申请号:US17582376

    申请日:2022-01-24

    Abstract: Systems and methods are disclosed for magnetoresistive asymmetry (MRA) compensation using a digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end (CTFE) circuit, and performing analog offset compensation to constrain an extremum of the analog signal to adjust a dynamic range based on an input range of an analog-to-digital converter (ADC), rather than to modify the analog signal to have a zero mean. The method may further comprise converting the analog signal to a digital sample sequence via the ADC; performing, via a digital MRA compensation circuit, digital MRA compensation on the digital sample sequence; receiving, via a digital backend (DBE) subsystem, the digital sample sequence prior to digital MRA compensation; and generating, via a DBE, a bit sequence corresponding to the analog signal based on an output of the DBE subsystem and an output of the digital MRA compensation circuit.

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