公开(公告)号：US20060273345A1

公开(公告)日：2006-12-07

申请号：US11403120

申请日：2006-04-12

Applicant: Woo-geun Lee ,  Jae-hong Jeon ,  Shi-yul Kim ,  Jang-soo Kim ,  Hye-young Ryu

Inventor： Woo-geun Lee ,  Jae-hong Jeon ,  Shi-yul Kim ,  Jang-soo Kim ,  Hye-young Ryu

IPC: H01L29/74

CPC classification number: G09G3/3648 ,  G02F2001/136254 ,  G09G3/3696 ,  G09G2310/0245 ,  G09G2320/043

Abstract: Provided are a method of manufacturing a liquid crystal display including an amorphous silicon thin film transistor, a liquid crystal display, and an aging system adapted to the method of manufacturing the liquid crystal display. The method includes providing a liquid crystal display including a liquid crystal panel having a plurality of thin film transistors, each thin film transistor comprising a gate electrode, a semiconductor layer formed on the gate electrode, and a drain electrode and a source electrode formed on the semiconductor layer and overlapping respective sides of the gate electrode, and wherein a first voltage is applied to the gate electrode, a second voltage is applied to the drain electrode, and the first voltage minus the second voltage is less than a third voltage minus a fourth voltage, in which the third voltage is a voltage applied to the gate electrode to deactivate the plurality of thin film transistors upon normal operation of the liquid crystal panel, and the fourth voltage is a maximal voltage applied to the drain electrode upon normal operation of the liquid crystal panel.

Abstract translation: 提供一种制造液晶显示器的方法，该液晶显示器包括非晶硅薄膜晶体管，液晶显示器和适于制造液晶显示器的方法的老化系统。 该方法包括提供一种液晶显示器，该液晶显示器包括具有多个薄膜晶体管的液晶面板，每个薄膜晶体管包括栅电极，形成在栅电极上的半导体层，以及形成在该栅电极上的漏电极和源电极 半导体层和栅极电极的相对侧，并且其中第一电压被施加到栅电极，第二电压被施加到漏电极，并且第一电压减去第二电压小于第三电压减去第四电压 电压，其中第三电压是施加到栅电极的电压，以在液晶面板正常操作时使多个薄膜晶体管停止工作，第四电压是在正常操作时施加到漏电极的最大电压 液晶面板。

公开(公告)号：US08647928B2

公开(公告)日：2014-02-11

申请号：US11646126

申请日：2006-12-27

Applicant: Sang-Woo Whangbo ,  Shi-Yul Kim ,  Sung-Hoon Yang ,  Woo-Geun Lee

Inventor： Sang-Woo Whangbo ,  Shi-Yul Kim ,  Sung-Hoon Yang ,  Woo-Geun Lee

IPC: H01L21/00 ,  H01L21/84

CPC classification number: H01L29/4908 ,  H01L27/124 ,  H01L27/1288

Abstract: A thin film transistor substrate includes a base substrate, a gate electrode, a gate insulating layer, a surface treating layer, an active layer, a source electrode and a drain electrode. The gate electrode is formed on the base substrate. The gate insulating layer is formed on the base substrate to cover the gate electrode. The surface treating layer is formed on the gate insulating layer by treating the gate insulating layer with a nitrogen-containing gas to prevent leakage current. The active layer is formed on the surface treating layer to cover the gate electrode. The source electrode and the gate electrode that are spaced apart from each other by a predetermined distance are formed on the active layer.

Abstract translation: 薄膜晶体管基板包括基底基板，栅极电极，栅极绝缘层，表面处理层，有源层，源电极和漏电极。 栅电极形成在基底基板上。 栅极绝缘层形成在基底基板上以覆盖栅电极。 通过用含氮气体处理栅极绝缘层，在栅极绝缘层上形成表面处理层，以防止漏电流。 在表面处理层上形成有源层以覆盖栅电极。 在有源层上形成彼此隔开预定距离的源电极和栅电极。

公开(公告)号：US08642367B2

公开(公告)日：2014-02-04

申请号：US13042348

申请日：2011-03-07

Applicant: Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

Inventor： Yu-Gwang Jeong ,  Young-Wook Lee ,  Sang-Gab Kim ,  Woo-Geun Lee ,  Min-Seok Oh ,  Jang-Soo Kim ,  Kap-Soo Yoon ,  Shin-Il Choi ,  Hong-Kee Chin ,  Seung-Ha Choi ,  Seung-Hwan Shim ,  Sung-Hoon Yang ,  Ki-Hun Jeong

IPC: H01L21/02

CPC classification number: H01L27/127 ,  H01L27/1214 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/66765

Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.

Abstract translation: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。

公开(公告)号：US20130146864A1

公开(公告)日：2013-06-13

申请号：US13464613

申请日：2012-05-04

Applicant: Ki-Won KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Jin-Won LEE ,  Se-Myung KWON ,  Jung Ouck AHN ,  Si Jin KIM

Inventor： Ki-Won KIM ,  Kap Soo YOON ,  Woo Geun LEE ,  Jin-Won LEE ,  Se-Myung KWON ,  Jung Ouck AHN ,  Si Jin KIM

IPC: H01L29/786 ,  H01L33/08 ,  H01L21/336

CPC classification number: H01L29/41733 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/78696

Abstract: A method for manufacturing a thin film transistor array panel includes forming a gate line and a gate electrode protruding from the gate line on a substrate; forming a gate insulating layer on the gate line and the gate electrode; depositing sequentially a semiconductor material and a metal material on the gate insulating layer; performing a first etching operation on the semiconductor material and the metal material using a first mask to form a semiconductor layer and a metal layer, the metal layer including a data line, a source electrode, and a drain electrode, in which the drain electrode protrudes from the data line, and the source electrode and the drain electrode having an integral shape; and performing a second etching operation on the metal layer using a second mask to divide the source electrode and the drain electrode.

Abstract translation: 一种制造薄膜晶体管阵列面板的方法，包括：在基板上形成从栅极线突出的栅极线和栅电极; 在栅极线和栅电极上形成栅极绝缘层; 在栅极绝缘层上依次沉积半导体材料和金属材料; 使用第一掩模对所述半导体材料和所述金属材料进行第一蚀刻操作以形成半导体层和金属层，所述金属层包括数据线，源电极和漏电极，其中所述漏电极突出 数据线，源电极和漏电极具有整体形状; 以及使用第二掩模对所述金属层进行第二蚀刻操作以分割所述源电极和所述漏电极。

公开(公告)号：US20130099240A1

公开(公告)日：2013-04-25

申请号：US13650528

申请日：2012-10-12

Applicant: Hyun-Jung LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Jang-Hoon HA ,  Hee-Jun BYEON ,  Ji-Yun HONG ,  Ji-Soo OH

Inventor： Hyun-Jung LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Jang-Hoon HA ,  Hee-Jun BYEON ,  Ji-Yun HONG ,  Ji-Soo OH

IPC: H01L29/786 ,  H01L21/34

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/78606 ,  H01L29/7869

Abstract: A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.

公开(公告)号：US20120286259A1

公开(公告)日：2012-11-15

申请号：US13431448

申请日：2012-03-27

Applicant: Jae-Woo PARK ,  Dong-Hoon LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON

Inventor： Jae-Woo PARK ,  Dong-Hoon LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON

IPC: H01L29/786 ,  H01L21/44

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/66969

Abstract: Exemplary embodiments of the present invention provide a display substrate including a gate electrode, an oxide semiconductor pattern, a source electrode, a drain electrode, and an etch stop pattern. The gate electrode may be disposed on a base substrate. The oxide semiconductor pattern may be disposed over the gate electrode. The source electrode may be disposed on the oxide semiconductor pattern. The drain electrode may be disposed on the oxide semiconductor pattern and spaced apart from the source electrode. The etch stop pattern may be disposed over the gate electrode, the etch stop pattern may be overlapping a space between the source electrode and the drain electrode and may include a metal oxide. The reliability of the display substrate may, therefore, be improved.

Abstract translation: 本发明的示例性实施例提供了包括栅电极，氧化物半导体图案，源电极，漏电极和蚀刻停止图案的显示基板。 栅电极可以设置在基底基板上。 氧化物半导体图案可以设置在栅极上。 源极可以设置在氧化物半导体图案上。 漏极可以设置在氧化物半导体图案上并与源电极间隔开。 蚀刻停止图案可以设置在栅电极之上，蚀刻停止图案可以与源电极和漏电极之间的空间重叠，并且可以包括金属氧化物。 因此，可以提高显示基板的可靠性。

公开(公告)号：US20120211753A1

公开(公告)日：2012-08-23

申请号：US13328658

申请日：2011-12-16

Applicant: Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

Inventor： Ki-Won KIM ,  Je-Hun LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Kap-Soo YOON ,  Do-Hyun KIM ,  Seung-Ha CHOI

IPC: H01L29/786 ,  H01L21/336 ,  H01L33/00

CPC classification number: H01L27/1225 ,  H01L27/1288

Abstract: In a display substrate and a method of manufacturing the display substrate, the display substrate includes a data line, a channel pattern, an insulating pattern and a pixel electrode. The data line extends in a direction on a base substrate. The channel pattern is disposed in a separate region between an input electrode connected to the data line and an output electrode spaced apart from the input electrode. The channel pattern makes contact with the input electrode and the output electrode on the input and output electrodes. The insulating pattern is spaced apart from the channel pattern on the base substrate and includes a contact hole exposing the output electrode. The pixel electrode is formed on the insulating pattern to make contact with the output electrode through the contact hole. Thus, a damage of the oxide semiconductor layer may be minimized and a manufacturing process may be simplified.

Abstract translation: 在显示基板和显示基板的制造方法中，显示基板包括数据线，通道图案，绝缘图案和像素电极。 数据线沿着基底基板上的方向延伸。 通道图案设置在与数据线连接的输入电极和与输入电极间隔开的输出电极之间的分离区域中。 通道图案与输入电极和输出电极上的输出电极接触。 绝缘图案与基底基板上的沟道图案间隔开，并且包括暴露输出电极的接触孔。 像素电极形成在绝缘图案上，以通过接触孔与输出电极接触。 因此，可以使氧化物半导体层的损伤最小化，并且可以简化制造工艺。

公开(公告)号：US20120194414A1

公开(公告)日：2012-08-02

申请号：US13419228

申请日：2012-03-13

Applicant: Woo-Geun LEE ,  Shi-Yul Kim ,  Jae-Hyoung Youn ,  Young-Wook Lee

Inventor： Woo-Geun LEE ,  Shi-Yul Kim ,  Jae-Hyoung Youn ,  Young-Wook Lee

IPC: G09G3/36

CPC classification number: G02F1/136286 ,  G02F1/136209 ,  G02F2001/13606 ,  G02F2001/136218 ,  G02F2001/136222 ,  G02F2201/40

Abstract: A liquid crystal display to prevent light leakage with an improvement of aperture ratio and a reduction of load of a data line is provided. The liquid crystal display includes a gate line and a storage electrode line formed on a insulating substrate and apart from each other, a first data line and a second data line intersecting the gate line, a first pixel electrode defined by the gate line and the first data line, and a second pixel electrode defined by the gate line and the second data line and neighboring the first pixel electrode. Also, a blocking electrode between the first pixel electrode and the second pixel electrode is included, wherein at least portion of the first data line is disposed under the first pixel electrode, and at least portion of the blocking electrode is disposed under the second pixel electrode and apart from the first data line.

Abstract translation: 提供了一种液晶显示器，用于防止光泄漏，同时提高了开口率和减少了数据线的负载。 液晶显示器包括形成在绝缘基板上并且彼此分开的栅极线和存储电极线，与栅极线相交的第一数据线和第二数据线，由栅极线和第一栅极线限定的第一像素电极 数据线和由栅极线和第二数据线限定并与第一像素电极相邻的第二像素电极。 此外，包括第一像素电极和第二像素电极之间的阻挡电极，其中第一数据线的至少一部分设置在第一像素电极下方，并且阻挡电极的至少一部分设置在第二像素电极下方 并且除了第一条数据线之外。

公开(公告)号：US20120193634A1

公开(公告)日：2012-08-02

申请号：US13444768

申请日：2012-04-11

Applicant: Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

Inventor： Young-Wook Lee ,  Hong-Suk Yoo ,  Jean-Ho Song ,  Jae-Hyoung Youn ,  Woo-Geun Lee ,  Ki-Won Kim ,  Jong-In Kim

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/66742 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248

Abstract: A thin film transistor substrate according to an embodiment of the present invention includes: an insulation substrate; a gate line formed on the insulation substrate; a first interlayer insulating layer formed on the gate line; a data line and a gate electrode formed on the first interlayer insulating layer; a gate insulating layer formed on the data line and gate electrode; a semiconductor formed on the gate insulating layer and overlapping the gate electrode; a second interlayer insulating layer formed on the semiconductor; a first connection formed on the second interlayer insulating layer and electrically connecting the gate line and the gate electrode to each other; a drain electrode connected to the semiconductor; a pixel electrode connected to the drain electrode; and a second connection connecting the data line and the semiconductor to each other.

Abstract translation: 根据本发明实施例的薄膜晶体管基板包括：绝缘基板; 形成在所述绝缘基板上的栅极线; 形成在栅极线上的第一层间绝缘层; 形成在所述第一层间绝缘层上的数据线和栅电极; 形成在数据线和栅电极上的栅极绝缘层; 形成在栅极绝缘层上并与栅电极重叠的半导体; 形成在所述半导体上的第二层间绝缘层; 形成在所述第二层间绝缘层上并将所述栅极线和所述栅电极彼此电连接的第一连接; 连接到半导体的漏电极; 连接到所述漏电极的像素电极; 以及将数据线和半导体彼此连接的第二连接。

公开(公告)号：US20110204370A1

公开(公告)日：2011-08-25

申请号：US13027453

申请日：2011-02-15

Applicant: Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

Inventor： Kap-Soo Yoon ,  Woo-Geun Lee ,  Bong-Kyun Kim ,  Sung-Hoon Yang ,  Ki-Won Kim ,  Hyun-Jung Lee

IPC: H01L33/08 ,  H01L29/786 ,  H01L21/44

CPC classification number: H01L29/78693 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1288 ,  H01L27/3248 ,  H01L27/3262 ,  H01L51/5203

Abstract: Provided are a thin-film transistor (TFT) substrate, a method of manufacturing the same, and a display device including the same. The TFT substrate includes a gate electrode formed on a substrate, a gate insulating layer formed on the gate electrode, an oxide semiconductor pattern formed on the gate insulating layer, a source electrode formed on the oxide semiconductor pattern, a drain electrode formed on the oxide semiconductor pattern to face the source electrode, and a pixel electrode formed on the gate insulating layer.

Abstract translation: 提供了一种薄膜晶体管（TFT）基板，其制造方法和包括该薄膜晶体管的显示装置。 TFT基板包括形成在基板上的栅电极，形成在栅电极上的栅极绝缘层，形成在栅极绝缘层上的氧化物半导体图案，形成在氧化物半导体图案上的源电极，形成在氧化物上的漏电极 面对源电极的半导体图案，以及形成在栅极绝缘层上的像素电极。